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/linux/drivers/char/hw_random/
H A DKconfig3 # Hardware Random Number Generator (RNG) configuration
7 tristate "Hardware Random Number Generator Core support"
10 Hardware Random Number Generator Core infrastructure.
18 kernel's random number generator entropy pool.
25 tristate "Timer IOMEM HW Random Number Generator support"
29 Number Generator used by reading a 'dumb' iomem address that
39 tristate "Intel HW Random Number Generator support"
44 Generator hardware found on Intel i8xx-based motherboards.
52 tristate "AMD HW Random Number Generator support"
58 Generator hardware found on AMD 76x-based motherboards.
[all …]
/linux/drivers/staging/media/atomisp/pci/css_2401_system/host/
H A Dpixelgen_private.h137 ia_css_print("Pixel Generator ID %d Enable 0x%x\n", ID, state->com_enable); in pixelgen_ctrl_dump_state()
138 ia_css_print("Pixel Generator ID %d PRBS reset value 0 0x%x\n", ID, in pixelgen_ctrl_dump_state()
140 ia_css_print("Pixel Generator ID %d PRBS reset value 1 0x%x\n", ID, in pixelgen_ctrl_dump_state()
142 ia_css_print("Pixel Generator ID %d SYNC SID 0x%x\n", ID, state->syng_sid); in pixelgen_ctrl_dump_state()
143 ia_css_print("Pixel Generator ID %d syng free run 0x%x\n", ID, in pixelgen_ctrl_dump_state()
145 ia_css_print("Pixel Generator ID %d syng pause 0x%x\n", ID, state->syng_pause); in pixelgen_ctrl_dump_state()
146 ia_css_print("Pixel Generator ID %d syng no of frames 0x%x\n", ID, in pixelgen_ctrl_dump_state()
148 ia_css_print("Pixel Generator ID %d syng no of pixels 0x%x\n", ID, in pixelgen_ctrl_dump_state()
150 ia_css_print("Pixel Generator ID %d syng no of line 0x%x\n", ID, in pixelgen_ctrl_dump_state()
152 ia_css_print("Pixel Generator ID %d syng hblank cyc 0x%x\n", ID, in pixelgen_ctrl_dump_state()
[all …]
/linux/include/crypto/
H A Drng.h3 * RNG: Random Number Generator algorithms under the crypto API
19 * struct rng_alg - random number generator definition
22 * random number. The random number generator transform
26 * @seed: Seed or reseed the random number generator. With the
28 * generator shall become ready for generation. If the
29 * random number generator requires a seed for setting
35 * @seedsize: The seed size required for a random number generator
66 * DOC: Random number generator API
68 * The random number generator API is used with the ciphers of type
79 * Allocate a cipher handle for a random number generator. The returned struct
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-driver-xdata5 Description: Allows the user to enable the PCIe traffic generator which
7 Endpoint direction or to disable the PCIe traffic generator
18 through this generator in MB/s.
30 Description: Allows the user to enable the PCIe traffic generator which
32 Complex direction or to disable the PCIe traffic generator
43 through this generator in MB/s.
H A Dsysfs-timecard64 GEN1 output is from frequency generator 1
65 GEN2 output is from frequency generator 2
66 GEN3 output is from frequency generator 3
67 GEN4 output is from frequency generator 4
113 frequency generator <X>.
138 Description: (RO) Either 0 or 1, showing if the signal generator is running.
143 Description: (RO) Shows the time in <sec>.<nsec> that the signal generator
149 Description: (RW) Used to start the signal generator, and summarize
152 The signal generator may be started by writing the signal
161 echo 0 > signal # turn off generator
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,v-tc.txt4 The Video Timing Controller is a general purpose video timing generator and
19 - xlnx,generator: The VTC has a timing generator
21 At least one of the xlnx,detector and xlnx,generator properties must be
32 xlnx,generator;
/linux/scripts/
H A Drust_is_available.sh73 # Check that the Rust bindings generator exists.
76 echo >&2 "*** Rust bindings generator '$BINDGEN' could not be found."
121 # Check that the Rust bindings generator is suitable.
133 echo >&2 "*** Running '$BINDGEN' to check the Rust bindings generator version failed with"
146 echo >&2 "*** Running '$BINDGEN' to check the bindings generator version did not return"
158 echo >&2 "*** Rust bindings generator '$BINDGEN' is too old."
169 echo >&2 "*** Rust bindings generator '$BINDGEN' versions 0.66.0 and 0.66.1 may not"
178 # Check that the `libclang` used by the Rust bindings generator is suitable.
189 echo >&2 "*** bindings generator) failed with code $bindgen_libclang_code. This may be caused by"
198 # of the `libclang` found by the Rust bindings generator is suitable.
[all …]
H A Drust_is_available_test.py183 … self.assertIn(f"Rust bindings generator '{self.missing}' could not be found.", result.stderr)
215 …self.assertIn(f"Running '{self.nonexecutable}' to check the Rust bindings generator version failed…
219 …self.assertIn(f"Running '{self.unexpected_binary}' to check the bindings generator version did not…
224 …self.assertIn(f"Running '{bindgen}' to check the bindings generator version did not return", resul…
229 …self.assertIn(f"Running '{bindgen}' to check the bindings generator version did not return", resul…
234 …self.assertIn(f"Running '{bindgen}' to check the bindings generator version did not return", resul…
239 self.assertIn(f"Rust bindings generator '{bindgen}' is too old.", result.stderr)
246 …self.assertIn(f"Rust bindings generator '{bindgen}' versions 0.66.0 and 0.66.1 may not", result.st…
258 …self.assertIn(f"bindings generator) failed with code {self.bindgen_default_bindgen_libclang_failur…
264 … self.assertIn("bindings generator) did not return an expected output. See output", result.stderr)
[all …]
/linux/drivers/clk/sophgo/
H A DKconfig23 tristate "Sophgo SG2042 Clock Generator support"
26 This driver supports the Clock Generator on the
37 This clock IP depends on SG2042 Clock Generator because it uses
38 clock from Clock Generator IP as input.
/linux/include/linux/
H A Drslib.h23 * @genpoly: Generator polynomial
24 * @nroots: Number of generator roots = number of parity symbols
28 * @gfpoly: The primitive generator polynominal
87 * @gfpoly: the extended Galois field generator polynomial coefficients,
90 * @fcr: the first consecutive root of the rs code generator polynomial
93 * @nroots: RS code generator polynomial degree (number of roots)
H A Dhw_random.h2 Hardware Random Number Generator
20 * struct hwrng - Hardware Random Number Generator driver
57 /** Register a new Hardware Random Number Generator driver. */
60 /** Unregister a Hardware Random Number Generator driver. */
/linux/arch/m68k/atari/
H A Datasound.c65 /* Disable generator A in mixer control. */ in atari_mksound()
79 /* Set generator A frequency to hz. */ in atari_mksound()
96 /* Use envelope for generator A. */ in atari_mksound()
100 /* Set generator A level to maximum, no envelope. */ in atari_mksound()
104 /* Turn on generator A in mixer control. */ in atari_mksound()
/linux/lib/reed_solomon/
H A Dreed_solomon.c60 * @gfpoly: Field generator polynomial coefficients
61 * @gffunc: Field generator function
62 * @fcr: first root of RS code generator polynomial, index form
64 * @nroots: RS code generator polynomial degree (number of roots)
133 /* Form RS code generator polynomial from its roots */ in codec_init()
201 * @gfpoly: the extended Galois field generator polynomial coefficients,
207 * @fcr: the first consecutive root of the rs code generator polynomial
210 * @nroots: RS code generator polynomial degree (number of roots)
279 * @gfpoly: the extended Galois field generator polynomial coefficients,
282 * @fcr: the first consecutive root of the rs code generator polynomial
[all …]
/linux/drivers/tty/serial/
H A Dip22zilog.h168 #define TRxCBR 2 /* TRxC = BR Generator Output */
173 #define TCBR 0x10 /* Transmit clock = BR Generator output */
177 #define RCBR 0x40 /* Receive clock = BR Generator output */
181 /* Write Register 12 (lower byte of baud rate generator time constant) */
183 /* Write Register 13 (upper byte of baud rate generator time constant) */
186 #define BRENAB 1 /* Baud rate generator enable */
187 #define BRSRC 2 /* Baud rate generator source */
194 #define SSBR 0x80 /* Set DPLL source = BR generator */
262 /* Read Register 12 (lower byte of baud rate generator constant) */
264 /* Read Register 13 (upper byte of baud rate generator constant) */
H A Dzs.h187 #define TRxCBR 2 /* TRxC = BR Generator Output */
192 #define TCBR 0x10 /* Transmit clock = BR Generator output */
196 #define RCBR 0x40 /* Receive clock = BR Generator output */
200 /* Write Register 12 (Lower Byte of Baud Rate Generator Time Constant) */
202 /* Write Register 13 (Upper Byte of Baud Rate Generator Time Constant) */
205 #define BRENABL 1 /* Baud rate generator enable */
206 #define BRSRC 2 /* Baud rate generator source */
213 #define SSBR 0x80 /* Set DPLL source = BR generator */
279 /* Read Register 12 (Lower Byte of Baud Rate Generator Constant (WR12)) */
281 /* Read Register 13 (Upper Byte of Baud Rate Generator Constant (WR13) */
H A Dsunzilog.h170 #define TRxCBR 2 /* TRxC = BR Generator Output */
175 #define TCBR 0x10 /* Transmit clock = BR Generator output */
179 #define RCBR 0x40 /* Receive clock = BR Generator output */
183 /* Write Register 12 (lower byte of baud rate generator time constant) */
185 /* Write Register 13 (upper byte of baud rate generator time constant) */
188 #define BRENAB 1 /* Baud rate generator enable */
189 #define BRSRC 2 /* Baud rate generator source */
196 #define SSBR 0x80 /* Set DPLL source = BR generator */
270 /* Read Register 12 (lower byte of baud rate generator constant) */
272 /* Read Register 13 (upper byte of baud rate generator constant) */
H A Dpmac_zilog.h251 #define TRxCBR 2 /* TRxC = BR Generator Output */
256 #define TCBR 0x10 /* Transmit clock = BR Generator output */
260 #define RCBR 0x40 /* Receive clock = BR Generator output */
264 /* Write Register 12 (lower byte of baud rate generator time constant) */
266 /* Write Register 13 (upper byte of baud rate generator time constant) */
269 #define BRENAB 1 /* Baud rate generator enable */
270 #define BRSRC 2 /* Baud rate generator source */
277 #define SSBR 0x80 /* Set DPLL source = BR generator */
347 /* Read Register 12 (lower byte of baud rate generator constant) */
349 /* Read Register 13 (upper byte of baud rate generator constant) */
/linux/drivers/net/hamradio/
H A Dz8530.h132 #define TRxCBR 2 /* TRxC = BR Generator Output */
137 #define TCBR 0x10 /* Transmit clock = BR Generator output */
141 #define RCBR 0x40 /* Receive clock = BR Generator output */
145 /* Write Register 12 (lower byte of baud rate generator time constant) */
147 /* Write Register 13 (upper byte of baud rate generator time constant) */
150 #define BRENABL 1 /* Baud rate generator enable */
151 #define BRSRC 2 /* Baud rate generator source */
158 #define SSBR 0x80 /* Set DPLL source = BR generator */
217 /* Read Register 12 (lower byte of baud rate generator constant) */
219 /* Read Register 13 (upper byte of baud rate generator constant) */
/linux/Documentation/devicetree/bindings/rng/
H A Dmicrochip,pic32-rng.txt1 * Microchip PIC32 Random Number Generator
3 The PIC32 RNG provides a pseudo random number generator which can be seeded by
4 another true random number generator.
/linux/include/soc/fsl/qe/
H A Dqe.h35 QE_BRG1, /* Baud Rate Generator 1 */
36 QE_BRG2, /* Baud Rate Generator 2 */
37 QE_BRG3, /* Baud Rate Generator 3 */
38 QE_BRG4, /* Baud Rate Generator 4 */
39 QE_BRG5, /* Baud Rate Generator 5 */
40 QE_BRG6, /* Baud Rate Generator 6 */
41 QE_BRG7, /* Baud Rate Generator 7 */
42 QE_BRG8, /* Baud Rate Generator 8 */
43 QE_BRG9, /* Baud Rate Generator 9 */
44 QE_BRG10, /* Baud Rate Generator 10 */
[all …]
/linux/drivers/media/platform/xilinx/
H A Dxilinx-vtc.c67 * and one at 0x0060 for the generator.
149 * @has_generator: the VTC has a timing generator
150 * @config: generator timings configuration
171 * Generator Operations
217 /* Enable the generator. Set the source of all generator parameters to in xvtc_generator_start()
218 * generator registers. in xvtc_generator_start()
314 xvtc->has_generator = of_property_read_bool(node, "xlnx,generator"); in xvtc_parse_of()
/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,5p35023.yaml7 title: Renesas 5p35023 VersaClock 3 programmable I2C clock generator
13 The 5P35023 is a VersaClock programmable clock generator and
29 …ocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator
69 versa3: clock-generator@68 {
/linux/drivers/crypto/allwinner/
H A DKconfig33 the Pseudo-Random Number Generator found in the Security System.
87 the Pseudo-Random Number Generator found in the Crypto Engine.
95 the True Random Number Generator found in the Crypto Engine.
130 the Pseudo-Random Number Generator found in the Security System.
/linux/crypto/
H A DKconfig812 tristate "Sequence Number IV Generator"
815 Sequence Number IV generator
817 This IV generator generates an IV based on a sequence number by
823 tristate "Encrypted Chain IV Generator"
826 Encrypted Chain IV generator
828 This IV generator generates an IV based on the encryption of
833 tristate "Encrypted Salt-Sector IV Generator"
836 Encrypted Salt-Sector IV generator
838 This IV generator is used in some cases by fscrypt and/or
1195 tristate "ANSI PRNG (Pseudo Random Number Generator)"
[all …]
/linux/drivers/clk/
H A DKconfig78 tristate "Maxim 9485 Programmable Clock Generator"
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
147 generator.
155 generator.
310 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
386 This driver supports the Renesas 9-series PCIe clock generator
395 This driver supports the SkyWorks Si521xx PCIe clock generator
422 Renesas Versaclock7 is a family of configurable clock generator

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