Searched +full:gcc +full:- +full:sdm660 (Results 1 – 12 of 12) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,gcc-sdm660.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDM660/SDM630/SDM636 Global Clock & Reset Controller 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 15 domains on SDM630, SDM636 and SDM660 18 include/dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) 20 $ref: qcom,gcc.yaml# [all …]
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| H A D | qcom,gpucc-sdm660.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Graphics Clock & Reset Controller on SDM630 and SDM660 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 14 power domains on SDM630 and SDM660. 16 See also dt-bindings/clock/qcom,gpucc-sdm660.h. 21 - qcom,gpucc-sdm630 22 - qcom,gpucc-sdm660 [all …]
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| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | qcom,sdm660.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDM660 Network-On-Chip interconnect 10 - Konrad Dybcio <konradybcio@kernel.org> 13 The Qualcomm SDM660 interconnect providers support adjusting the 19 - qcom,sdm660-a2noc 20 - qcom,sdm660-bimc 21 - qcom,sdm660-cnoc [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/interconnect/qcom,sdm660.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/gpio/gpio.h> [all …]
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| H A D | sdm660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 13 compatible = "qcom,adreno-512.0", "qcom,adreno"; 14 operating-points-v2 = <&gpu_sdm660_opp_table>; 16 gpu_sdm660_opp_table: opp-table { 17 compatible = "operating-points-v2"; 23 * at the same opp-level 25 opp-750000000 { 26 opp-hz = /bits/ 64 <750000000>; 27 opp-level = <RPM_SMD_LEVEL_TURBO>; 28 opp-peak-kBps = <5412000>; [all …]
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| /linux/drivers/clk/qcom/ |
| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 242 CMN PLL consumes the AHB/SYS clocks from GCC and supplies 243 the output clocks to the networking hardware and GCC blocks. 852 tristate "SDM660 Global Clock Controller" 856 Support for the global clock controller on SDM660 devices. 861 tristate "SDM660 Multimedia Clock Controller" 866 Support for the multimedia clock controller on SDM660 devices. 871 tristate "SDM660 Graphics Clock Controller" 1411 Say Y if you want to toggle LPASS-adjacent resets within 1529 tristate "High-Frequency PLL (HFPLL) Clock Controller" [all …]
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| H A D | gcc-sdm660.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. 13 #include <linux/clk-provider.h> 15 #include <linux/reset-controller.h> 17 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 20 #include "clk-regmap.h" 21 #include "clk-alpha-pll.h" 22 #include "clk-rcg.h" 23 #include "clk-branch.h" 2528 { .compatible = "qcom,gcc-sdm630" }, [all …]
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,snps-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 19 const: qcom,snps-dwc3 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 28 - qcom,ipq5018-dwc3 [all …]
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| H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 12 # Use the combined qcom,snps-dwc3 instead 21 - compatible 26 - enum: 27 - qcom,ipq4019-dwc3 28 - qcom,ipq5018-dwc3 29 - qcom,ipq5332-dwc3 [all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,mdp5.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 15 - Rob Clark <robdclark@gmail.com> 20 - const: qcom,mdp5 22 - items: 23 - enum: 24 - qcom,apq8084-mdp5 25 - qcom,msm8226-mdp5 [all …]
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | qcom,apcs-kpss-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Jassi Brar <jassisinghbrar@gmail.com> 19 - items: 20 - enum: 21 - qcom,ipq5018-apcs-apps-global 22 - qcom,ipq5332-apcs-apps-global 23 - qcom,ipq5424-apcs-apps-global [all …]
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