xref: /linux/arch/loongarch/boot/dts/loongson-2k0500.dtsi (revision d3b402c5a2d47f51eb0581da1a7b142f82cb10d1) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Loongson Technology Corporation Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/clock/loongson,ls2k-clk.h>
10
11/ {
12	#address-cells = <2>;
13	#size-cells = <2>;
14
15	cpus {
16		#address-cells = <1>;
17		#size-cells = <0>;
18
19		cpu0: cpu@0 {
20			compatible = "loongson,la264";
21			device_type = "cpu";
22			reg = <0x0>;
23			clocks = <&clk LOONGSON2_NODE_CLK>;
24		};
25	};
26
27	ref_100m: clock-ref-100m {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency = <100000000>;
31		clock-output-names = "ref_100m";
32	};
33
34	cpuintc: interrupt-controller {
35		compatible = "loongson,cpu-interrupt-controller";
36		#interrupt-cells = <1>;
37		interrupt-controller;
38	};
39
40	thermal-zones {
41		cpu-thermal {
42			polling-delay-passive = <1000>;
43			polling-delay = <5000>;
44			thermal-sensors = <&tsensor 0>;
45
46			trips {
47				cpu-alert {
48					temperature = <33000>;
49					hysteresis = <2000>;
50					type = "active";
51				};
52
53				cpu-crit {
54					temperature = <85000>;
55					hysteresis = <5000>;
56					type = "critical";
57				};
58			};
59		};
60	};
61
62	bus@10000000 {
63		compatible = "simple-bus";
64		ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
65			 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
66			 <0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
67			 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
68			 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
69		#address-cells = <2>;
70		#size-cells = <2>;
71
72		isa@16400000 {
73			compatible = "isa";
74			#size-cells = <1>;
75			#address-cells = <2>;
76			ranges = <1 0x0 0x0 0x16400000 0x4000>;
77		};
78
79		clk: clock-controller@1fe10400 {
80			compatible = "loongson,ls2k0500-clk";
81			reg = <0x0 0x1fe10400 0x0 0x2c>;
82			#clock-cells = <1>;
83			clocks = <&ref_100m>;
84			clock-names = "ref_100m";
85		};
86
87		apbdma0: dma-controller@1fe10c00 {
88			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
89			reg = <0 0x1fe10c00 0 0x8>;
90			interrupt-parent = <&eiointc>;
91			interrupts = <67>;
92			clocks = <&clk LOONGSON2_APB_CLK>;
93			#dma-cells = <1>;
94			status = "disabled";
95		};
96
97		dma-controller@1fe10c10 {
98			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
99			reg = <0 0x1fe10c10 0 0x8>;
100			interrupt-parent = <&eiointc>;
101			interrupts = <68>;
102			clocks = <&clk LOONGSON2_APB_CLK>;
103			#dma-cells = <1>;
104			status = "disabled";
105		};
106
107		apbdma2: dma-controller@1fe10c20 {
108			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
109			reg = <0 0x1fe10c20 0 0x8>;
110			interrupt-parent = <&eiointc>;
111			interrupts = <69>;
112			clocks = <&clk LOONGSON2_APB_CLK>;
113			#dma-cells = <1>;
114			status = "disabled";
115		};
116
117		apbdma3: dma-controller@1fe10c30 {
118			compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma";
119			reg = <0 0x1fe10c30 0 0x8>;
120			interrupt-parent = <&eiointc>;
121			interrupts = <70>;
122			clocks = <&clk LOONGSON2_APB_CLK>;
123			#dma-cells = <1>;
124			status = "disabled";
125		};
126
127		liointc0: interrupt-controller@1fe11400 {
128			compatible = "loongson,liointc-2.0";
129			reg = <0x0 0x1fe11400 0x0 0x40>,
130			      <0x0 0x1fe11040 0x0 0x8>;
131			reg-names = "main", "isr0";
132
133			interrupt-controller;
134			#address-cells = <0>;
135			#interrupt-cells = <2>;
136			interrupt-parent = <&cpuintc>;
137			interrupts = <2>;
138			interrupt-names = "int0";
139
140			loongson,parent_int_map = <0xffffffff>, /* int0 */
141						  <0x00000000>, /* int1 */
142						  <0x00000000>, /* int2 */
143						  <0x00000000>; /* int3 */
144		};
145
146		liointc1: interrupt-controller@1fe11440 {
147			compatible = "loongson,liointc-2.0";
148			reg = <0x0 0x1fe11440 0x0 0x40>,
149			      <0x0 0x1fe11048 0x0 0x8>;
150			reg-names = "main", "isr0";
151
152			interrupt-controller;
153			#address-cells = <0>;
154			#interrupt-cells = <2>;
155			interrupt-parent = <&cpuintc>;
156			interrupts = <4>;
157			interrupt-names = "int2";
158
159			loongson,parent_int_map = <0x00000000>, /* int0 */
160						  <0x00000000>, /* int1 */
161						  <0xffffffff>, /* int2 */
162						  <0x00000000>; /* int3 */
163		};
164
165		eiointc: interrupt-controller@1fe11600 {
166			compatible = "loongson,ls2k0500-eiointc";
167			reg = <0x0 0x1fe11600 0x0 0xea00>;
168			interrupt-controller;
169			#address-cells = <0>;
170			#interrupt-cells = <1>;
171			interrupt-parent = <&cpuintc>;
172			interrupts = <3>;
173		};
174
175		nand: nand-controller@1ff58000 {
176			compatible = "loongson,ls2k0500-nand-controller";
177			reg = <0 0x1ff58000 0 0x24>,
178			      <0 0x1ff58040 0 0x4>;
179			reg-names = "nand", "nand-dma";
180			dmas = <&apbdma0 0>;
181			dma-names = "rxtx";
182			status = "disabled";
183		};
184
185		pwm@1ff5c000 {
186			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
187			reg = <0x0 0x1ff5c000 0x0 0x10>;
188			interrupt-parent = <&liointc0>;
189			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
190			clocks = <&clk LOONGSON2_APB_CLK>;
191			#pwm-cells = <3>;
192			status = "disabled";
193		};
194
195		pwm@1ff5c010 {
196			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
197			reg = <0x0 0x1ff5c010 0x0 0x10>;
198			interrupt-parent = <&liointc0>;
199			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
200			clocks = <&clk LOONGSON2_APB_CLK>;
201			#pwm-cells = <3>;
202			status = "disabled";
203		};
204
205		pwm@1ff5c020 {
206			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
207			reg = <0x0 0x1ff5c020 0x0 0x10>;
208			interrupt-parent = <&liointc0>;
209			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
210			clocks = <&clk LOONGSON2_APB_CLK>;
211			#pwm-cells = <3>;
212			status = "disabled";
213		};
214
215		pwm@1ff5c030 {
216			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
217			reg = <0x0 0x1ff5c030 0x0 0x10>;
218			interrupt-parent = <&liointc0>;
219			interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
220			clocks = <&clk LOONGSON2_APB_CLK>;
221			#pwm-cells = <3>;
222			status = "disabled";
223		};
224
225		pwm@1ff5c040 {
226			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
227			reg = <0x0 0x1ff5c040 0x0 0x10>;
228			interrupt-parent = <&liointc0>;
229			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
230			clocks = <&clk LOONGSON2_APB_CLK>;
231			#pwm-cells = <3>;
232			status = "disabled";
233		};
234
235		pwm@1ff5c050 {
236			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
237			reg = <0x0 0x1ff5c050 0x0 0x10>;
238			interrupt-parent = <&liointc0>;
239			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
240			clocks = <&clk LOONGSON2_APB_CLK>;
241			#pwm-cells = <3>;
242			status = "disabled";
243		};
244
245		pwm@1ff5c060 {
246			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
247			reg = <0x0 0x1ff5c060 0x0 0x10>;
248			interrupt-parent = <&liointc0>;
249			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
250			clocks = <&clk LOONGSON2_APB_CLK>;
251			#pwm-cells = <3>;
252			status = "disabled";
253		};
254
255		pwm@1ff5c070 {
256			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
257			reg = <0x0 0x1ff5c070 0x0 0x10>;
258			interrupt-parent = <&liointc0>;
259			interrupts = <25 IRQ_TYPE_LEVEL_HIGH>;
260			clocks = <&clk LOONGSON2_APB_CLK>;
261			#pwm-cells = <3>;
262			status = "disabled";
263		};
264
265		pwm@1ff5c080 {
266			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
267			reg = <0x0 0x1ff5c080 0x0 0x10>;
268			interrupt-parent = <&liointc0>;
269			interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
270			clocks = <&clk LOONGSON2_APB_CLK>;
271			#pwm-cells = <3>;
272			status = "disabled";
273		};
274
275		pwm@1ff5c090 {
276			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
277			reg = <0x0 0x1ff5c090 0x0 0x10>;
278			interrupt-parent = <&liointc0>;
279			interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
280			clocks = <&clk LOONGSON2_APB_CLK>;
281			#pwm-cells = <3>;
282			status = "disabled";
283		};
284
285		pwm@1ff5c0a0 {
286			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
287			reg = <0x0 0x1ff5c0a0 0x0 0x10>;
288			interrupt-parent = <&liointc0>;
289			interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
290			clocks = <&clk LOONGSON2_APB_CLK>;
291			#pwm-cells = <3>;
292			status = "disabled";
293		};
294
295		pwm@1ff5c0b0 {
296			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
297			reg = <0x0 0x1ff5c0b0 0x0 0x10>;
298			interrupt-parent = <&liointc0>;
299			interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
300			clocks = <&clk LOONGSON2_APB_CLK>;
301			#pwm-cells = <3>;
302			status = "disabled";
303		};
304
305		pwm@1ff5c0c0 {
306			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
307			reg = <0x0 0x1ff5c0c0 0x0 0x10>;
308			interrupt-parent = <&liointc0>;
309			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
310			clocks = <&clk LOONGSON2_APB_CLK>;
311			#pwm-cells = <3>;
312			status = "disabled";
313		};
314
315		pwm@1ff5c0d0 {
316			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
317			reg = <0x0 0x1ff5c0d0 0x0 0x10>;
318			interrupt-parent = <&liointc0>;
319			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
320			clocks = <&clk LOONGSON2_APB_CLK>;
321			#pwm-cells = <3>;
322			status = "disabled";
323		};
324
325		pwm@1ff5c0e0 {
326			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
327			reg = <0x0 0x1ff5c0e0 0x0 0x10>;
328			interrupt-parent = <&liointc0>;
329			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
330			clocks = <&clk LOONGSON2_APB_CLK>;
331			#pwm-cells = <3>;
332			status = "disabled";
333		};
334
335		pwm@1ff5c0f0 {
336			compatible = "loongson,ls2k0500-pwm", "loongson,ls7a-pwm";
337			reg = <0x0 0x1ff5c0f0 0x0 0x10>;
338			interrupt-parent = <&liointc0>;
339			interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
340			clocks = <&clk LOONGSON2_APB_CLK>;
341			#pwm-cells = <3>;
342			status = "disabled";
343		};
344
345		gmac0: ethernet@1f020000 {
346			compatible = "snps,dwmac-3.70a";
347			reg = <0x0 0x1f020000 0x0 0x10000>;
348			interrupt-parent = <&liointc0>;
349			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
350			interrupt-names = "macirq";
351			status = "disabled";
352		};
353
354		gmac1: ethernet@1f030000 {
355			compatible = "snps,dwmac-3.70a";
356			reg = <0x0 0x1f030000 0x0 0x10000>;
357			interrupt-parent = <&liointc0>;
358			interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
359			interrupt-names = "macirq";
360			status = "disabled";
361		};
362
363		sata: sata@1f040000 {
364			compatible = "snps,spear-ahci";
365			reg = <0x0 0x1f040000 0x0 0x10000>;
366			interrupt-parent = <&eiointc>;
367			interrupts = <75>;
368			status = "disabled";
369		};
370
371		ehci0: usb@1f050000 {
372			compatible = "generic-ehci";
373			reg = <0x0 0x1f050000 0x0 0x8000>;
374			interrupt-parent = <&eiointc>;
375			interrupts = <71>;
376			status = "disabled";
377		};
378
379		ohci0: usb@1f058000 {
380			compatible = "generic-ohci";
381			reg = <0x0 0x1f058000 0x0 0x8000>;
382			interrupt-parent = <&eiointc>;
383			interrupts = <72>;
384			status = "disabled";
385		};
386
387		tsensor: thermal-sensor@1fe11500 {
388			compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal";
389			reg = <0x0 0x1fe11500 0x0 0x30>;
390			interrupt-parent = <&liointc0>;
391			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
392			#thermal-sensor-cells = <1>;
393		};
394
395		uart0: serial@1ff40800 {
396			compatible = "loongson,ls2k0500-uart", "ns16550a";
397			reg = <0x0 0x1ff40800 0x0 0x10>;
398			clock-frequency = <100000000>;
399			interrupt-parent = <&eiointc>;
400			interrupts = <2>;
401			no-loopback-test;
402			status = "disabled";
403		};
404
405		i2c0: i2c@1ff48000 {
406			compatible = "loongson,ls2k-i2c";
407			reg = <0x0 0x1ff48000 0x0 0x0800>;
408			interrupt-parent = <&eiointc>;
409			interrupts = <14>;
410			status = "disabled";
411		};
412
413		i2c@1ff48800 {
414			compatible = "loongson,ls2k-i2c";
415			reg = <0x0 0x1ff48800 0x0 0x0800>;
416			interrupt-parent = <&eiointc>;
417			interrupts = <15>;
418			status = "disabled";
419		};
420
421		i2c@1ff49000 {
422			compatible = "loongson,ls2k-i2c";
423			reg = <0x0 0x1ff49000 0x0 0x0800>;
424			interrupt-parent = <&eiointc>;
425			interrupts = <16>;
426			status = "disabled";
427		};
428
429		i2c@1ff49800 {
430			compatible = "loongson,ls2k-i2c";
431			reg = <0x0 0x1ff49800 0x0 0x0800>;
432			interrupt-parent = <&eiointc>;
433			interrupts = <17>;
434			status = "disabled";
435		};
436
437		i2c@1ff4a000 {
438			compatible = "loongson,ls2k-i2c";
439			reg = <0x0 0x1ff4a000 0x0 0x0800>;
440			interrupt-parent = <&eiointc>;
441			interrupts = <18>;
442			status = "disabled";
443		};
444
445		i2c@1ff4a800 {
446			compatible = "loongson,ls2k-i2c";
447			reg = <0x0 0x1ff4a800 0x0 0x0800>;
448			interrupt-parent = <&eiointc>;
449			interrupts = <19>;
450			status = "disabled";
451		};
452
453		mmc0: mmc@1ff64000 {
454			compatible = "loongson,ls2k0500-mmc";
455			reg = <0 0x1ff64000 0 0x2000>,
456			      <0 0x1fe10100 0 0x4>;
457			interrupt-parent = <&eiointc>;
458			interrupts = <57>;
459			dmas = <&apbdma3 0>;
460			dma-names = "rx-tx";
461			clocks = <&clk LOONGSON2_APB_CLK>;
462			status = "disabled";
463		};
464
465		mmc@1ff66000 {
466			compatible = "loongson,ls2k0500-mmc";
467			reg = <0 0x1ff66000 0 0x2000>,
468			      <0 0x1fe10100 0 0x4>;
469			interrupt-parent = <&eiointc>;
470			interrupts = <58>;
471			dmas = <&apbdma2 0>;
472			dma-names = "rx-tx";
473			clocks = <&clk LOONGSON2_APB_CLK>;
474			status = "disabled";
475		};
476
477		pmc: power-management@1ff6c000 {
478			compatible = "loongson,ls2k0500-pmc", "syscon";
479			reg = <0x0 0x1ff6c000 0x0 0x58>;
480			interrupt-parent = <&eiointc>;
481			interrupts = <56>;
482			loongson,suspend-address = <0x0 0x1c000500>;
483
484			syscon-reboot {
485				compatible = "syscon-reboot";
486				offset = <0x30>;
487				mask = <0x1>;
488			};
489
490			syscon-poweroff {
491				compatible = "syscon-poweroff";
492				regmap = <&pmc>;
493				offset = <0x14>;
494				mask = <0x3c00>;
495				value = <0x3c00>;
496			};
497		};
498
499		rtc0: rtc@1ff6c100 {
500			compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
501			reg = <0x0 0x1ff6c100 0x0 0x100>;
502			interrupt-parent = <&eiointc>;
503			interrupts = <35>;
504			status = "disabled";
505		};
506
507		pcie@1a000000 {
508			compatible = "loongson,ls2k-pci";
509			reg = <0x0 0x1a000000 0x0 0x02000000>,
510			      <0xfe 0x0 0x0 0x20000000>;
511			#address-cells = <3>;
512			#size-cells = <2>;
513			device_type = "pci";
514			bus-range = <0x0 0x5>;
515			ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
516				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
517
518			pcie@0,0 {
519				reg = <0x0000 0x0 0x0 0x0 0x0>;
520				#address-cells = <3>;
521				#size-cells = <2>;
522				device_type = "pci";
523				interrupt-parent = <&eiointc>;
524				#interrupt-cells = <1>;
525				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
526				interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
527				ranges;
528			};
529
530			pcie@1,0 {
531				reg = <0x0800 0x0 0x0 0x0 0x0>;
532				#address-cells = <3>;
533				#size-cells = <2>;
534				device_type = "pci";
535				interrupt-parent = <&eiointc>;
536				#interrupt-cells = <1>;
537				interrupt-map-mask = <0x0 0x0 0x0 0x0>;
538				interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
539				ranges;
540			};
541		};
542	};
543};
544