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/linux/net/sctp/
H A Dendpointola.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 1999-2000 Cisco, Inc.
4 * Copyright (c) 1999-2001 Motorola, Inc.
5 * Copyright (c) 2001-2002 International Business Machines, Corp.
12 * This abstraction represents an SCTP endpoint.
16 * lksctp developers <linux-sctp@vger.kernel.org>
39 * Initialize the base fields of the endpoint structure.
48 ep->digest = kzalloc(SCTP_SIGNATURE_SIZE, gfp); in sctp_endpoint_init()
49 if (!ep->digest) in sctp_endpoint_init()
52 ep->asconf_enable = net->sctp.addip_enable; in sctp_endpoint_init()
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/linux/Documentation/devicetree/bindings/pci/
H A Dpci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/pci-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCI Endpoint Controller
10 Common properties for PCI Endpoint Controller Nodes.
13 - Kishon Vijay Abraham I <kishon@kernel.org>
14 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
18 pattern: "^pcie-ep@"
20 iommu-map:
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/linux/arch/m68k/include/asm/
H A Dm5272sim.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * m5272sim.h -- ColdFire 5272 System Integration Module support.
46 #define MCFSIM_CSBR0 (MCF_MBAR + 0x40) /* CS0 Base Address */
48 #define MCFSIM_CSBR1 (MCF_MBAR + 0x48) /* CS1 Base Address */
50 #define MCFSIM_CSBR2 (MCF_MBAR + 0x50) /* CS2 Base Address */
52 #define MCFSIM_CSBR3 (MCF_MBAR + 0x58) /* CS3 Base Address */
54 #define MCFSIM_CSBR4 (MCF_MBAR + 0x60) /* CS4 Base Address */
56 #define MCFSIM_CSBR5 (MCF_MBAR + 0x68) /* CS5 Base Address */
58 #define MCFSIM_CSBR6 (MCF_MBAR + 0x70) /* CS6 Base Address */
60 #define MCFSIM_CSBR7 (MCF_MBAR + 0x78) /* CS7 Base Address */
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/linux/Documentation/devicetree/bindings/sound/
H A Daudio-graph-port.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
17 - $ref: /schemas/graph.yaml#/$defs/port-base
18 - $ref: /schemas/sound/dai-params.yaml#
20 mclk-fs:
21 $ref: simple-card.yaml#/definitions/mclk-fs
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/linux/Documentation/devicetree/bindings/usb/
H A Dusb-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
16 mode-switch:
20 orientation-switch:
24 retimer-switch:
29 $ref: /schemas/graph.yaml#/$defs/port-base
35 endpoint:
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H A Donnn,nb7vpq904m.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ON Semiconductor Type-C DisplayPort ALT Mode Linear Redriver
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - onnn,nb7vpq904m
20 vcc-supply:
23 enable-gpios: true
24 orientation-switch: true
25 retimer-switch: true
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dite,it6505.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Allen Chen <allen.chen@ite.com.tw>
13 - $ref: /schemas/sound/dai-common.yaml#
16 The IT6505 is a high-performance DisplayPort 1.1a transmitter,
19 and ensures robust transmission of high-quality uncompressed video
30 transmission of high-definition content. Users of the IT6505 need not
40 ovdd-supply:
43 pwr18-supply:
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H A Dti,tfp410.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
11 - Jyri Sarha <jsarha@ti.com>
21 powerdown-gpios:
26 Data de-skew value in 350ps increments, from 0 to 7, as configured
27 through the DK[3:1] pins. The de-skew multiplier is computed as
28 (DK[3:1] - 4), so it ranges from -4 to 3.
38 $ref: /schemas/graph.yaml#/$defs/port-base
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H A Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
24 - ti,sn65dsi84
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H A Dtoshiba,tc358767.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Gusakov <andrey.gusakov@cogentembedded.com>
19 - items:
20 - enum:
21 - toshiba,tc358867
22 - toshiba,tc9595
23 - const: toshiba,tc358767
24 - const: toshiba,tc358767
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H A Dite,it66121.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Phong LE <ple@baylibre.com>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The IT66121 is a high-performance and low-power single channel HDMI
21 - ite,it66121
22 - ite,it6610
27 reset-gpios:
31 vrf12-supply:
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H A Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
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/linux/drivers/usb/gadget/udc/cdns2/
H A Dcdns2-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * USBHS-DEV device controller driver header file
14 #include <linux/dma-direction.h>
22 * struct cdns2_ep0_regs - endpoint 0 related registers.
23 * @rxbc: receive (OUT) 0 endpoint byte count register.
24 * @txbc: transmit (IN) 0 endpoint byte count register.
25 * @cs: 0 endpoint control and status register.
27 * @fifo: 0 endpoint fifo register.
31 * @maxpack: 0 endpoint max packet size.
45 /* EP0CS - bitmasks. */
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/linux/arch/arm64/boot/dts/sprd/
H A Dsc9836.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #address-cells = <2>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a53";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
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/linux/drivers/usb/cdns3/
H A Dcdnsp-mem.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
18 #include "cdnsp-gadget.h"
19 #include "cdnsp-trace.h"
42 seg->trbs = dma_pool_zalloc(pdev->segment_pool, flags, &dma); in cdnsp_segment_alloc()
43 if (!seg->trbs) { in cdnsp_segment_alloc()
49 seg->bounce_buf = kzalloc(max_packet, flags | GFP_DMA); in cdnsp_segment_alloc()
50 if (!seg->bounce_buf) in cdnsp_segment_alloc()
57 seg->trbs[i].link.control |= cpu_to_le32(TRB_CYCLE); in cdnsp_segment_alloc()
59 seg->dma = dma; in cdnsp_segment_alloc()
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H A Dcdnsp-gadget.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
24 #include "gadget-export.h"
26 #include "cdnsp-gadget.h"
27 #include "cdnsp-trace.h"
56 /* Save read-only status and port state. */ in cdnsp_port_state_to_neutral()
61 * cdnsp_find_next_ext_cap - Find the offset of the extended capabilities
63 * @base: PCI MMIO registers base address.
72 int cdnsp_find_next_ext_cap(void __iomem *base, u32 start, int id) in cdnsp_find_next_ext_cap() argument
79 val = readl(base + HCC_PARAMS_OFFSET); in cdnsp_find_next_ext_cap()
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-static-replicator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
28 const: arm,coresight-static-replicator
30 power-domains:
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/linux/Documentation/driver-api/cxl/linux/
H A Dcxl-driver.rst1 .. SPDX-License-Identifier: GPL-2.0
12 The :code:`cxl-cli` library, maintained as part of the NDTCL project, may
19 * cxl_core - fundamental init interface and core object creation
20 * cxl_port - initializes root and provides port enumeration interface.
21 * cxl_acpi - initializes root decoders and interacts with ACPI data.
22 * cxl_p/mem - initializes memory devices
23 * cxl_pci - uses cxl_port to enumerate the actual fabric hierarchy.
27 Here is an example from a single-socket system with 4 host bridges. Two host
38 .. kernel-render:: DOT
39 :alt: Digraph of CXL fabric describing host-bridge interleaving
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/linux/Documentation/devicetree/bindings/media/
H A Dmicrochip,csi2dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
30 32-bit IDI interface or a parallel interface.
34 This port has an 'endpoint' that can be connected to a sink port of another
44 const: microchip,sama7g5-csi2dc
53 clock-names:
63 - const: pclk
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H A Drenesas,vin.yaml1 # SPDX-License-Identifier: GPL-2.0-only
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
25 - items:
26 - enum:
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H A Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
30 - ti,am654-cal
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H A Drockchip-isp1.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Helen Koike <helen.koike@collabora.com>
19 - fsl,imx8mp-isp
20 - rockchip,px30-cif-isp
21 - rockchip,rk3399-cif-isp
30 interrupt-names:
32 - const: isp
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/linux/include/linux/
H A Dpci-epc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * PCI Endpoint *Controller* (EPC) header file
12 #include <linux/pci-epf.h>
17 UNKNOWN_INTERFACE = -1,
36 * struct pci_epc_map - information about EPC memory for mapping a RC PCI
44 * @phys_base: base physical address of the allocated EPC memory for mapping the
47 * @virt_base: base virtual address of the allocated EPC memory for mapping the
65 * struct pci_epc_ops - set of function pointers for performing EPC operations
78 * @set_msix: ops to set the requested number of MSI-X interrupts in the
79 * MSI-X capability register
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/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx-parallel-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx-parallel-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
14 const: fsl,imx-parallel-display
16 interface-pix-fmt:
19 - rgb24
20 - rgb565
21 - bgr666
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/linux/drivers/pci/controller/cadence/
H A Dpcie-cadence.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
11 #include <linux/pci-epf.h>
42 /* Endpoint Bus and Device Number Register */
49 /* Endpoint Function f BAR b Configuration Registers */
71 /* Endpoint Function Configuration Register */
96 /* BAR control values applicable to both Endpoint Function and Root Complex */
117 (((aperture) - 2) << ((bar) * 8))
124 * Endpoint Function Registers (PCI configuration space for endpoint functions)
134 * Endpoint PF Registers
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