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/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dgpio_base.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
27 * Pre-requisites: headers required by header of this unit
40 * Post-requisites: headers required by this unit
53 struct gpio *gpio, in dal_gpio_open() argument
56 return dal_gpio_open_ex(gpio, mode); in dal_gpio_open()
60 struct gpio *gpio, in dal_gpio_open_ex() argument
63 if (gpio->pin) { in dal_gpio_open_ex()
68 // No action if allocation failed during gpio construct in dal_gpio_open_ex()
69 if (!gpio->hw_container.ddc) { in dal_gpio_open_ex()
73 gpio->mode = mode; in dal_gpio_open_ex()
[all …]
H A Dgpio_service.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
27 * Pre-requisites: headers required by header of this unit
43 * Post-requisites: headers required by this unit
68 if (!dal_hw_translate_init(&service->translate, dce_version, in dal_gpio_service_create()
74 if (!dal_hw_factory_init(&service->factory, dce_version, in dal_gpio_service_create()
83 service->ctx = ctx; in dal_gpio_service_create()
87 service->factory.number_of_pins[index_of_id]; in dal_gpio_service_create()
91 service->busyness[index_of_id] = in dal_gpio_service_create()
95 if (!service->busyness[index_of_id]) { in dal_gpio_service_create()
101 service->busyness[index_of_id][i] = 0; in dal_gpio_service_create()
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H A Dhw_gpio.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
43 struct hw_gpio *gpio) in store_registers() argument
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
52 struct hw_gpio *gpio) in restore_registers() argument
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
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H A Dhw_ddc.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
39 ddc->shifts->field_name, ddc->masks->field_name
42 ddc->base.base.ctx
44 (ddc->regs->reg)
46 struct gpio;
51 dal_hw_gpio_destruct(&pin->base); in dal_hw_ddc_destruct()
77 hw_gpio = &ddc->base; in set_config()
84 regval = REG_GET_3(gpio.MASK_reg, in set_config()
89 switch (config_data->config.ddc.type) { in set_config()
91 /* On plug-in, there is a transient level on the pad in set_config()
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H A Dhw_factory.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
33 struct gpio;
43 uint32_t en);
48 uint32_t en);
53 uint32_t en);
55 struct gpio *gpio);
57 struct gpio *gpio);
59 struct gpio *gpio);
62 uint32_t en);
65 uint32_t en);
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H A Dhw_hpd.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
38 hpd->shifts->field_name, hpd->masks->field_name
41 hpd->base.base.ctx
43 (hpd->regs->reg)
45 struct gpio;
50 dal_hw_gpio_destruct(&pin->base); in dal_hw_hpd_destruct()
74 if (ptr->mode == GPIO_MODE_INTERRUPT) { in get_value()
83 /* in any other modes, operate as normal GPIO */ in get_value()
98 DC_HPD_CONNECT_INT_DELAY, config_data->config.hpd.delay_on_connect / 10, in set_config()
99 DC_HPD_DISCONNECT_INT_DELAY, config_data->config.hpd.delay_on_disconnect / 10); in set_config()
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H A Dhw_generic.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
40 generic->shifts->field_name, generic->masks->field_name
43 generic->base.base.ctx
45 (generic->regs->reg)
47 struct gpio;
52 dal_hw_gpio_destruct(&pin->base); in dal_hw_generic_destruct()
77 GENERIC_EN, config_data->config.generic_mux.enable_output_from_mux, in set_config()
78 GENERIC_SEL, config_data->config.generic_mux.mux_select); in set_config()
96 uint32_t en, in dal_hw_generic_construct() argument
99 dal_hw_gpio_construct(&pin->base, id, en, ctx); in dal_hw_generic_construct()
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/linux/Documentation/devicetree/bindings/net/nfc/
H A Dsamsung,s3fwrn5.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s3fwrn5-i2c
16 - samsung,s3fwrn82
18 en-gpios:
21 Output GPIO pin used for enabling/disabling the chip
32 wake-gpios:
35 Output GPIO pin used to enter firmware mode and sleep/wakeup control
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8183-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
17 const: mediatek,mt8183-pinctrl
23 reg-names:
25 - const: iocfg0
26 - const: iocfg1
27 - const: iocfg2
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H A Dmediatek,mt8365-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Bernhard Rosenkränzer <bero@baylibre.com>
18 const: mediatek,mt8365-pinctrl
23 mediatek,pctl-regmap:
24 $ref: /schemas/types.yaml#/definitions/phandle-array
32 gpio-controller: true
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/linux/Documentation/devicetree/bindings/iio/amplifiers/
H A Dadi,hmc425a.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
13 Digital Step Attenuator IIO devices with gpio interface.
15 ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
18 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
19 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
21 HMC540S 1 dB LSB Silicon MMIC 4-Bit Digital Positive Control Attenuator, 0.1 - 8 GHz
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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7173.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
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/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-pca95xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA95xx I2C GPIO multiplexer
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 Bindings for the family of I2C GPIO multiplexers/expanders: NXP PCA95xx,
19 - items:
20 - const: diodes,pi4ioe5v6534q
21 - const: nxp,pcal6534
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
151 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
155 generic->regs = &generic_regs[en]; in define_generic_registers()
156 generic->shifts = &generic_shift[en]; in define_generic_registers()
157 generic->masks = &generic_mask[en]; in define_generic_registers()
158 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
163 uint32_t en) in define_ddc_registers() argument
167 switch (pin->id) { in define_ddc_registers()
169 ddc->regs = &ddc_data_regs[en]; in define_ddc_registers()
170 ddc->base.regs = &ddc_data_regs[en].gpio; in define_ddc_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
H A Dhw_factory_dcn21.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
159 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
163 generic->regs = &generic_regs[en]; in define_generic_registers()
164 generic->shifts = &generic_shift[en]; in define_generic_registers()
165 generic->masks = &generic_mask[en]; in define_generic_registers()
166 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
171 uint32_t en) in define_ddc_registers() argument
175 switch (pin->id) { in define_ddc_registers()
177 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
178 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
[all …]
/linux/Documentation/devicetree/bindings/leds/
H A Dissi,is31fl319x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vincent Knecht <vincent.knecht@mailoo.org>
14 Previously known as Si-En SN319{0,1,3,6,9}.
26 - issi,is31fl3190
27 - issi,is31fl3191
28 - issi,is31fl3193
29 - issi,is31fl3196
30 - issi,is31fl3199
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
26 * GPIO line, however the i.MX6 UART driver assumes RX happens
30 rs485-rx-en-hog {
31 gpio-hog;
32 gpios = <18 0>; /* GPIO Q */
33 line-name = "rs485-rx-en";
34 output-low;
39 gpio-line-names =
43 "", "", "", "DRC02-In1", "", "", "", "";
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/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/
H A Dhw_factory_dcn401.c1 // SPDX-License-Identifier: MIT
184 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
188 generic->regs = &generic_regs[en]; in define_generic_registers()
189 generic->shifts = &generic_shift[en]; in define_generic_registers()
190 generic->masks = &generic_mask[en]; in define_generic_registers()
191 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
196 uint32_t en) in define_ddc_registers() argument
200 switch (pin->id) { in define_ddc_registers()
202 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
203 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
H A Dhw_factory_dcn20.c2 * Copyright 2013-15 Advanced Micro Devices, Inc.
183 uint32_t en) in define_ddc_registers() argument
187 switch (pin->id) { in define_ddc_registers()
189 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
190 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
193 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
194 ddc->base.regs = &ddc_clk_regs_dcn[en].gpio; in define_ddc_registers()
201 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
202 ddc->masks = &ddc_mask[en]; in define_ddc_registers()
206 static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) in define_hpd_registers() argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
H A Dhw_factory_dcn30.c188 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
192 generic->regs = &generic_regs[en]; in define_generic_registers()
193 generic->shifts = &generic_shift[en]; in define_generic_registers()
194 generic->masks = &generic_mask[en]; in define_generic_registers()
195 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
200 uint32_t en) in define_ddc_registers() argument
204 switch (pin->id) { in define_ddc_registers()
206 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
207 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
210 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/
H A Dhw_factory_dcn315.c180 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
184 generic->regs = &generic_regs[en]; in define_generic_registers()
185 generic->shifts = &generic_shift[en]; in define_generic_registers()
186 generic->masks = &generic_mask[en]; in define_generic_registers()
187 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
192 uint32_t en) in define_ddc_registers() argument
196 switch (pin->id) { in define_ddc_registers()
198 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
199 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
202 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-corsola-steelix.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 pp1000_edpbrdg: regulator-pp1000-edpbrdg {
13 compatible = "regulator-fixed";
14 regulator-name = "pp1000_edpbrdg";
15 pinctrl-names = "default";
16 pinctrl-0 = <&en_pp1000_edpbrdg>;
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/
H A Dhw_factory_dcn32.c192 static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) in define_generic_registers() argument
196 generic->regs = &generic_regs[en]; in define_generic_registers()
197 generic->shifts = &generic_shift[en]; in define_generic_registers()
198 generic->masks = &generic_mask[en]; in define_generic_registers()
199 generic->base.regs = &generic_regs[en].gpio; in define_generic_registers()
204 uint32_t en) in define_ddc_registers() argument
208 switch (pin->id) { in define_ddc_registers()
210 ddc->regs = &ddc_data_regs_dcn[en]; in define_ddc_registers()
211 ddc->base.regs = &ddc_data_regs_dcn[en].gpio; in define_ddc_registers()
214 ddc->regs = &ddc_clk_regs_dcn[en]; in define_ddc_registers()
[all …]
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
[all …]
/linux/drivers/gpu/drm/amd/display/include/
H A Dgpio_service_interface.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
31 #include "hw/gpio.h"
35 struct gpio *dal_gpio_create(
38 uint32_t en,
42 struct gpio **ptr);
49 struct gpio *dal_gpio_service_create_irq(
54 struct gpio *dal_gpio_service_create_generic_mux(
60 struct gpio **mux);
63 struct gpio *mux,
69 uint32_t en);
[all …]

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