dt\-check\-base (full) in projects: linux

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Searched +full:dt +full:- +full:check +full:- +full:base (Results 1 – 25 of 284) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A D	MachineDominators.cpp	1 //===- MachineDominators.cpp - Machine Dominator Calculation --------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 35 "verify-machine-dom-info", cl::location(VerifyMachineDomInfo), cl::Hidden, 43 template void Calculate<MBBDomTree>(MBBDomTree &DT); 44 template void CalculateWithUpdates<MBBDomTree>(MBBDomTree &DT, MBBUpdates U); 46 template void InsertEdge<MBBDomTree>(MBBDomTree &DT, MachineBasicBlock From, 49 template void DeleteEdge<MBBDomTree>(MBBDomTree &DT, MachineBasicBlock From, 52 template void ApplyUpdates<MBBDomTree>(MBBDomTree &DT, MBBDomTreeGraphDiff &, [all …]
H A D	MachinePostDominators.cpp	1 //===- MachinePostDominators.cpp -Machine Post Dominator Calculation ------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 25 template void Calculate<MBBPostDomTree>(MBBPostDomTree &DT); 26 template void InsertEdge<MBBPostDomTree>(MBBPostDomTree &DT, 29 template void DeleteEdge<MBBPostDomTree>(MBBPostDomTree &DT, 32 template void ApplyUpdates<MBBPostDomTree>(MBBPostDomTree &DT, 35 template bool Verify<MBBPostDomTree>(const MBBPostDomTree &DT, 74 PDT->recalculate(F); in runOnMachineFunction() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A D	GuardWidening.cpp	1 //===- GuardWidening.cpp - ---- Guard widening ----------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 39 //===----------------------------------------------------------------------===// 67 #define DEBUG_TYPE "guard-widening" 74 WidenBranchGuards("guard-widening-widen-branch-guards", cl::Hidden, 84 assert(GI->getIntrinsicID() == Intrinsic::experimental_guard && in getCondition() 86 return GI->getArgOperand(0); in getCondition() 93 return cast<BranchInst>(I)->getCondition(); in getCondition() 100 assert(GI->getIntrinsicID() == Intrinsic::experimental_guard && in setCondition() [all …]
H A D	ConstantHoisting.cpp	1 //===- ConstantHoisting.cpp - Prepare code for expensive constants --------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 // better prepare it for SelectionDAG-based code generation. This works around 11 // the limitations of the basic-block-at-a-time approach. 25 // be live-out of the basic block. Otherwise the constant would be just 33 //===----------------------------------------------------------------------===// 82 "consthoist-with-block-frequency", cl::init(true), cl::Hidden, 88 "consthoist-gep", cl::init(false), cl::Hidden, 92 MinNumOfDependentToRebase("consthoist-min-num-to-rebase", [all …]
H A D	RewriteStatepointsForGC.cpp	1 //===- RewriteStatepointsForGC.cpp - Make GC relocations explicit ---------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 78 #define DEBUG_TYPE "rewrite-statepoints-for-gc" 83 static cl::opt<bool> PrintLiveSet("spp-print-liveset", cl::Hidden, 85 static cl::opt<bool> PrintLiveSetSize("spp-print-liveset-size", cl::Hidden, 88 // Print out the base pointers for debugging 89 static cl::opt<bool> PrintBasePointers("spp-print-base-pointers", cl::Hidden, 95 RematerializationThreshold("spp-rematerialization-threshold", cl::Hidden, [all …]
H A D	LoopFlatten.cpp	1 //===- LoopFlatten.cpp - Loop flattening pass------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 43 // are safe to ignore when we check all uses to be of the form i*M+j. We keep 47 // predicate). We use SCEV to then sanity check that this tripcount matches 50 //===----------------------------------------------------------------------===// 81 #define DEBUG_TYPE "loop-flatten" 86 "loop-flatten-cost-threshold", cl::Hidden, cl::init(2), 91 AssumeNoOverflow("loop-flatten-assume-no-overflow", cl::Hidden, 97 WidenIV("loop-flatten-widen-iv", cl::Hidden, cl::init(true), [all …]
H A D	LoopStrengthReduce.cpp	1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 15 // rewrites expressions to take advantage of scaled-index addressing modes 19 // Terminology note: this code has a lot of handling for "post-increment" or 20 // "post-inc" users. This is not talking about post-increment addressing modes; 31 // example, the icmp is a post-increment user, since it uses %i.next, which is 33 // case of post-increment users is users outside the loop. 46 // multiple base registers, or as the increment expression in an addrec), 47 // we may not actually need both reg and (-1 * reg) in registers; the [all …]
H A D	SeparateConstOffsetFromGEP.cpp	1 //===- SeparateConstOffsetFromGEP.cpp -------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 // e.g., a 2-level loop 50 // It works by splitting each GEP into a variadic base and a constant offset. 51 // The variadic base can be computed once and reused by multiple GEPs, and the 58 // base = gep a, 0, x, y 59 // load base 60 // load base + 1 * sizeof(float) 61 // load base + 32 * sizeof(float) [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A D	Dominators.h	1 //===- Dominators.h - Dominator Info Calculation ----------------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 61 extern template void Calculate<BBDomTree>(BBDomTree &DT); 62 extern template void CalculateWithUpdates<BBDomTree>(BBDomTree &DT, 65 extern template void Calculate<BBPostDomTree>(BBPostDomTree &DT); 67 extern template void InsertEdge<BBDomTree>(BBDomTree &DT, BasicBlock From, 69 extern template void InsertEdge<BBPostDomTree>(BBPostDomTree &DT, 73 extern template void DeleteEdge<BBDomTree>(BBDomTree &DT, BasicBlock From, [all …]
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A D	Loads.cpp	1 //===- Loads.cpp - Local load analysis ------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 29 static bool isAligned(const Value Base, const APInt &Offset, Align Alignment, in isAligned() argument 31 Align BA = Base->getPointerAlignment(DL); in isAligned() 39 const Instruction CtxI, AssumptionCache AC, const DominatorTree DT, in isDereferenceableAndAlignedPointer() argument 42 assert(V->getType()->isPointerTy() && "Base must be pointer"); in isDereferenceableAndAlignedPointer() 45 if (MaxDepth-- == 0) in isDereferenceableAndAlignedPointer() 57 const Value *Base = GEP->getPointerOperand(); in isDereferenceableAndAlignedPointer() local [all …]
H A D	BasicAliasAnalysis.cpp	1 //===- BasicAliasAnalysis.cpp - Stateless Alias Analysis Impl -------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===// 69 static cl::opt<bool> EnableRecPhiAnalysis("basic-aa-recphi", cl::Hidden, 72 static cl::opt<bool> EnableSeparateStorageAnalysis("basic-aa-separate-storage", 89 // we need to check that the analyses it depends on have been. Note that we in invalidate() 100 //===----------------------------------------------------------------------===// 102 //===----------------------------------------------------------------------===// 145 // - either rewind the pointer q to the base-address of the object in in isObjectSmallerThan() [all …]
H A D	Lint.cpp	1 //===-- Lint.cpp - Check for common errors in LLVM IR ---------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This pass statically checks for common and easily-identified constructs 17 // can't check for all possible problems. 34 //===----------------------------------------------------------------------===// 80 static const char LintAbortOnErrorArgName[] = "lint-abort-on-error"; 130 DominatorTree DT; member in __anon88a7481a0111::Lint 137 AssumptionCache AC, DominatorTree DT, TargetLibraryInfo TLI) in Lint() argument 138 : Mod(Mod), DL(DL), AA(AA), AC(AC), DT(DT), TLI(TLI), in Lint() [all …]
H A D	PostDominators.cpp	1 //===- PostDominators.cpp - Post-Dominator Calculation --------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file implements the post-dominator construction algorithms. 11 //===----------------------------------------------------------------------===// 31 //===----------------------------------------------------------------------===// 33 //===----------------------------------------------------------------------===// 43 "Post-Dominator Tree Construction", true, true) 47 // Check whether the analysis, all analyses on functions, or the function's in invalidate() 58 const BasicBlock *BB1 = I1->getParent(); in dominates() [all …]
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A D	SafepointIRVerifier.cpp	1 //===-- SafepointIRVerifier.cpp - Verify gc.statepoint invariants ---------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // Run a basic correctness check on the IR to ensure that Safepoints - if 10 // they've been inserted - were inserted correctly. In particular, look for use 11 // of non-relocated values after a safepoint. It's primary use is to check the 31 //===----------------------------------------------------------------------===// 51 #define DEBUG_TYPE "safepoint-ir-verifier" 58 static cl::opt<bool> PrintOnly("safepoint-ir-verifier-print-only", 70 const DominatorTree *DT = nullptr; member in __anond3efd71a0111::CFGDeadness [all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A D	mediatek,mt7530.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]`
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMParallelDSP.cpp	1 //===- ARMParallelDSP.cpp - Parallel DSP Pass -----------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 /// Armv6 introduced instructions to perform 32-bit SIMD operations. The 12 /// DSP intrinsics, which map on these 32-bit SIMD operations. 15 //===----------------------------------------------------------------------===// 42 #define DEBUG_TYPE "arm-parallel-dsp" 47 DisableParallelDSP("disable-arm-parallel-dsp", cl::Hidden, cl::init(false), 51 NumLoadLimit("arm-parallel-dsp-load-limit", cl::Hidden, cl::init(16), 84 /// Represent a sequence of multiply-accumulate operations with the aim to [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A D	AArch64StackTagging.cpp	1 //===- AArch64StackTagging.cpp - Stack tagging in IR --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===// 63 #define DEBUG_TYPE "aarch64-stack-tagging" 66 "stack-tagging-merge-init", cl::Hidden, cl::init(true), 70 ClUseStackSafety("stack-tagging-use-stack-safety", cl::Hidden, 74 static cl::opt<unsigned> ClScanLimit("stack-tagging-merge-init-scan-limit", 78 ClMergeInitSizeLimit("stack-tagging-merge-init-size-limit", cl::init(272), 82 "stack-tagging-max-lifetimes-for-alloca", cl::Hidden, cl::init(3), [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A D	RegionInfo.h	`1 //===- RegionInfo.h - SESE region analysis -------- [all...]`
H A D	AliasAnalysis.h	1 //===- llvm/Analysis/AliasAnalysis.h - Alias Analysis Interface -- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 19 // component specifies the base memory address of the region. The Size specifies 25 // Some non-obvious details include: 26 // - Pointers that point to two completely different objects in memory never 28 // - NoAlias doesn't imply inequal pointers. The most obvious example of this 35 //===----------------------------------------------------------------------===// 142 setOffset(-getOffset()); 152 /// Virtual base class for providers of capture information. [all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A D	lpc1850-ccu.txt	`3 Each CGU base clock has several clock branches which can be turned on 7 - Above text taken from NXP LPC1850 User Manual. 10 Documentation/devicetree/bindings/clock/clock-bindings.txt 13 - compatible: 14 Should be "nxp,lpc1850-ccu" 15 - reg: 16 Shall define the base and range of the address space 18 - #clock-cells: 19 Shall have value <1>. The permitted clock-specifie [all...]`
/freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/
H A D	AggressiveInstCombine.cpp	1 //===- AggressiveInstCombine.cpp --------- 65 foldGuardedFunnelShift(Instruction & I,const DominatorTree & DT) foldGuardedFunnelShift() argument 416 foldSqrt(CallInst * Call,LibFunc Func,TargetTransformInfo & TTI,TargetLibraryInfo & TLI,AssumptionCache & AC,DominatorTree & DT) foldSqrt() argument 782 foldConsecutiveLoads(Instruction & I,const DataLayout & DL,TargetTransformInfo & TTI,AliasAnalysis & AA,const DominatorTree & DT) foldConsecutiveLoads() argument 1075 Value Base = LHS; inlineCompare() local 1118 Value Base = Call->getArgOperand(0); foldMemChr() local 1188 foldLibCalls(Instruction & I,TargetTransformInfo & TTI,TargetLibraryInfo & TLI,AssumptionCache & AC,DominatorTree & DT,const DataLayout & DL,bool & MadeCFGChange) foldLibCalls() argument 1232 foldUnusualPatterns(Function & F,DominatorTree & DT,TargetTransformInfo & TTI,TargetLibraryInfo & TLI,AliasAnalysis & AA,AssumptionCache & AC,bool & MadeCFGChange) foldUnusualPatterns() argument 1275 runImpl(Function & F,AssumptionCache & AC,TargetTransformInfo & TTI,TargetLibraryInfo & TLI,DominatorTree & DT,AliasAnalysis & AA,bool & MadeCFGChange) runImpl() argument 1289 auto &DT = AM.getResult<DominatorTreeAnalysis>(F); run() local [all...]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A D	mediatek,smi-common.yaml	1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Yong Wu <yong.wu@mediatek.com> 14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml 22 register which control the iommu port is at each larb's register base. But 23 for generation 1, the register is at smi ao base(smi always on register 24 base). Besides that, the smi async clock should be prepared and enabled for 31 - enum: [all …]
/freebsd/sys/contrib/zstd/lib/legacy/
H A D	zstd_v01.c	5 * This source code is licensed under both the BSD-style license (found in the 8 * You may select, at your option, one of the above-listed licenses. 43 … /* enum is exposed, to detect & handle specific errors; compare function result to -enum value / 51 …You will want to enable link-time-optimization to ensure these functions are properly inlined in y… 53 For gcc or clang, you'll need to add -flto flag at compilation and linking stages. 102 Memory usage formula : N->2^N Bytes (examples : 10 -> 1KB; 12 -> 4KB ; 16 -> 64KB; 20 -> 1MB; et… 141 # pragma warning(disable : 4214) /* disable: C4214: non-int bitfields / 195 Unfortunately, on some target/compiler combinations, the generated assembly is sub-optimal. 203 * See http://fastcompression.blogspot.fr/2015/08/accessing-unaligned-memory.html for details. 236 static U16 FSE_read16(const void* ptr) { return ((const unalign*)ptr)->u16; } in FSE_read16() [all …]
/freebsd/sys/contrib/device-tree/Bindings/iommu/
H A D	mediatek,iommu.txt	`6 ARM Short-Descriptor translation table format for address translation. 8 About the M4U Hardware Block Diagram, please check below: 14 +--------+ 16 gals0-rx gals1-rx (Global Async Local Sync rx) 19 gals0-tx gals1-tx (Global Async Local Sync tx) 21 +--------+ 25 +----------------+------- 27 \| gals-rx There may be GALS in some larbs. 30 \| gals-tx 36 +-----+-----+ +----+----+ [all …]`
/freebsd/contrib/ncurses/
H A D	announce.html.in	`1 <!-- 4 * Copyright 2018-2023,2024 Thomas E. Dickey * 30 --> 31 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN"> 37 <link rel="author" href="mailto:bug-ncurses@gnu.org"> 38 <meta http-equiv="Content-Type" content= 39 "text/html; charset=us-ascii"> 41 p,li { max-width:700px; } 42 dd { max-width:630px; } 43 *.main-name { [all …]`

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