| /freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ | 
| H A D | floating-point.json | 15 …-bit packed double precision floating-point instructions retired; some instructions will count twi…21 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
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| /freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ | 
| H A D | floating-point.json | 15 …-bit packed double precision floating-point instructions retired; some instructions will count twi…21 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 26 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 32 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 37 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 48 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 54 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 59 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
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| /freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ | 
| H A D | floating-point.json | 14 …-bit packed double precision floating-point instructions retired; some instructions will count twi…20 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 25 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 31 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 36 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 42 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 47 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 53 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 58 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 64 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
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| /freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ | 
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float…8 …-bit packed computational double precision floating-point instructions retired; some instructions …
 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float…
 18 …-bit packed computational single precision floating-point instructions retired; some instructions …
 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float…
 28 …-bit packed double computational precision floating-point instructions retired; some instructions …
 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float…
 38 …-bit packed single computational precision floating-point instructions retired; some instructions …
 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
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| /freebsd/contrib/gdtoa/ | 
| H A D | README | 1 This directory contains source for a library of binary -> decimal2 and decimal -> binary conversion routines, for single-, double-,
 3 and extended-precision IEEE binary floating-point arithmetic, and
 4 other IEEE-like binary floating-point, including "double double",
 7 	T. J. Dekker, "A Floating-Point Technique for Extending the
 8 	Available Precision", Numer. Math. 18 (1971), pp. 224-242
 12 	"Inside Macintosh: PowerPC Numerics", Addison-Wesley, 1994
 14 The conversion routines use double-precision floating-point arithmetic
 15 and, where necessary, high precision integer arithmetic.  The routines
 18 	David M. Gay, "Correctly Rounded Binary-Decimal and
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| /freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/ | 
| H A D | floating-point.json | 65 …-bit packed double precision floating-point instructions retired; some instructions will count twi…71 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 76 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 82 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 87 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 93 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 98 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 104 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 109 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 115 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 [all …]
 
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| /freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/ | 
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float…8 …-bit packed computational double precision floating-point instructions retired; some instructions …
 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float…
 18 …-bit packed computational single precision floating-point instructions retired; some instructions …
 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float…
 28 …-bit packed double computational precision floating-point instructions retired; some instructions …
 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float…
 38 …-bit packed single computational precision floating-point instructions retired; some instructions …
 43 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 48 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 [all …]
 
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| /freebsd/tools/regression/usr.bin/cc/ | 
| H A D | float.c | 1 /*-28  * Test that floating-point arithmetic works as specified by the C standard.
 51 static const double one_d = 1.0 + DBL_EPSILON / 2;
 52 static const long double one_ld = 1.0L + LDBL_EPSILON / 2;
 61 	printf("%sok %d - %s%s\n", pass || skip ? "" : "not ", testnum,   in test1()
 68  * Compare d1 and d2 using special rules: NaN == NaN and +0 != -0.
 71 fpequal(long double d1, long double d2)  in fpequal()
 80 run_zero_opt_test(double d1, double d2)  in run_zero_opt_test()
 84 	     fpequal(d1 - d2, 0.0)  in run_zero_opt_test()
 85 	     && fpequal(-d1 + 0.0, 0.0)  in run_zero_opt_test()
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| /freebsd/contrib/llvm-project/clang/lib/Headers/ | 
| H A D | emmintrin.h | 1 /*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===5  * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 7  *===-----------------------------------------------------------------------===
 19 typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
 22 typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
 27 typedef double __v2df __attribute__((__vector_size__(16)));
 54                  __target__("sse2,no-evex512"), __min_vector_width__(128)))
 57                  __target__("mmx,sse2,no-evex512"), __min_vector_width__(64)))
 59 /// Adds lower double-precision values in both operands and returns the
 61 ///    are copied from the upper double-precision value of the first operand.
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| H A D | avxintrin.h | 1 /*===---- avxintrin.h - AVX intrinsics -------------------------------------===5  * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 7  *===-----------------------------------------------------------------------===
 17 typedef double __v4df __attribute__ ((__vector_size__ (32)));
 35 typedef double __m256d __attribute__((__vector_size__(32), __aligned__(32)));
 39 typedef double __m256d_u __attribute__((__vector_size__(32), __aligned__(1)));
 54   __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \
 57   __attribute__((__always_inline__, __nodebug__, __target__("avx,no-evex512"), \
 61 /// Adds two 256-bit vectors of [4 x double].
 68 ///    A 256-bit vector of [4 x double] containing one of the source operands.
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| /freebsd/lib/libpmc/pmu-events/arch/x86/skylake/ | 
| H A D | floating-point.json | 3 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational double precision float…8 …-bit packed computational double precision floating-point instructions retired; some instructions …
 13 …"BriefDescription": "Counts once for most SIMD 128-bit packed computational single precision float…
 18 …-bit packed computational single precision floating-point instructions retired; some instructions …
 23 …"BriefDescription": "Counts once for most SIMD 256-bit packed double computational precision float…
 28 …-bit packed double computational precision floating-point instructions retired; some instructions …
 33 …"BriefDescription": "Counts once for most SIMD 256-bit packed single computational precision float…
 38 …-bit packed single computational precision floating-point instructions retired; some instructions …
 43 …fDescription": "Counts once for most SIMD scalar computational double precision floating-point ins…
 48 …double precision floating-point instructions retired; some instructions will count twice as noted …
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| /freebsd/lib/msun/src/ | 
| H A D | math_private.h | 25  *	ix1 = *((1-n0)+(int*)&x);		* low word of x *27  * value.  That is non-ANSI, and, moreover, the gcc instruction
 35  * A union which permits us to convert between a double and two 32 bit
 49 /* A union which permits us to convert between a long double and
 56   long double value;
 75   long double value;
 94   double value;
 112   double value;
 126 /* Get two 32 bit ints from a double.  */
 136 /* Get a 64-bit int from a double. */
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| H A D | s_clogl.c | 1 /*-41 static const double
 42 ln2_hi = 6.9314718055829871e-1;		/*  0x162e42fefa0000.0p-53 */
 46 static const double
 47 ln2l_lo = 1.6465949582897082e-12;	/*  0x1cf79abc9e3b3a.0p-92 */
 50 static const long double
 51 ln2l_lo = 1.64659495828970812809844307550013433e-12L;	/*  0x1cf79abc9e3b39803f2f6af40f343.0p-152L */
 53 #error "Unsupported long double format"
 56 long double complex
 57 clogl(long double complex z)  in clogl()
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| H A D | e_log2.c | 19  *    log2(x) = (f - 0.5*f*f + k_log1p(f)) / ln2 + k20  * in not-quite-routine extra precision.
 29 static const double
 32 ivln2lo    =  1.67517131648865118353e-10; /* 0x3de705fc, 0x2eefa200 */
 34 static const double zero   =  0.0;
 35 static volatile double vzero = 0.0;
 37 double
 38 log2(double x)  in log2()
 40 	double f,hfsq,hi,lo,r,val_hi,val_lo,w,y;  in log2()
 47 	if (hx < 0x00100000) {			/* x < 2**-1022  */  in log2()
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| /freebsd/lib/libc/softfloat/ | 
| H A D | softfloat.txt | 9 -------------------------------------------------------------------------------12 SoftFloat is a software implementation of floating-point that conforms to
 13 the IEC/IEEE Standard for Binary Floating-Point Arithmetic.  As many as four
 14 formats are supported:  single precision, double precision, extended double
 15 precision, and quadruple precision.  All operations required by the standard
 20 IEC/IEEE Floating-Point Standard.  Details about the standard are available
 24 -------------------------------------------------------------------------------
 28 SoftFloat header files assume an ISO/ANSI-style C compiler.  No attempt
 29 has been made to accommodate compilers that are not ISO-conformant.  In
 33 Support for the extended double-precision and quadruple-precision formats
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/ | 
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired.  Each count represents 2 computa…12 …-bit packed single precision floating-point instructions retired.  Each count represents 4 computa…
 21 …-bit packed double precision floating-point instructions retired.  Each count represents 4 computa…
 30 …-bit packed single precision floating-point instructions retired.  Each count represents 8 computa…
 39 … computational double precision floating-point instructions retired. Applies to SSE* and AVX*scala…
 43         "EventName": "FP_ARITH_INST_RETIRED.DOUBLE",
 48 …putational packed floating-point instructions retired. Applies to SSE* and AVX*, packed, double an…
 57 …mputational scalar floating-point instructions retired. Applies to SSE* and AVX* scalar, double an…
 66 … double precision floating-point instructions retired.  Each count represents 1 computation. Appli…
 75 …ngle precision floating-point instructions retired.  Each count represents 1 computation. Applies …
 [all …]
 
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ | 
| H A D | ARMScheduleV6.td | 1 //===-- ARMScheduleV6.td - ARM v6 Scheduling Definitions ---*- tablegen -*-===//5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 7 //===----------------------------------------------------------------------===//
 11 //===----------------------------------------------------------------------===//
 18 // Scheduling information derived from "ARM1176JZF-S Technical Reference Manual"
 191   // RunFast mode so that NFP pipeline is used for single-precision when
 197   // Single-precision FP Unary
 200   // Double-precision FP Unary
 203   // Single-precision FP Compare
 206   // Double-precision FP Compare
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/ | 
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired; some instructions will count twi…12 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 30 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 39 …double precision floating-point instructions retired; some instructions will count twice as noted …
 43         "EventName": "FP_ARITH_INST_RETIRED.DOUBLE",
 48 …ng-point instructions retired; some instructions will count twice as noted below. Applies to SSE* …
 57 …-point instructions retired; some instructions will count twice as noted below. Each count represe…
 66 …double precision floating-point instructions retired; some instructions will count twice as noted …
 75 …precision floating-point instructions retired; some instructions will count twice as noted below. …
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| /freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/ | 
| H A D | floating-point.json | 3 …-bit packed double precision floating-point instructions retired; some instructions will count twi…12 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 21 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 30 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 39 …double precision floating-point instructions retired; some instructions will count twice as noted …
 43         "EventName": "FP_ARITH_INST_RETIRED.DOUBLE",
 48 …ng-point instructions retired; some instructions will count twice as noted below. Applies to SSE* …
 57 …-point instructions retired; some instructions will count twice as noted below. Each count represe…
 66 …double precision floating-point instructions retired; some instructions will count twice as noted …
 75 …precision floating-point instructions retired; some instructions will count twice as noted below. …
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| /freebsd/contrib/libcbor/src/cbor/ | 
| H A D | floats_ctrls.h | 2  * Copyright (c) 2014-2020 Pavel Kalvoda <me@pavelkalvoda.com>40 /** Get a half precision float
 44  * @param item A half precision float
 45  * @return half precision value
 50 /** Get a single precision float
 54  * @param item A single precision float
 55  * @return single precision value
 60 /** Get a double precision float
 64  * @param item A double precision float
 65  * @return double precision value
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/ | 
| H A D | truncdfsf2vfp.S | 1 //===-- truncdfsf2vfp.S - Implement truncdfsf2vfp -------------------------===//5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 7 //===----------------------------------------------------------------------===//
 12 // extern float __truncdfsf2vfp(double a);
 14 // Converts double precision float to single precision result.
 15 // Uses Darwin calling convention where a double precision parameter is
 16 // passed in a R0/R1 pair and a single precision result is returned in R0.
 24 	vmov 	d7, r0, r1   // load double from r0/r1 pair
 25 	vcvt.f32.f64 s15, d7 // convert double to single (trucate precision)
 
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| /freebsd/lib/libpmc/pmu-events/arch/x86/ivybridge/ | 
| H A D | floating-point.json | 54 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…59 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issu…
 64 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
 69 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issu…
 74 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue…
 79 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.",
 84 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
 89 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issu…
 122 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.",
 127         "PublicDescription": "Number of assists associated with 256-bit AVX store operations.",
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| /freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/ | 
| H A D | floating-point.json | 54 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issue…59 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed double-precision uops issu…
 64 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issue…
 69 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational packed single-precision uops issu…
 74 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar double-precision uops issue…
 79 … "PublicDescription": "Counts number of SSE* or AVX-128 double precision FP scalar uops executed.",
 84 …"BriefDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issue…
 89 …"PublicDescription": "Number of SSE* or AVX-128 FP Computational scalar single-precision uops issu…
 122 … assist is being invoked whenever the hardware is unable to properly handle GSSE-256b operations.",
 127         "PublicDescription": "Number of assists associated with 256-bit AVX store operations.",
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| /freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/ | 
| H A D | floating-point.json | 93 …-bit packed double precision floating-point instructions retired; some instructions will count twi…104 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 115 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
 126 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
 137 …double precision floating-point instructions retired; some instructions will count twice as noted …
 148 …precision floating-point instructions retired; some instructions will count twice as noted below. …
 
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| /freebsd/contrib/arm-optimized-routines/math/aarch64/experimental/ | 
| H A D | sinh_3u.c | 2  * Double-precision sinh(x) function.4  * Copyright (c) 2022-2024, Arm Limited.
 5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
 18 /* Approximation for double-precision sinh(x) using expm1.
 19    sinh(x) = (exp(x) - exp(-x)) / 2.
 21    __v_sinh(0x1.9fb1d49d1d58bp-2) got 0x1.ab34e59d678dcp-2
 22 				 want 0x1.ab34e59d678d9p-2.  */
 23 double
 24 sinh (double x)  in sinh()
 28   double ax = asdouble (iax);  in sinh()
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