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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_ddc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/i2c.h>
65 static inline void sif_set_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_set_bit() argument
68 writel(readl(ddc->regs + offset) | val, ddc->regs + offset); in sif_set_bit()
71 static inline void sif_clr_bit(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_clr_bit() argument
74 writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset); in sif_clr_bit()
77 static inline bool sif_bit_is_set(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_bit_is_set() argument
80 return (readl(ddc->regs + offset) & val) == val; in sif_bit_is_set()
83 static inline void sif_write_mask(struct mtk_hdmi_ddc *ddc, unsigned int offset, in sif_write_mask() argument
89 tmp = readl(ddc->regs + offset); in sif_write_mask()
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/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,hdmi-ddc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek HDMI DDC
10 - CK Hu <ck.hu@mediatek.com>
11 - Jitao shi <jitao.shi@mediatek.com>
14 The HDMI DDC i2c controller is used to interface with the HDMI DDC pins.
19 - mediatek,mt7623-hdmi-ddc
20 - mediatek,mt8167-hdmi-ddc
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/linux/drivers/gpu/drm/mgag200/
H A Dmgag200_ddc.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
30 #include <linux/i2c-algo-bit.h>
31 #include <linux/i2c.h>
76 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setsda() local
78 mga_i2c_set(ddc->mdev, ddc->data, state); in mgag200_ddc_algo_bit_data_setsda()
83 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_setscl() local
85 mga_i2c_set(ddc->mdev, ddc->clock, state); in mgag200_ddc_algo_bit_data_setscl()
90 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getsda() local
92 return (mga_i2c_read_gpio(ddc->mdev) & ddc->data) ? 1 : 0; in mgag200_ddc_algo_bit_data_getsda()
97 struct mgag200_ddc *ddc = data; in mgag200_ddc_algo_bit_data_getscl() local
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/linux/drivers/video/fbdev/matrox/
H A Di2c-matroxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
16 #include <linux/i2c.h>
18 #include <linux/i2c-algo-bit.h>
20 /* MGA-TVO I2C for G200, G400 */
23 /* primary head DDC for Mystique(?), G100, G200, G400 */
26 /* primary head DDC for Millennium, Millennium II */
29 /* secondary head DDC for G400 */
63 /* software I2C functions */
74 matroxfb_i2c_set(b->minfo, b->mask.data, state); in matroxfb_gpio_setsda()
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/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Pinctrl-based I2C Bus Mux
10 - Wolfram Sang <wsa@kernel.org>
13 This binding describes an I2C bus multiplexer that uses pin multiplexing to route the I2C
17 +-----+ +-----+
19 +------------------------+ +-----+ +-----+
21 | /----|------+--------+
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/linux/drivers/gpu/drm/ast/
H A Dast_ddc.c1 // SPDX-License-Identifier: MIT
13 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/i2c.h>
42 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setsda() local
43 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setsda()
58 struct ast_ddc *ddc = data; in ast_ddc_algo_bit_data_setscl() local
59 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_setscl()
74 struct ast_ddc *ddc = i2c_get_adapdata(adapter); in ast_ddc_algo_bit_data_pre_xfer() local
75 struct ast_device *ast = ddc->ast; in ast_ddc_algo_bit_data_pre_xfer()
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_i2c_hw.c32 dce_i2c_hw->ctx
34 dce_i2c_hw->regs->reg
38 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
56 DC_I2C_TRANSACTION_COUNT, dce_i2c_hw->transaction_count - 1); in execute_transaction()
58 /* start I2C transfer */ in execute_transaction()
64 dce_i2c_hw->transaction_count = 0; in execute_transaction()
65 dce_i2c_hw->buffer_used_bytes = 0; in execute_transaction()
77 else if (value & dce_i2c_hw->masks->DC_I2C_SW_STOPPED_ON_NACK) in get_channel_status()
79 else if (value & dce_i2c_hw->masks->DC_I2C_SW_TIMEOUT) in get_channel_status()
81 else if (value & dce_i2c_hw->masks->DC_I2C_SW_ABORTED) in get_channel_status()
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H A Ddce_i2c_sw.c36 dce_i2c_sw->ctx = ctx; in dce_i2c_sw_construct()
40 struct ddc *ddc, in read_bit_from_ddc() argument
46 dal_gpio_get_value(ddc->pin_data, &value); in read_bit_from_ddc()
48 dal_gpio_get_value(ddc->pin_clock, &value); in read_bit_from_ddc()
54 struct ddc *ddc, in write_bit_to_ddc() argument
61 dal_gpio_set_value(ddc->pin_data, value); in write_bit_to_ddc()
63 dal_gpio_set_value(ddc->pin_clock, value); in write_bit_to_ddc()
70 dal_ddc_close(dce_i2c_sw->ddc); in release_engine_dce_sw()
71 dce_i2c_sw->ddc = NULL; in release_engine_dce_sw()
76 struct ddc *ddc, in wait_for_scl_high_sw() argument
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/linux/drivers/gpu/drm/bridge/
H A Ddisplay-connector.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/i2c.h>
9 #include <linux/media-bus-format.h>
39 return flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR ? 0 : -EINVAL; in display_connector_attach()
47 if (conn->hpd_gpio) { in display_connector_detect()
48 if (gpiod_get_value_cansleep(conn->hpd_gpio)) in display_connector_detect()
54 if (conn->bridge.ddc && drm_probe_ddc(conn->bridge.ddc)) in display_connector_detect()
57 switch (conn->bridge.type) { in display_connector_detect()
64 * For DVI and HDMI connectors a DDC probe failure indicates in display_connector_detect()
74 * Composite and S-Video connectors have no other detection in display_connector_detect()
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/linux/drivers/gpu/drm/rockchip/
H A Drk3066_hdmi.c1 // SPDX-License-Identifier: GPL-2.0
4 * Zheng Yang <zhengyang@rock-chips.com>
37 struct mutex i2c_lock; /* For i2c operation. */
52 struct rk3066_hdmi_i2c *i2c; member
53 struct i2c_adapter *ddc; member
74 return readl_relaxed(hdmi->regs + offset); in hdmi_readb()
79 writel_relaxed(val, hdmi->regs + offset); in hdmi_writeb()
95 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE; in rk3066_hdmi_i2c_init()
117 DRM_DEV_DEBUG(hdmi->dev, "mode :%d\n", mode); in rk3066_hdmi_set_power_mode()
118 DRM_DEV_DEBUG(hdmi->dev, "current_mode :%d\n", current_mode); in rk3066_hdmi_set_power_mode()
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H A Dinno_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Zheng Yang <zhengyang@rock-chips.com>
5 * Yakir Yang <ykk@rock-chips.com>
65 struct inno_hdmi_i2c *i2c; member
66 struct i2c_adapter *ddc; member
100 * Cb = -0.291G - 0.148R + 0.439B + 128
102 * Cr = -0.368G + 0.439R - 0.071B + 128
111 * Cb = - 0.338G - 0.101R + 0.439B + 128
113 * Cr = - 0.399G + 0.439R - 0.040B + 128
122 * R' = R x (235-16)/255 + 16;
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-tamonten.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 rtc0 = "/i2c@7000d000/tps6586x@34";
15 stdout-path = "serial0:115200n8";
24 vdd-supply = <&hdmi_vdd_reg>;
25 pll-supply = <&hdmi_pll_reg>;
27 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
34 pinctrl-names = "default";
35 pinctrl-0 = <&state_default>;
213 nvidia,pins = "ddc", "dta", "dtd", "kbca",
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H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20-cpu-opp.dtsi"
8 #include "tegra20-cpu-opp-microvolt.dtsi"
15 rtc0 = "/i2c@7000d000/tps6586x@34";
21 stdout-path = "serial0:115200n8";
40 vdd-supply = <&hdmi_vdd_reg>;
41 pll-supply = <&hdmi_pll_reg>;
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H A Dtegra20-seaboard.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
12 rtc0 = "/i2c@7000d000/tps6586x@34";
18 stdout-path = "serial0:115200n8";
37 vdd-supply = <&hdmi_vdd_reg>;
38 pll-supply = <&hdmi_pll_reg>;
39 hdmi-supply = <&vdd_hdmi>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 bindings for the platform-specific integrations of the DWC HDMI TX.
26 reg-io-width:
36 - description: The bus clock for either AHB and APB
37 - description: The internal register configuration clock
40 clock-names:
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/linux/Documentation/devicetree/bindings/display/connector/
H A Dvga-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/vga-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: vga-connector
18 ddc-i2c-bus:
19 description: phandle link to the I2C controller used for DDC EDID probing
27 - compatible
28 - port
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H A Dhdmi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/hdmi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: hdmi-connector
19 - a # Standard full size
20 - b # Never deployed?
21 - c # Mini
22 - d # Micro
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H A Ddvi-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dvi-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
14 const: dvi-connector
18 hpd-gpios:
22 ddc-i2c-bus:
23 description: phandle link to the I2C controller used for DDC EDID probing
34 dual-link:
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
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/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_ddc.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
39 ddc->shifts->field_name, ddc->masks->field_name
42 ddc->base.base.ctx
44 (ddc->regs->reg)
51 dal_hw_gpio_destruct(&pin->base); in dal_hw_ddc_destruct()
70 struct hw_ddc *ddc = HW_DDC_FROM_BASE(ptr); in set_config() local
77 hw_gpio = &ddc->base; in set_config()
89 switch (config_data->config.ddc.type) { in set_config()
91 /* On plug-in, there is a transient level on the pad in set_config()
92 * which must be discharged through the internal pull-down. in set_config()
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/linux/drivers/gpu/drm/display/
H A Ddrm_dp_dual_mode_helper.c26 #include <linux/i2c.h>
40 * Adaptor registers (if any) and the sink DDC bus may be accessed via I2C.
43 * Adaptor registers and sink DDC bus can be accessed either via I2C or
44 * I2C-over-AUX. Source devices may choose to implement either of these
51 * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s)
52 * @adapter: I2C adapter for the DDC bus
69 * As sub-addressing is not supported by all adaptors, in drm_dp_dual_mode_read()
94 return -ENOMEM; in drm_dp_dual_mode_read()
108 return -EPROTO; in drm_dp_dual_mode_read()
115 * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s)
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/linux/drivers/gpu/drm/tegra/
H A Doutput.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/i2c.h>
19 #include <media/cec-notifier.h>
31 if (output->panel) { in tegra_output_connector_get_modes()
32 err = drm_panel_get_modes(output->panel, connector); in tegra_output_connector_get_modes()
37 if (output->drm_edid) in tegra_output_connector_get_modes()
38 drm_edid = drm_edid_dup(output->drm_edid); in tegra_output_connector_get_modes()
39 else if (output->ddc) in tegra_output_connector_get_modes()
40 drm_edid = drm_edid_read_ddc(connector, output->ddc); in tegra_output_connector_get_modes()
43 cec_notifier_set_phys_addr(output->cec, in tegra_output_connector_get_modes()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_sdvo.c3 * Copyright © 2006-2007 Intel Corporation
31 #include <linux/i2c.h>
65 #define IS_TV(c) ((c)->output_flag & SDVO_TV_MASK)
66 #define IS_TMDS(c) ((c)->output_flag & SDVO_TMDS_MASK)
67 #define IS_LVDS(c) ((c)->output_flag & SDVO_LVDS_MASK)
68 #define IS_TV_OR_LVDS(c) ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
69 #define IS_DIGITAL(c) ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
71 #define HAS_DDC(c) ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
89 struct i2c_adapter ddc; member
97 struct i2c_adapter *i2c; member
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_connectors.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
42 struct drm_device *dev = connector->dev; in radeon_connector_hotplug()
43 struct radeon_device *rdev = dev->dev_private; in radeon_connector_hotplug()
49 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) in radeon_connector_hotplug()
52 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); in radeon_connector_hotplug()
56 if (connector->dpms != DRM_MODE_DPMS_ON) in radeon_connector_hotplug()
60 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in radeon_connector_hotplug()
62 radeon_connector->con_priv; in radeon_connector_hotplug()
65 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in radeon_connector_hotplug()
69 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); in radeon_connector_hotplug()
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_connectors.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
45 struct drm_device *dev = connector->dev; in amdgpu_connector_hotplug()
52 if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) in amdgpu_connector_hotplug()
55 amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); in amdgpu_connector_hotplug()
58 if (connector->dpms != DRM_MODE_DPMS_ON) in amdgpu_connector_hotplug()
62 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in amdgpu_connector_hotplug()
64 amdgpu_connector->con_priv; in amdgpu_connector_hotplug()
67 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in amdgpu_connector_hotplug()
71 dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector); in amdgpu_connector_hotplug()
73 * passive dp->(dvi|hdmi) adaptor in amdgpu_connector_hotplug()
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