Searched full:cxl_mem (Results 1 – 11 of 11) sorted by relevance
65 "host":"cxl_mem.1"77 "host":"cxl_mem.5"95 "host":"cxl_mem.7"107 "host":"cxl_mem.3"131 "host":"cxl_mem.0"143 "host":"cxl_mem.4"161 "host":"cxl_mem.6"173 "host":"cxl_mem.2"244 "host":"cxl_mem.2"271 "host":"cxl_mem.0"[all …]
25 select CXL_MEM92 config CXL_MEM config121 depends on CXL_MEM142 When enabled 'cxl_mem' and 'cxl_region' EDAC devices are160 When enabled 'cxl_mem' EDAC devices are published with memory181 When enabled 'cxl_mem' EDAC devices are published with memory195 depends on SUSPEND && CXL_MEM
14 obj-$(CONFIG_CXL_MEM) += cxl_mem.o20 cxl_mem-y := mem.o
48 obj-m += cxl_mem.o50 cxl_mem-y := $(CXL_SRC)/mem.o51 cxl_mem-y += config_check.o52 cxl_mem-y += cxl_mem_test.o
6 cxl_test_watermark(cxl_mem);
49 struct platform_device *cxl_mem[NR_MEM_MULTI]; variable 124 for (i = 0; i < ARRAY_SIZE(cxl_mem); i++) in is_mock_dev() 125 if (dev == &cxl_mem[i]->dev) in is_mock_dev() 1136 * assignment those devices are named cxl_mem.0, and cxl_mem.4. in mock_init_hdm_decoder() 1138 * See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4' in mock_init_hdm_decoder() 1146 /* Simulate missing cxl_mem.4 configuration */ in mock_init_hdm_decoder() 1190 /* put cxl_mem.4 second in the decode order */ in mock_init_hdm_decoder() 1735 for (i = ARRAY_SIZE(cxl_mem) in cxl_mem_init() [all...]
1898 { .name = "cxl_mem", 0 },
7 #include <uapi/linux/cxl_mem.h>
721 "EventName": "OCR.DEMAND_DATA_RD.CXL_MEM",853 "EventName": "OCR.DEMAND_RFO.CXL_MEM",930 "EventName": "OCR.READS_TO_CORE.CXL_MEM",
171 and is managed by the `cxl_mem` driver. It primarily provides the `IOCTL`
23 * and implement the cxl_mem.h IOCTL UAPI. It also implements the