Searched +full:cros +full:- +full:ec +full:- +full:uart (Results 1 – 6 of 6) sorted by relevance
/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <®_vsys>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; 31 default-brightness-level = <576>; [all …]
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H A D | mt8186-corsola.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h> 26 stdout-path = "serial0:115200n8"; 35 backlight_lcd0: backlight-lcd0 { 36 compatible = "pwm-backlight"; [all …]
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H A D | mt8188-geralt.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 24 backlight_lcd0: backlight-lcd0 { 25 compatible = "pwm-backlight"; 26 brightness-levels = <0 1023>; 27 default-brightness-level = <576>; 28 enable-gpios = <&pio 1 GPIO_ACTIVE_HIGH>; 29 num-interpolated-steps = <1023>; 30 power-supply = <&ppvar_sys>; [all …]
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/linux/drivers/platform/chrome/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 26 If you have an ACPI-compatible Chromebook, say Y or M here. 47 The range of memory used is 0xf00000-0x1000000, traditionally 73 devices that have multiple drop-in options for one component. 81 Controller (EC) providing keyboard, battery and power services. 83 protocol for talking to the EC is defined by the bus driver. 94 EC through an I2C bus. This uses a simple byte-level protocol with 102 If you say Y here, you get support for talking to the ChromeOS EC 103 through rpmsg. This uses a simple byte-level protocol with a 104 checksum. Also since there's no addition EC-to-host interrupt, this [all …]
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H A D | cros_ec_debugfs.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 // Debug logs for the ChromeOS EC 21 #define DRV_NAME "cros-ec-debugfs" 27 #define CIRC_ADD(idx, size, value) (((idx) + (value)) & ((size) - 1)) 31 MODULE_PARM_DESC(log_poll_period_ms, "EC log polling period(ms)"); 37 * struct cros_ec_debugfs - EC debugging information. 39 * @ec: EC device this debugfs information belongs to 42 * @read_msg: preallocated EC command and buffer to read console log 44 * @log_poll_work: recurring task to poll EC for new console log data 47 * when EC panic [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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