/linux/Documentation/devicetree/bindings/mmc/ |
H A D | socionext,uniphier-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 16 - socionext,uniphier-sd-v2.91 17 - socionext,uniphier-sd-v3.1 18 - socionext,uniphier-sd-v3.1.1 32 dma-names: 33 const: rx-tx [all …]
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H A D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Common Properties 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers. Any host 17 It is possible to assign a fixed index mmcN to an MMC host controller 23 pattern: "^mmc(@.*)?$" 25 "#address-cells": [all …]
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H A D | sprd,sdhci-r11.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 16 const: sprd,sdhci-r11 27 - description: SDIO source clock 28 - description: gate clock for enabling/disabling the device [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368-r88.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 21 stdout-path = "serial2:115200n8"; 29 emmc_pwrseq: emmc-pwrseq { 30 compatible = "mmc-pwrseq-emmc"; 31 pinctrl-0 = <&emmc_reset>; 32 pinctrl-names = "default"; 33 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 36 keys: gpio-keys { [all …]
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H A D | px30-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 14 compatible = "rockchip,px30-evb", "rockchip,px30"; 24 stdout-path = "serial5:115200n8"; 27 adc-keys { 28 compatible = "adc-keys"; 29 io-channels = <&saradc 2>; [all …]
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H A D | rk3328-a1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 // Copyright (c) 2017-2019 Arm Ltd. 4 /dts-v1/; 9 compatible = "azw,beelink-a1", "rockchip,rk3328"; 21 * /------- 22 * L / o <- Gnd 23 * e / o <-- Rx 24 * f / o <--- Tx 25 * t / o <---- +3.3v 29 stdout-path = "serial2:1500000n8"; [all …]
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H A D | rk3328-rock64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 20 stdout-path = "serial2:1500000n8"; 23 gmac_clkin: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "gmac_clkin"; 27 #clock-cells = <0>; 30 vcc_sd: sdmmc-regulator { 31 compatible = "regulator-fixed"; [all …]
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H A D | rk3368-lba3368.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/clock/rockchip,rk808.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/sound/rt5640.h> 25 stdout-path = "serial1:115200n8"; 33 adc-key { 34 compatible = "adc-keys"; 35 io-channels = <&saradc 1>; [all …]
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H A D | rk3368-evb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/pwm/pwm.h> 17 stdout-path = "serial2:115200n8"; 26 compatible = "pwm-backlight"; 27 brightness-levels = < 60 default-brightness-level = <128>; 61 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 62 pinctrl-names = "default"; [all …]
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H A D | rk3399-leez-p710.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 24 stdout-path = "serial2:1500000n8"; 27 clkin_gmac: external-gmac-clock { 28 compatible = "fixed-clock"; 29 clock-frequency = <125000000>; 30 clock-output-names = "clkin_gmac"; [all …]
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/linux/arch/arm/boot/dts/socionext/ |
H A D | uniphier-ld4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-ld4"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a9"; [all …]
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H A D | uniphier-sld8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "socionext,uniphier-sld8"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a9"; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = "serial2:115200n8"; 31 power_button: power-button { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pwr_key_l>; 36 key-power { 40 debounce-interval = <100>; [all …]
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H A D | rk3229-xms6.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/input/input.h> 23 dc_12v: dc-12v-regulator { 24 compatible = "regulator-fixed"; 25 regulator-name = "dc_12v"; 26 regulator-always-on; 27 regulator-boot-on; 28 regulator-min-microvolt = <12000000>; 29 regulator-max-microvolt = <12000000>; [all …]
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H A D | rk3288-tinker.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/clock/rockchip,rk808.h> 12 stdout-path = "serial2:115200n8"; 20 ext_gmac: external-gmac-clock { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <125000000>; 24 clock-output-names = "ext_gmac"; 27 gpio-keys { [all …]
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H A D | rk3288-popmetal.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com> 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "PopMetal-RK3288"; 12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; 22 clock-output-names = "ext_gmac"; [all …]
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/linux/arch/arm64/boot/dts/sprd/ |
H A D | ums512-1h10.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Unisoc UMS512-1h10 boards DTS file 8 /dts-v1/; 13 model = "Unisoc UMS512-1H10 Board"; 15 compatible = "sprd,ums512-1h10", "sprd,ums512"; 28 stdout-path = "serial1:115200n8"; 42 bus-width = <4>; 43 no-sdio; 44 no-mmc; 45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>; [all …]
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/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h618-longan-module-3h.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "sun50i-h616.dtsi" 7 #include "sun50i-h616-cpu-opp.dtsi" 10 cpu-supply = <®_dcdc2>; 14 pinctrl-names = "default"; 15 pinctrl-0 = <&mmc2_pins>; 16 vmmc-supply = <®_dldo1>; 17 vqmmc-supply = <®_aldo1>; 18 bus-width = <8>; 19 non-removable; [all …]
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H A D | sun50i-h5-orangepi-zero-plus2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 /dts-v1/; 6 #include "sun50i-h5.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 12 compatible = "xunlong,orangepi-zero-plus2", "allwinner,sun50i-h5"; 19 stdout-path = "serial0:115200n8"; 23 compatible = "hdmi-connector"; 28 remote-endpoint = <&hdmi_out_con>; 34 compatible = "gpio-leds"; 36 led-0 { [all …]
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H A D | sun50i-h618-transpeed-8k618-t.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 model = "Transpeed 8K618-T"; 16 compatible = "transpeed,8k618-t", "allwinner,sun50i-h618"; 24 stdout-path = "serial0:115200n8"; 29 compatible = "regulator-fixed"; [all …]
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H A D | sun50i-a64-olinuxino-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 #include "sun50i-a64-olinuxino.dts" 8 model = "Olimex A64-Olinuxino-eMMC"; 9 compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64"; 13 pinctrl-names = "default"; 14 pinctrl-0 = <&mmc2_pins>; 15 vmmc-supply = <®_dcdc1>; 16 vqmmc-supply = <®_eldo1>; 17 bus-width = <8>; 18 non-removable; [all …]
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H A D | sun50i-h6-tanix.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 /dts-v1/; 6 #include "sun50i-h6.dtsi" 7 #include "sun50i-h6-cpu-opp.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 17 stdout-path = "serial0:115200n8"; 21 compatible = "hdmi-connector"; 22 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ 27 remote-endpoint = <&hdmi_out_con>; 34 compatible = "i2c-gpio"; [all …]
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H A D | sun50i-h313-tanix-tx1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/input/linux-event-codes.h> 13 #include <dt-bindings/leds/common.h> 17 compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616"; 25 stdout-path = "serial0:115200n8"; 28 gpio-keys { [all …]
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/linux/arch/arm/boot/dts/allwinner/ |
H A D | sunxi-h3-h5-emlid-neutis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 #include "sunxi-common-regulators.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 18 stdout-path = "serial0:115200n8"; 22 compatible = "mmc-pwrseq-simple"; 23 reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ 24 post-power-on-delay-ms = <200>; 26 clock-names = "ext_clock"; 31 cpu-supply = <&vdd_cpux>; 78 vmmc-supply = <®_vcc3v3>; [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8183-pumpkin.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 28 stdout-path = "serial0:921600n8"; 31 reserved-memory { 32 #address-cells = <2>; 33 #size-cells = <2>; 36 scp_mem_reserved: scp-mem@50000000 { [all …]
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