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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dsamsung,mipi-dsim.yaml158 - const: bus_clk
186 - const: bus_clk
206 - const: bus_clk
226 - const: bus_clk
254 clock-names = "bus_clk",
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Drockchip,dwc3.txt10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
29 "bus_clk", "grf_clk";
46 "bus_clk", "grf_clk";
H A Ddwc3-xilinx.txt8 "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
38 clock-names = "bus_clk", "ref_clk";
H A Drockchip,dwc3.yaml69 - const: bus_clk
110 - const: bus_clk
135 - const: bus_clk
155 "bus_clk", "grf_clk";
H A Drockchip,rk3399-dwc3.yaml44 - const: bus_clk
90 "bus_clk", "aclk_usb3_rksoc_axi_perf",
H A Ddwc3-xilinx.yaml45 - const: bus_clk
117 clock-names = "bus_clk", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dmdp4.yaml27 - const: bus_clk
83 "bus_clk",
H A Dmdp4.txt18 * "bus_clk"
/freebsd/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dsim.txt14 - clock-names: should include "bus_clk"and "sclk_mipi" entries
49 clock-names = "bus_clk", "sclk_mipi";
/freebsd/sys/x86/cpufreq/
H A Dest.c85 #define ID16(MHz, mV, bus_clk) \ argument
86 (((MHz / bus_clk) << 8) | ((mV ? mV - 700 : 0) >> 4))
87 #define ID32(MHz_hi, mV_hi, MHz_lo, mV_lo, bus_clk) \ argument
88 ((ID16(MHz_lo, mV_lo, bus_clk) << 16) | (ID16(MHz_hi, mV_hi, bus_clk)))
91 #define FREQ_INFO_PWR(MHz, mV, bus_clk, mW) \ argument
92 { MHz, mV, ID16(MHz, mV, bus_clk), mW }
93 #define FREQ_INFO(MHz, mV, bus_clk) \ argument
94 FREQ_INFO_PWR(MHz, mV, bus_clk, CPUFREQ_VAL_UNKNOWN)
95 #define INTEL(tab, zhi, vhi, zlo, vlo, bus_clk) \ argument
96 { CPU_VENDOR_INTEL, ID32(zhi, vhi, zlo, vlo, bus_clk), tab, nitems(tab) }
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/freebsd/sys/dev/usb/controller/dwc3/
H A Drk_dwc3.c129 if (clk_get_by_ofw_name(dev, 0, "bus_clk", &sc->clk_bus) != 0) { in rk_dwc3_attach()
130 device_printf(dev, "Cannot get bus_clk clock\n"); in rk_dwc3_attach()
H A Ddwc3.c455 if (clk_get_by_ofw_name(dev, node, "bus_clk", &sc->clk_bus) != 0) in snps_dwc3_common_attach()
456 device_printf(dev, "Cannot get bus_clk\n"); in snps_dwc3_common_attach()
469 device_printf(dev, "Cannot enable bus_clk\n"); in snps_dwc3_common_attach()
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Djcore,spi.txt32 clocks = <&bus_clk>;
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmtk-sd.yaml229 - const: bus_clk
263 - const: bus_clk
H A Dmtk-sd.txt29 "bus_clk" - bus clock used for internal register access (required for MT2712 MSDC0/3)
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Dmtk-uart.txt54 clocks = <&uart_clk>, <&bus_clk>;
H A Dmediatek,uart.yaml117 clocks = <&uart_clk>, <&bus_clk>;
/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dinterconnect.txt31 clock-names = "bus_clk", "bus_a_clk";
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dqcom,ufs.yaml197 - const: bus_clk
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7986a.dtsi386 clock-names = "source", "hclk", "source_cg", "bus_clk",
H A Dmt8365.dtsi690 "bus_clk", "sys_cg";
H A Dmt2712e.dtsi770 clock-names = "source", "hclk", "source_cg", "bus_clk";
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos3250.dtsi524 clock-names = "bus_clk", "pll_clk";
H A Dexynos4.dtsi198 clock-names = "bus_clk", "sclk_mipi";
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk356x.dtsi289 "bus_clk";
305 "bus_clk";

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