1*c66ec88fSEmmanuel VadotJ-Core SPI master 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot- compatible: Must be "jcore,spi2". 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot- reg: Memory region for registers. 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot- #address-cells: Must be 1. 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot- #size-cells: Must be 0. 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotOptional properties: 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot- clocks: If a phandle named "ref_clk" is present, SPI clock speed 16*c66ec88fSEmmanuel Vadot programming is relative to the frequency of the indicated clock. 17*c66ec88fSEmmanuel Vadot Necessary only if the input clock rate is something other than a 18*c66ec88fSEmmanuel Vadot fixed 50 MHz. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot- clock-names: Clock names, one for each phandle in clocks. 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel VadotSee spi-bus.txt for additional properties not specific to this device. 23*c66ec88fSEmmanuel Vadot 24*c66ec88fSEmmanuel VadotExample: 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadotspi@40 { 27*c66ec88fSEmmanuel Vadot compatible = "jcore,spi2"; 28*c66ec88fSEmmanuel Vadot #address-cells = <1>; 29*c66ec88fSEmmanuel Vadot #size-cells = <0>; 30*c66ec88fSEmmanuel Vadot reg = <0x40 0x8>; 31*c66ec88fSEmmanuel Vadot spi-max-frequency = <25000000>; 32*c66ec88fSEmmanuel Vadot clocks = <&bus_clk>; 33*c66ec88fSEmmanuel Vadot clock-names = "ref_clk"; 34*c66ec88fSEmmanuel Vadot} 35