| /linux/tools/perf/pmu-events/arch/powerpc/power10/ |
| H A D | metrics.json | 10 "BriefDescription": "Average cycles per completed instruction",
16 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled for any re…
22 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled because th…
28 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled because Fe…
34 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled because th…
40 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled waiting to…
46 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled waiting to…
52 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled due to an …
58 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled while the …
64 …"BriefDescription": "Average cycles per completed instruction when dispatch was stalled while the …
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| /linux/Documentation/devicetree/bindings/input/ |
| H A D | microchip,qt1050.txt | 1 Microchip AT42QT1050 Five-channel Touch Sensor IC
4 one to five keys, dependent on mode. The QT1050 includes all signal processing
11 - compatible: Must be "microchip,qt1050"
12 - reg: The I2C address of the device
13 - interrupts: The sink for the touchpad's IRQ output,
14 see ../interrupt-controller/interrupts.txt
17 - wakeup-source: touch keys can be used as a wakeup source
19 Each button (key) is represented as a sub-node:
25 - linux,code: Keycode to emit.
26 - reg: The key number. Valid values: 0, 1, 2, 3, 4.
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| /linux/Documentation/hwmon/ |
| H A D | lochnagar.rst | 10 -----------
12 Lochnagar 2 features built-in Current Monitor circuitry that allows for the
13 measurement of both voltage and current on up to eight of the supply voltage
22 ----------------
30 power1_average Measured average power for DBVDD1 (microWatts)
37 power2_average Measured average power for 1V8 DSP (microWatts)
44 power3_average Measured average power for 1V8 CDC (microWatts)
51 power4_average Measured average power for VDDCORE DSP (microWatts)
58 power5_average Measured average power for AVDD 1V8 (microWatts)
63 power6_average Measured average power for SYSVDD (microWatts)
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| H A D | lm25066.rst | 10 Addresses scanned: -
22 Addresses scanned: -
34 Addresses scanned: -
44 Addresses scanned: -
54 Addresses scanned: -
61 Author: Guenter Roeck <linux@roeck-us.net>
65 -----------
72 Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
76 -----------
78 This driver does not auto-detect devices. You will have to instantiate the
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| H A D | sysfs-interface.rst | 5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
14 temperature sensor is connected to the CPU, or that the second fan is on
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
53 than once, even if there is a single element of the given type on the
61 to cause an alarm) is chip-dependent.
65 are interpreted as 0! For more on how written strings are interpreted see the
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| /linux/Documentation/translations/zh_CN/accounting/ |
| H A D | delay-accounting.rst | 1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: Documentation/accounting/delay-accounting.rst
37 ----
58 ----
78 getdelays [-dilv] [-t tgid] [-p pid]
82 # ./getdelays -d -p 10
87 # ./getdelays -d -t 5
88 print delayacct stats ON
92 CPU count real total virtual total delay total delay average
94 IO count delay total delay average
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| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-memory.json | 8 …: "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this channel.…
19 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
30 … the number of DRAM Activate commands sent on this channel. Activate commands are issued to open …
41 … the number of DRAM Activate commands sent on this channel. Activate commands are issued to open …
51 "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.",
61 …: "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this channel.…
66 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre",
72 …-pre : DRAM RD_CAS and WR_CAS Commands : Counts the total number or DRAM Read CAS commands issued …
94 …nds issued on this channel. This includes both regular RD CAS commands as well as those with impl…
115 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.",
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|
| /linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-interconnect.json | 48 …cle. This can be used with the write transaction count to calculate the average write latency in …
58 …cle. This can be used with the write transaction count to calculate the average write latency in …
68 …ycle. This can be used with the read transaction count to calculate the average read latency in t…
78 …ycle. This can be used with the read transaction count to calculate the average read latency in t…
108 …cle. This can be used with the transaction count event to calculate the average latency in the un…
118 …cle. This can be used with the transaction count event to calculate the average latency in the un…
164 "BriefDescription": "BL Ingress Occupancy - DRS",
189 "BriefDescription": "BL Ingress Occupancy - NCB",
214 "BriefDescription": "BL Ingress Occupancy - NCS",
236 …ny requests behind it in the switch queue will lose ownership and have to re-acquire it later when…
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|
| H A D | ivt-metrics.json | 4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
59 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
78 …sible; which incur a few cycles load re-issue. However; the short re-issue duration is often hidde…
82 …"BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on executi…
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| /linux/Documentation/accounting/ |
| H A D | delay-accounting.rst | 7 runnable task may wait for a free CPU to run on.
9 The per-task delay accounting functionality measures
18 g) write-protect copy
35 statistics of a task are available both during its lifetime as well as on its
40 ---------
44 generic data structure to userspace corresponding to per-pid and per-tgid
53 cache, direct compact, write-protect copy, IRQ/SOFTIRQ etc.
60 When a task exits, records containing the per-task statistics
62 task of a thread group, the per-tgid statistics are also sent. More details
70 -----
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| /linux/tools/perf/bench/ |
| H A D | synthesize.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * record'. Synthesis is done on the current process and the 'dummy' event
14 #include "../util/synthetic-events.h"
22 #include <subcmd/parse-options.h>
33 OPT_BOOLEAN('t', "mt", &run_mt, "Run multi-threaded benchmark"),
34 OPT_UINTEGER('m', "min-threads", &min_threads,
36 OPT_UINTEGER('M', "max-threads", &max_threads,
38 OPT_UINTEGER('i', "single-iterations", &single_iterations,
39 "Number of iterations used to compute single-threaded average"),
40 OPT_UINTEGER('I', "multi-iterations", &multi_iterations,
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|
| /linux/tools/perf/pmu-events/arch/powerpc/power8/ |
| H A D | metrics.json | 46 "MetricExpr": "(PM_BR_MPRED_TA - PM_BR_MPRED_CCACHE) / PM_RUN_INST_CMPL * 100",
52 …"MetricExpr": "(PM_BR_MPRED_TA - PM_BR_MPRED_CCACHE) / (PM_BR_PRED_LSTACK_BR0 + PM_BR_PRED_LSTACK_…
124 "MetricExpr": "(PM_CMPLU_STALL_BRU_CRU - PM_CMPLU_STALL_BRU) / PM_RUN_INST_CMPL",
135 "BriefDescription": "Cycles stalled by FXU Multi-Cycle Instructions",
148 …"MetricExpr": "(PM_CMPLU_STALL_FXU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_FXLONG / PM_RUN_INST_CMPL…
208 "MetricExpr": "(PM_GCT_NOSLOT_IC_MISS - PM_GCT_NOSLOT_IC_L3MISS) / PM_RUN_INST_CMPL",
213 … "BriefDescription": "Cycles stalled by GCT empty due to Icache misses that resolve off-chip",
220 …L) - (PM_GCT_NOSLOT_IC_MISS / PM_RUN_INST_CMPL) - (PM_GCT_NOSLOT_BR_MPRED / PM_RUN_INST_CMPL) - (…
237 "BriefDescription": "Cycles stalled by D-Cache Misses",
243 …"BriefDescription": "Cycles stalled by D-Cache Misses that resolved in distant interventions and m…
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|
| /linux/tools/perf/pmu-events/arch/x86/jaketown/ |
| H A D | uncore-memory.json | 8 … the number of DRAM Activate commands sent on this channel. Activate commands are issued to open …
12 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)",
30 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)",
57 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read…
66 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Writ…
79 "PublicDescription": "Uncore Fixed Counter - uclks",
117 …"PublicDescription": "Counts the number of ECC errors detected and corrected by the iMC on this ch…
126 …nt in a major mode (selected by a filter) on the given channel. Major modea are channel-wide, an…
136 …nt in a major mode (selected by a filter) on the given channel. Major modea are channel-wide, an…
146 …nt in a major mode (selected by a filter) on the given channel. Major modea are channel-wide, an…
[all …]
|
| H A D | uncore-interconnect.json | 48 …cle. This can be used with the write transaction count to calculate the average write latency in …
58 …cle. This can be used with the write transaction count to calculate the average write latency in …
68 …ycle. This can be used with the read transaction count to calculate the average read latency in t…
78 …ycle. This can be used with the read transaction count to calculate the average read latency in t…
108 …cle. This can be used with the transaction count event to calculate the average latency in the un…
118 …cle. This can be used with the transaction count event to calculate the average latency in the un…
164 "BriefDescription": "BL Ingress Occupancy - DRS",
189 "BriefDescription": "BL Ingress Occupancy - NCB",
214 "BriefDescription": "BL Ingress Occupancy - NCS",
256 …on request type in addition to the source queue. Note the special filtering equation. We do OR-r…
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|
| /linux/drivers/gpu/drm/amd/include/ |
| H A D | kgd_pp_interface.h | 170 PP_SMC_POWER_PROFILE_UNKNOWN = -1,
240 * APU power is managed to system-level requirements through the PPT
250 * enum pp_power_limit_level - Used to query the power limits
258 PP_PWR_LIMIT_MIN = -1,
265 * enum pp_power_type - Used to specify the type of the requested power
268 * moving average of APU power (default ~5000 ms).
269 * @PP_PWR_TYPE_FAST: manages the ~10 ms moving average of APU power,
278 XGMI_PLPD_NONE = -1,
286 PP_PM_POLICY_NONE = -1,
398 /* export for dpm on ci and si */
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|
| /linux/tools/perf/pmu-events/arch/x86/haswellx/ |
| H A D | uncore-interconnect.json | 111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
[all...] |
| H A D | hsx-metrics.json | 4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
164 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
170 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
176 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/broadwellx/ |
| H A D | uncore-interconnect.json | 111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
156 "PublicDescription": "Counts Timeouts - Se
[all...] |
| H A D | bdx-metrics.json | 4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
164 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
170 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
176 …"BriefDescription": "Average latency of a last level cache (LLC) demand and prefetch data read mis…
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|
| /linux/tools/perf/Documentation/ |
| H A D | perf-report.txt | 1 perf-report(1)
5 ----
6 perf-report - Read perf.data (created by perf record) and display the profile
9 --------
11 'perf report' [-i <file> | --input=file]
14 -----------
19 -------
20 -i::
21 --input=::
24 -v::
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|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | spr-metrics.json | 4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
18 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
210 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
216 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
222 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
228 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
234 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
312 …"BriefDescription": "Uops delivered from legacy decode pipeline (Micro-instruction Translation Eng…
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|
| /linux/tools/perf/pmu-events/arch/x86/haswell/ |
| H A D | hsw-metrics.json | 4 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
11 "MetricExpr": "cstate_core@c3\\-residency@ / TSC",
18 "MetricExpr": "cstate_pkg@c3\\-residency@ / TSC",
25 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
32 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
39 "MetricExpr": "cstate_core@c7\\-residency@ / TSC",
46 "MetricExpr": "cstate_pkg@c7\\-residency@ / TSC",
59 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
78 …sible; which incur a few cycles load re-issue. However; the short re-issue duration is often hidde…
82 …"BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on executi…
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|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | emr-metrics.json | 4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
18 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
198 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
204 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
210 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
216 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
270 …"BriefDescription": "Uops delivered from legacy decode pipeline (Micro-instruction Translation Eng…
283 "MetricExpr": "((msr@aperf@ - cycles) / msr@aperf@ if msr@smi@ > 0 else 0)",
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|
| /linux/tools/perf/pmu-events/arch/x86/graniterapids/ |
| H A D | gnr-metrics.json | 4 "MetricExpr": "cstate_core@c1\\-residency@ / TSC",
11 "MetricExpr": "cstate_pkg@c2\\-residency@ / TSC",
18 "MetricExpr": "cstate_core@c6\\-residency@ / TSC",
25 "MetricExpr": "cstate_pkg@c6\\-residency@ / TSC",
43 …"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power co…
49 …"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control…
226 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
232 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
238 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
244 …"BriefDescription": "Average latency of a last level cache (LLC) demand data read miss (read memor…
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|
| /linux/drivers/net/wireless/ti/wlcore/ |
| H A D | conf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
117 * Range: 0 - 0xFFFFFFFF
130 * after a PS-poll has been transmitted.
132 * Range: 0 - 200000
139 * Range: 0 - 200000
147 * Range: 0 - 4096
161 * Occupied Rx mem-blocks number which requires interrupting the host
177 * Max time in msec the FW may delay RX-Complete interrupt.
179 * Range: 1 - 100
203 * of the 22Mbps rate. There is a FW limitation on 12 rates so we must drop
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|