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/linux/arch/alpha/include/asm/
H A Dpal.h30 #define __CALL_PAL_W1(NAME, TYPE0) \ argument
31 extern inline void NAME(TYPE0 arg0) \
33 register TYPE0 __r16 __asm__("$16") = arg0; \
41 #define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \ argument
42 extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
44 register TYPE0 __r16 __asm__("$16") = arg0; \
53 #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \ argument
54 extern inline RTYPE NAME(TYPE0 arg0) \
57 register TYPE0 __r16 __asm__("$16") = arg0; \
66 #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \ argument
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/linux/Documentation/devicetree/bindings/pci/
H A Dmediatek,mt7621-pcie.yaml37 Type0 | Type0 | Type0 |
/linux/drivers/gpio/
H A Dgpio-aspeed-sgpio.c335 u32 type0 = 0; in aspeed_sgpio_set_type() local
353 type0 |= bit; in aspeed_sgpio_set_type()
359 type0 |= bit; in aspeed_sgpio_set_type()
373 reg = (reg & ~bit) | type0; in aspeed_sgpio_set_type()
H A Dgpio-aspeed.c607 u32 type0 = 0; in aspeed_gpio_set_type() local
628 type0 |= bit; in aspeed_gpio_set_type()
634 type0 |= bit; in aspeed_gpio_set_type()
649 reg = (reg & ~bit) | type0; in aspeed_gpio_set_type()
/linux/arch/powerpc/platforms/chrp/
H A Dsetup.c179 u8 level0, type0, active; in sio_fixup_irq() local
185 type0 = sio_read(0x71); in sio_fixup_irq()
186 if (level0 != level || type0 != type || !active) { in sio_fixup_irq()
189 name, level0, type0, !active ? "in" : "", level, type); in sio_fixup_irq()
/linux/arch/powerpc/include/asm/
H A Dpci-bridge.h92 * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
96 * to determine which bus number to match on when generating type0
/linux/drivers/net/ethernet/fungible/funcore/
H A Dfun_dev.h127 int fun_bind(struct fun_dev *fdev, enum fun_admin_bind_type type0,
H A Dfun_dev.c545 int fun_bind(struct fun_dev *fdev, enum fun_admin_bind_type type0, in fun_bind() argument
553 cmd->entry[0] = FUN_ADMIN_BIND_ENTRY_INIT(type0, id0); in fun_bind()
/linux/tools/testing/selftests/efivarfs/
H A Defivarfs.sh154 local file_list="abc dump-type0-11-1-1362436005 1234 -"
/linux/drivers/pci/controller/
H A Dpcie-rcar.h15 #define TYPE0 (0 << 8) macro
H A Dpcie-rcar-host.c212 rcar_pci_write_reg(pcie, PCIECCTLR_CCIE | TYPE0, PCIECCTLR); in rcar_pcie_config_access()
/linux/include/drm/display/
H A Ddrm_hdcp.h54 * - Type0: Can be transmitted with HDCP 1.4+
/linux/drivers/gpu/drm/display/
H A Ddrm_hdcp_helper.c319 { DRM_MODE_HDCP_CONTENT_TYPE0, "HDCP Type0" },
/linux/include/linux/ssb/
H A Dssb_regs.h671 #define SSB_ADM_SZ0 0x000000F8 /* Type0 size */
679 #define SSB_ADM_BASE0 0xFFFFFF00 /* Type0 base address */
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pip-defs.h2568 uint64_t type0:16; member
2570 uint64_t type0:16;
/linux/drivers/net/ethernet/ti/
H A Ddavinci_emac.c1021 * emac_set_type0addr - Set EMAC Type0 mac address
1026 * Called internally to set Type0 mac address of the adapter (Device)
/linux/drivers/gpu/drm/
H A Ddrm_connector.c1441 * "HDCP Type0" or "HDCP Type1".
1444 * - "HDCP Type0": DRM_MODE_HDCP_CONTENT_TYPE0 = 0
1462 * that content to a HDCP 1.4 authenticated HDCP sink (Type0 link).
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_types.h574 * Content Stream Type defined by content owner. TYPE0(0x0) content can
/linux/drivers/pinctrl/
H A Dpinctrl-rockchip.c108 #define PIN_BANK_DRV_FLAGS(id, pins, label, type0, type1, type2, type3) \ argument
120 { .drv_type = type0, .offset = -1 }, \
/linux/drivers/usb/musb/
H A Dmusb_host.c2200 /* precompute rxtype/txtype/type0 register */ in musb_urb_enqueue()
/linux/drivers/net/ethernet/sun/
H A Dcassini.h467 txdma rd type0
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c8486 pr_debug("[HDCP_DM] Type0/1 change %s :true\n", __func__); in is_content_protection_different()