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/freebsd/sys/contrib/device-tree/Bindings/dma/xilinx/
H A Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one o
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/freebsd/contrib/ofed/libibverbs/man/
H A Dibv_get_cq_event.31 .\" -*- nroff -*-
2 .\" Licensed under the OpenIB.org BSD license (FreeBSD Variant) - See COPYING.md
4 .TH IBV_GET_CQ_EVENT 3 2006-10-31 libibverbs "Libibverbs Programmer's Manual"
6 ibv_get_cq_event, ibv_ack_cq_events \- get and acknowledge completion queue (CQ) events
12 .BI "int ibv_get_cq_event(struct ibv_comp_channel " "*channel" ,
20 waits for the next completion event in the completion event channel
21 .I channel\fR.
36 returns 0 on success, and \-1 on error.
46 be acknowledged; this guarantees a one-to-one correspondence between
54 acking several completion events in one call to
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/freebsd/share/man/man4/
H A Dpwmc.435 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
49 driver provides device-control access to a channel of PWM hardware.
52 device is associated with a single PWM output channel.
58 instance will exist for each channel, but changing the period or
59 duty cycle of any one channel may affect other channels within the
73 is the channel number within that hardware controller.
80 driver provides control of a PWM channel with the following
84 .Bl -tag -width indent
86 Retrieve the current state of the channel.
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H A Dattimer.436 .Bl -ohang
53 The same value is also available at run-time via the
59 to supply the kernel with one timecounter and one event timer, and to generate
62 Each channel includes a 16 bit counter which decreases with a known,
63 platform-dependent frequency.
65 one-shot.
66 The output of each channel has platform-defined wiring: one channel is wired
67 to the interrupt controller and may be used as event timer, one channel is
68 wired to the speaker and used to generate sound tones, and one timer is reserved
73 driver uses a single hardware channel to provide both time counter and event
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analo
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H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
33 - Data-transfer: Each transfer is made of one or more words, using one or more
34 channel windows.
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dmmp-dma.txt7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
10 or one irq for pdma device
13 - dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-channels: deprecated
16 - dma-requests: Number of DMA requestor lines supported by the controller
18 - #dma-requests: deprecated
20 "marvell,pdma-1.0"
26 * Each channel has specific irq
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H A Dk3dma.txt6 - compatible: Must be one of
7 - "hisilicon,k3-dma-1.0"
8 - "hisilicon,hisi-pcm-asp-dma-1.0"
9 - reg: Should contain DMA registers location and length.
10 - interrupts: Should contain one interrupt shared by all channel
11 - #dma-cells: see dma.txt, should be 1, para number
12 - dma-channels: physical channels supported
13 - dma-requests: virtual channels supported, each virtual channel
15 - clocks: clock required
21 compatible = "hisilicon,k3-dma-1.0";
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/freebsd/share/man/man9/
H A Dsleepqueue.91 .\" Copyright (c) 2000-2004 John H. Baldwin <jhb@FreeBSD.org>
92 Each queue is associated with a specific wait channel when it is active,
93 and only one queue may be associated with a wait channel at any given point
95 The implementation of each wait channel splits its sleepqueue into 2 sub-queues
98 wait channel.
99 Threads that are not blocked on a wait channel have an associated inactive
101 When a thread blocks on a wait channel it donates its inactive sleep queue
102 to the wait channel.
104 the wait channel that it was blocked on gives it an inactive sleep queue for
128 function locks the sleep queue chain associated with wait channel
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H A Dpwmbus.941 .Fn PWMBUS_CHANNEL_CONFIG "device_t bus" "u_int channel" "u_int period" "u_int duty"
45 .Fn PWMBUS_CHANNEL_ENABLE "device_t bus" "u_int channel" "bool enable"
47 .Fn PWMBUS_CHANNEL_GET_CONFIG "device_t bus" "u_int channel" "u_int *period" "u_int *duty"
49 .Fn PWMBUS_CHANNEL_GET_FLAGS "device_t bus" "u_int channel" "uint32_t *flags"
51 .Fn PWMBUS_CHANNEL_IS_ENABLED "device_t bus" "u_int channel" "bool *enabled"
53 .Fn PWMBUS_CHANNEL_SET_FLAGS "device_t bus" "u_int channel" "uint32_t flags"
55 The PWMBUS (Pulse-Width Modulation) interface allows a device driver to
63 argument is the duration in nanoseconds of one complete on-off cycle, and the
68 Channel numbers count up from zero.
71 In such cases, changing the period or duty cycle of any one channel may affect
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H A Dieee80211_scan.9133 (in infrastructure and IBSS mode), or a channel to use (when operating
139 An active scan causes one or more ProbeRequest frames to be sent on
140 visiting each channel.
141 A passive request causes each channel in the scan set to be visited but
148 visiting each channel and collecting information
153 does things like intelligently construct scan sets and dwell on a channel
161 per-operating mode.
167 make decisions, and selects the final station/channel to return as the
178 Only one vap at a time may be scanning; this scheduling policy
184 constrains the channel set and any desired SSID's and BSSID's.
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
11 CK, etc.) that connect one or more LPDDR chips to a host system. The main
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
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/freebsd/sys/contrib/openzfs/man/man5/
H A Dvdev_id.conf.528 file uses a simple format consisting of a keyword followed by one or
34 .Bl -tag -width "-h"
41 A defined alias takes precedence over a topology-derived name, but the
43 For example, one might name drives in a JBOD with the
49 .Pa /dev/disk/by-vdev .
56 .It Sy channel [ Ns Ar pci_slot ] Ar port Ar name
57 Maps a physical path to a channel name (typically representing a single
62 .Pa /dev/by-enclosure
74 .Pa /dev/by-enclosure/ Ns Ao Ar prefix Ac Ns - Ns Ao Ar channel Ac Ns Aq Ar num
79 .It Sy slot Ar prefix Ar new Op Ar channel
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dxilinx-xadc.txt8 frontends for the DRP interface exist. One that is only available on the ZYNQ
9 family as a hardmacro in the SoC portion of the ZYNQ. The other one is available
22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
33 when using the axi-xadc or the axi-system-management-wizard this must be
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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Ddsi-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
24 can control one to four virtual channels to one panel. Each virtual
25 channel should have a node "panel" for their virtual channel with their
26 reg-property set to the virtual channel number, usually there is just
27 one virtual channel, number 0.
33 clock-master:
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Drenesas,drif.txt1 Renesas R-Car Gen3 Digital Radio Interface controller (DRIF)
2 ------------------------------------------------------------
4 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
7 +---------------------+ +---------------------+
8 | |-----SCK------->|CLK |
9 | Master |-----SS-------->|SYNC DRIFn (slave) |
10 | |-----SD0------->|D0 |
11 | |-----SD1------->|D1 |
12 +---------------------+ +---------------------+
14 As per datasheet, each DRIF channel (drifn) is made up of two internal
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/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
31 $ref: /schemas/clock/fsl,scu-clk.yaml
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dnpcm750-pwm-fan.txt3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
9 Required properties for pwm-fan node
10 - #address-cells : should be 1.
11 - #size-cells : should be 0.
12 - compatible : "nuvoton,npcm750-pwm-fa
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-sprd-adi.txt3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
22 one system is reading/writing data by ADI software channels, that should be under
23 one hardware spinlock protection to prevent other systems from reading/writing
26 Then we need one hardware spinlock to synchronize between the multiple subsystems.
34 - compatible: Should be "sprd,sc9860-adi".
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H A Dsprd,spi-adi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
24 which means we can just link one analog chip address to one hardware channel,
25 then users can access the mapped analog chip address by this hardware channel
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/freebsd/contrib/llvm-project/lldb/source/Commands/
H A DCommandObjectLog.cpp1 //===-- CommandObjectLog.cpp ----------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
37 for (llvm::StringRef channel : Log::ListChannels()) in CompleteEnableDisable() local
38 request.TryCompleteCurrentArg(channel); in CompleteEnableDisable()
39 } else if (arg_index >= 1) { // We got: log enable/disable channel x[tab] in CompleteEnableDisable()
40 llvm::StringRef channel = request.GetParsedLine().GetArgumentAtIndex(0); in CompleteEnableDisable() local
42 channel, [&request](llvm::StringRef name, llvm::StringRef desc) { in CompleteEnableDisable()
53 "Enable logging for a single log channel.", in CommandObjectLogEnable()
64 // There is only one variant this argument could be; put it into the in CommandObjectLogEnable()
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/freebsd/sys/contrib/device-tree/Bindings/iio/
H A Diio-bindings.txt2 from Lars-Peter Clausen [1].
8 specifier is an array of one or more cells identifying the IIO
10 value of a #io-channel-cells property in the IIO provider node.
12 [1] https://marc.info/?l=linux-iio&m=135902119507483&w=2
17 #io-channel-cells: Number of cells in an IIO specifier; Typically 0 for nodes
27 adc: voltage-sensor@35 {
30 #io-channel-cells = <1>;
37 compatible = "some-vendor,some-adc";
40 adc1: iio-device@0 {
41 #io-channel-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/hsi/
H A Dclient-devices.txt1 Each HSI port is supposed to have one child node, which
7 - hsi-channel-ids: A list of channel ids
9 - hsi-rx-mode: Receiver Bit transmission mode ("stream" or "frame")
10 - hsi-tx-mode: Transmitter Bit transmission mode ("stream" or "frame")
11 - hsi-mode: May be used instead hsi-rx-mode and hsi-tx-mode if
14 - hsi-speed-kbps: Max bit transmission speed in kbit/s
15 - hsi-flow: RX flow type ("synchronized" or "pipeline")
16 - hsi-arb-mode: Arbitration mode for TX frame ("round-robin", "priority")
20 - hsi-channel-names: A list with one name per channel specified in the
21 hsi-channel-ids property
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