Searched full:imx7ulp_clk_apll_pfd1 (Results 1 – 6 of 6) sorted by relevance
41 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
81 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
275 <&scg1 IMX7ULP_CLK_APLL_PFD1>,307 <&scg1 IMX7ULP_CLK_APLL_PFD1>,
34 #define IMX7ULP_CLK_APLL_PFD1 21 macro
99 <&scg1 IMX7ULP_CLK_APLL_PFD1>,
86 …hws[IMX7ULP_CLK_APLL_PFD1] = imx_clk_hw_pfdv2(IMX_PFDV2_IMX7ULP, "apll_pfd1", "apll", base + 0x50c… in imx7ulp_clk_scg1_init()