| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra124-dpaux.yaml | 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two
15 pins which can be assigned to either the DPAUX channel or to an I2C
18 When configured for DisplayPort AUX operation, the DPAUX controller
24 pattern: "^dpaux@[0-9a-f]+$"
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
31 - nvidia,tegra186-dpaux
32 - nvidia,tegra194-dpaux
35 - const: nvidia,tegra132-dpaux
[all …]
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| H A D | nvidia,tegra20-host1x.txt | 389 - nvidia,dpaux: phandle to a DispayPort AUX interface
391 - dpaux: DisplayPort AUX interface
393 - "nvidia,tegra124-dpaux": for Tegra124 and Tegra132
394 - "nvidia,tegra210-dpaux": for Tegra210
400 - dpaux: clock input for the DPAUX hardware
405 - dpaux
411 See ../pinctrl/nvidia,tegra124-dpaux-padctl.txt for information
412 regarding the DPAUX pad controller bindings.
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| H A D | nvidia,tegra124-sor.yaml | 99 nvidia,dpaux:
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | nvidia,tegra124-dpaux-padctl.txt | 1 Device tree binding for NVIDIA Tegra DPAUX pad controller
4 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two pins
5 which can be assigned to either the DPAUX channel or to an I2C
8 This document defines the device-specific binding for the DPAUX pad
12 details on the DPAUX binding.
21 needed to describe the pin mux'ing options for the DPAUX pads.
27 - groups: Must be "dpaux-io"
33 dpaux@545c0000 {
37 groups = "dpaux-io";
42 groups = "dpaux-io";
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra194.dtsi | 2105 dpaux0: dpaux@155c0000 {
2106 compatible = "nvidia,tegra194-dpaux";
2111 clock-names = "dpaux", "parent";
2113 reset-names = "dpaux";
2119 groups = "dpaux-io";
2124 groups = "dpaux-io";
2129 groups = "dpaux-io";
2139 dpaux1: dpaux@155d0000 {
2140 compatible = "nvidia,tegra194-dpaux";
2145 clock-names = "dpaux", "paren
[all...] |
| H A D | tegra210.dtsi | 106 dpaux1: dpaux@54040000 {
107 compatible = "nvidia,tegra210-dpaux";
112 clock-names = "dpaux", "parent";
114 reset-names = "dpaux";
119 groups = "dpaux-io";
124 groups = "dpaux-io";
129 groups = "dpaux-io";
340 dpaux: dpaux@545c0000 { label
341 compatible = "nvidia,tegra210-dpaux";
[all...] |
| H A D | tegra186.dtsi | 1534 dpaux1: dpaux@15040000 {
1535 compatible = "nvidia,tegra186-dpaux";
1540 clock-names = "dpaux", "parent";
1542 reset-names = "dpaux";
1548 groups = "dpaux-io";
1553 groups = "dpaux-io";
1558 groups = "dpaux-io";
1791 dpaux: dpaux@155c0000 {
1792 compatible = "nvidia,tegra186-dpaux";
1790 dpaux: dpaux@155c0000 { global() label
[all...] |
| H A D | tegra186-p3509-0000+p3636-0001.dts | 792 dpaux@15040000 {
811 nvidia,dpaux = <&dpaux>;
827 dpaux@155c0000 {
|
| H A D | tegra132-norrin.dts | 45 nvidia,dpaux = <&dpaux>;
49 dpaux: dpaux@545c0000 { label
1057 ddc-i2c-bus = <&dpaux>;
|
| H A D | tegra132.dtsi | 158 dpaux: dpaux@545c0000 {
159 compatible = "nvidia,tegra124-dpaux";
164 clock-names = "dpaux", "parent";
166 reset-names = "dpaux";
156 dpaux: dpaux@545c0000 { global() label
|
| H A D | tegra194-p2972-0000.dts | 2142 dpaux@155c0000 {
2146 dpaux@155d0000 {
2150 dpaux@155e0000 {
2161 nvidia,dpaux = <&dpaux0>;
2171 nvidia,dpaux = <&dpaux1>;
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| H A D | tegra210-p3450-0000.dts | 60 dpaux@54040000 {
81 nvidia,dpaux = <&dpaux>;
97 dpaux@545c0000 {
|
| H A D | tegra186-p2771-0000.dts | 2439 dpaux@15040000 {
2458 nvidia,dpaux = <&dpaux>;
2473 dpaux@155c0000 {
|
| H A D | tegra194-p3509-0000.dtsi | 2182 dpaux@155c0000 {
2186 dpaux@155d0000 {
2197 nvidia,dpaux = <&dpaux0>;
|
| H A D | tegra210-smaug.dts | 61 dpaux: dpaux@545c0000 {
34 dpaux: dpaux@545c0000 { global() label
|
| H A D | tegra210-p2597.dtsi | 16 dpaux@54040000 {
|
| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra124-nyan-big-fhd.dts | 9 dpaux@545c0000 {
|
| H A D | tegra124.dtsi | 195 dpaux: dpaux@545c0000 { label
196 compatible = "nvidia,tegra124-dpaux";
201 clock-names = "dpaux", "parent";
203 reset-names = "dpaux";
|
| H A D | tegra124-nyan.dtsi | 55 nvidia,dpaux = <&dpaux>;
59 dpaux@545c0000 {
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| H A D | tegra124-venice2.dts | 44 nvidia,dpaux = <&dpaux>;
48 dpaux@545c0000 {
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| H A D | tegra124-nyan-blaze.dts | 19 dpaux@545c0000 {
|
| H A D | tegra124-nyan-big.dts | 17 dpaux@545c0000 {
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| /freebsd/sys/arm/nvidia/tegra124/ |
| H A D | tegra124_clk_per.c | 365 GATE(DPAUX, "dpaux", "clk_m", X(21)),
|
| /freebsd/sys/arm64/nvidia/tegra210/ |
| H A D | tegra210_clk_per.c | 442 GATE(DPAUX, "dpaux", "dpaux_div", X(21)),
|