1*c66ec88fSEmmanuel VadotDevice tree binding for NVIDIA Tegra DPAUX pad controller 2*c66ec88fSEmmanuel Vadot======================================================== 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotThe Tegra Display Port Auxiliary (DPAUX) pad controller manages two pins 5*c66ec88fSEmmanuel Vadotwhich can be assigned to either the DPAUX channel or to an I2C 6*c66ec88fSEmmanuel Vadotcontroller. 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel VadotThis document defines the device-specific binding for the DPAUX pad 9*c66ec88fSEmmanuel Vadotcontroller. Refer to pinctrl-bindings.txt in this directory for generic 10*c66ec88fSEmmanuel Vadotinformation about pin controller device tree bindings. Please refer to 11*c66ec88fSEmmanuel Vadotthe binding document ../display/tegra/nvidia,tegra20-host1x.txt for more 12*c66ec88fSEmmanuel Vadotdetails on the DPAUX binding. 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel VadotPin muxing: 15*c66ec88fSEmmanuel Vadot----------- 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotChild nodes contain the pinmux configurations following the conventions 18*c66ec88fSEmmanuel Vadotfrom the pinctrl-bindings.txt document. 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotSince only three configurations are possible, only three child nodes are 21*c66ec88fSEmmanuel Vadotneeded to describe the pin mux'ing options for the DPAUX pads. 22*c66ec88fSEmmanuel VadotFurthermore, given that the pad functions are only applicable to a 23*c66ec88fSEmmanuel Vadotsingle set of pads, the child nodes only need to describe the pad group 24*c66ec88fSEmmanuel Vadotthe functions are being applied to rather than the individual pads. 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel VadotRequired properties: 27*c66ec88fSEmmanuel Vadot- groups: Must be "dpaux-io" 28*c66ec88fSEmmanuel Vadot- function: Must be either "aux", "i2c" or "off". 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel VadotExample: 31*c66ec88fSEmmanuel Vadot-------- 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot dpaux@545c0000 { 34*c66ec88fSEmmanuel Vadot ... 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadot state_dpaux_aux: pinmux-aux { 37*c66ec88fSEmmanuel Vadot groups = "dpaux-io"; 38*c66ec88fSEmmanuel Vadot function = "aux"; 39*c66ec88fSEmmanuel Vadot }; 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot state_dpaux_i2c: pinmux-i2c { 42*c66ec88fSEmmanuel Vadot groups = "dpaux-io"; 43*c66ec88fSEmmanuel Vadot function = "i2c"; 44*c66ec88fSEmmanuel Vadot }; 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot state_dpaux_off: pinmux-off { 47*c66ec88fSEmmanuel Vadot groups = "dpaux-io"; 48*c66ec88fSEmmanuel Vadot function = "off"; 49*c66ec88fSEmmanuel Vadot }; 50*c66ec88fSEmmanuel Vadot }; 51*c66ec88fSEmmanuel Vadot 52*c66ec88fSEmmanuel Vadot ... 53*c66ec88fSEmmanuel Vadot 54*c66ec88fSEmmanuel Vadot i2c@7000d100 { 55*c66ec88fSEmmanuel Vadot ... 56*c66ec88fSEmmanuel Vadot pinctrl-0 = <&state_dpaux_i2c>; 57*c66ec88fSEmmanuel Vadot pinctrl-1 = <&state_dpaux_off>; 58*c66ec88fSEmmanuel Vadot pinctrl-names = "default", "idle"; 59*c66ec88fSEmmanuel Vadot }; 60