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/linux/Documentation/devicetree/bindings/misc/
H A Dxlnx,sd-fec.yaml34 - description: AXI4-Lite memory-mapped slave interface clock
35 - description: Control input AXI4-Stream Slave interface clock
36 - description: DIN AXI4-Stream Slave interface clock
37 - description: Status output AXI4-Stream Master interface clock
38 - description: DOUT AXI4-Stream Master interface clock
39 - description: DIN_WORDS AXI4-Stream Slave interface clock
40 - description: DOUT_WORDS AXI4-Stream Master interface clock
/linux/drivers/staging/axis-fifo/
H A Daxis-fifo.txt4 be accessed from the AXI4 memory-mapped interface. This is useful for
12 AXI4-Lite interface. DOES NOT support:
14 - AXI4 (non-lite)
43 - xlnx,s-axi4-data-width: Should be <0x20> (ignored by the driver)
83 xlnx,s-axi4-data-width = <0x20>;
/linux/Documentation/devicetree/bindings/dma/xilinx/
H A Dxilinx_dma.txt6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
/linux/Documentation/devicetree/bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml14 traffic from compliant camera sensors and send the output as AXI4 Stream
19 AXI4 Stream video data.
H A Dvideo.txt21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
/linux/include/uapi/misc/
H A Dxilinx_sdfec.h111 * @XSDFEC_FIXED_VALUE: Fixed, the DIN_WORDS AXI4-Stream interface is removed
216 * @din_width: Width of the DIN AXI4-Stream
218 * @dout_width: Width of the DOUT AXI4-Stream
/linux/drivers/dma/
H A DKconfig689 between memory and AXI4-Stream video type target
690 peripherals including peripherals which support AXI4-
698 memory access between memory and AXI4-Stream target peripherals.
700 between memory and AXI4-Stream target peripherals. It provides
/linux/drivers/media/platform/xilinx/
H A Dxilinx-vip.h106 * @vf_code: AXI4 video format code
107 * @width: AXI4 format width in bits per component
H A DKconfig22 it into an AXI4-Stream.
H A Dxilinx-vtc.c196 * AXI4-stream core. in xvtc_generator_start()
/linux/drivers/misc/
H A Dxilinx_sdfec.c171 * @axi_clk: AXI4-Lite memory-mapped clock
172 * @din_words_clk: DIN Words AXI4-Stream Slave clock
173 * @din_clk: DIN AXI4-Stream Slave clock
174 * @dout_clk: DOUT Words AXI4-Stream Slave clock
175 * @dout_words_clk: DOUT AXI4-Stream Slave clock
176 * @ctrl_clk: Control AXI4-Stream Slave clock
177 * @status_clk: Status AXI4-Stream Slave clock
/linux/include/dt-bindings/media/
H A Dxilinx-vip.h16 * Video format codes as defined in "AXI4-Stream Video IP and System Design
/linux/Documentation/devicetree/bindings/fpga/
H A Dxlnx,pr-decoupler.yaml24 bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
/linux/Documentation/devicetree/bindings/media/
H A Dallegro,al5e.yaml49 - description: AXI4-Lite slave port clock
/linux/Documentation/devicetree/bindings/gpio/
H A Dxlnx,gpio-xilinx.yaml14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
/linux/Documentation/devicetree/bindings/net/
H A Dxlnx,axi-ethernet.yaml98 - description: AXI4-Stream clock for TXD RXD TXC and RXS interfaces.
/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h479 * @axi_clk: AXI4-Lite bus clock
480 * @misc_clks: Misc ethernet clocks (AXI4-Stream, Ref, MGT clocks)
/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst242 AXI4, and AXI4-Lite, ACE and ACE-Lite**).
/linux/drivers/staging/most/dim2/
H A Ddim2.c1081 .compatible = "xlnx,axi4-os62420_3pin-1.00.a",
1084 .compatible = "xlnx,axi4-os62420_6pin-1.00.a",
/linux/drivers/dma/xilinx/
H A Dxilinx_dma.c12 * and AXI4-Stream type video target peripherals. The core provides efficient
18 * registers are accessed through an AXI4-Lite slave interface.
22 * and AXI4-Stream target peripherals. It supports one receive and one
31 * memory and AXI4-Stream target peripherals. It provides scatter gather
495 * @axi_clk: DMA Axi4-lite interace clock
H A Dxdma.c15 * configured to have a single AXI4 Master interface shared by all channels
16 * or one AXI4-Stream interface for each channel enabled. Memory transfers are
/linux/drivers/staging/media/deprecated/atmel/
H A Datmel-sama7g5-isc.c444 /* sama7g5-isc RAM access port is full AXI4 - 32 bits per beat */ in microchip_xisc_probe()
/linux/drivers/media/platform/microchip/
H A Dmicrochip-sama7g5-isc.c463 /* sama7g5-isc RAM access port is full AXI4 - 32 bits per beat */ in microchip_xisc_probe()
/linux/drivers/clk/thead/
H A Dclk-th1520-ap.c493 .hw.init = CLK_HW_INIT_PARENTS_HW("axi4-cpusys2-aclk",
/linux/drivers/i2c/busses/
H A Di2c-xiic.c68 * @clk: Pointer to AXI4-lite input clock