/freebsd/sys/contrib/dev/mediatek/mt76/ |
H A D | mt76_connac2_mac.h | 1 /* SPDX-License-Identifier: ISC */ 36 #define MT_TX_FREE_WLAN_ID GENMASK(23, 14) 39 #define MT_TX_FREE_STATUS GENMASK(14, 13) 41 #define MT_TX_FREE_PAIR BIT(31) 50 #define MT_TXD1_LONG_FORMAT BIT(31) 51 #define MT_TXD1_TGID BIT(30) 53 #define MT_TXD1_AMSDU BIT(23) 58 #define MT_TXD1_ETH_802_3 BIT(15) 59 #define MT_TXD1_VTA BIT(10) 62 #define MT_TXD2_FIX_RATE BIT(31) [all …]
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H A D | mt76_connac3_mac.h | 1 /* SPDX-License-Identifier: ISC */ 28 #define MT_RXD0_MESH BIT(18) 29 #define MT_RXD0_MHCP BIT(19) 31 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 32 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 40 #define MT_RXD1_NORMAL_GROUP_1 BIT(16) 41 #define MT_RXD1_NORMAL_GROUP_2 BIT(17) 42 #define MT_RXD1_NORMAL_GROUP_3 BIT(18) 43 #define MT_RXD1_NORMAL_GROUP_4 BIT(19) 44 #define MT_RXD1_NORMAL_GROUP_5 BIT(20) [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7603/ |
H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 10 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) 30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22) 34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5) [all …]
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H A D | regs.h | 1 /* SPDX-License-Identifier: ISC */ 28 #define MT_INT_RX_DONE(_n) BIT(_n) 31 #define MT_INT_TX_DONE(_n) BIT((_n) + 4) 33 #define MT_INT_RX_COHERENT BIT(20) 34 #define MT_INT_TX_COHERENT BIT(21) 35 #define MT_INT_MAC_IRQ3 BIT(27) 37 #define MT_INT_MCU_CMD BIT(30) 40 #define MT_WPDMA_GLO_CFG_TX_DMA_EN BIT(0) 41 #define MT_WPDMA_GLO_CFG_TX_DMA_BUSY BIT(1) 42 #define MT_WPDMA_GLO_CFG_RX_DMA_EN BIT(2) [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCInstrFormats.td | 1 //===- ARCInstrFormats.td - ARC Instruction Formats --------*- tablegen -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 21 "\n return isUInt<"#BSz#">(N->getSExtValue());"> { 27 "\n return isInt<"#BSz#">(N->getSExtValue());"> { 31 // e.g. s3 field may encode the signed integers values -1 .. 6 34 "\n return isInt<"#BSz#">(N->getSExtValue());"> { 64 class ExtMode<bit mode, string instSfx, string asmSfx> { [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrFormatsV.td | 1 //===-- RISCVInstrFormatsV.td - RISC-V V Instruction Formats -*- tablegen -*-=// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 // This file describes the RISC-V V extension instruction formats. 11 //===----------------------------------------------------------------------===// 65 let Inst{29-20} = vtypei{9-0}; 66 let Inst{19-15} = uimm; 67 let Inst{14-12} = OPCFG.Value; 68 let Inst{11-7} = rd; 69 let Inst{6-0} = OPC_OP_V.Value; [all …]
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/freebsd/sys/contrib/dev/rtw89/ |
H A D | reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2019-2020 Realtek Corporation 9 #define B_AX_AUTOLOAD_SUS BIT(5) 12 #define B_AX_PWC_EV2EF_MASK GENMASK(15, 14) 13 #define B_AX_PWC_EV2EF_B15 BIT(15) 14 #define B_AX_PWC_EV2EF_B14 BIT(1 [all...] |
H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 18 #define BAC_OOBS_SEL BIT(4) 20 #define B_BAC_EQ_SEL BIT(5) 22 #define B_PCIE_BIT_PSAVE BIT(15) 24 #define BAC_RX_TEST_EN BIT(6) 27 #define B_PCIE_BIT_PINOUT_DIS BIT( [all...] |
H A D | txrx.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 27 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_rate_mode() 40 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_get_data_ht_mcs() 48 if (rtwdev->chi in rtw89_get_data_mcs() [all...] |
/freebsd/contrib/netbsd-tests/include/ |
H A D | d_bitstring_27.out | 19 14 1 64 2 34 be: 0 -1 000000000000000000000000000 35 is: 0 -1 000000000000000000000000000 61 14 0 76 be: 0 -1 000000000000000000000000000 77 is: 0 -1 000000000000000000000000000 84 be: 0 -1 000000000000000000000000000 85 is: 0 -1 000000000000000000000000000 88 be: 0 -1 000000000000000000000000000 89 is: 0 -1 000000000000000000000000000 [all …]
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H A D | d_bitstring_32.out | 19 14 1 64 2 39 be: 0 -1 00000000000000000000000000000000 40 is: 0 -1 00000000000000000000000000000000 66 14 0 86 be: 0 -1 00000000000000000000000000000000 87 is: 0 -1 00000000000000000000000000000000 94 be: 0 -1 00000000000000000000000000000000 95 is: 0 -1 00000000000000000000000000000000 98 be: 0 -1 00000000000000000000000000000000 99 is: 0 -1 00000000000000000000000000000000 [all …]
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H A D | d_bitstring_49.out | 19 14 1 64 2 56 be: 0 -1 0000000000000000000000000000000000000000000000000 57 is: 0 -1 0000000000000000000000000000000000000000000000000 83 14 0 120 be: 0 -1 0000000000000000000000000000000000000000000000000 121 is: 0 -1 0000000000000000000000000000000000000000000000000 128 be: 0 -1 0000000000000000000000000000000000000000000000000 129 is: 0 -1 0000000000000000000000000000000000000000000000000 132 be: 0 -1 0000000000000000000000000000000000000000000000000 133 is: 0 -1 0000000000000000000000000000000000000000000000000 [all …]
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H A D | d_bitstring_67.out | 19 14 1 64 2 74 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 75 is: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 101 14 0 156 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 157 is: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 164 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 165 is: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 168 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 169 is: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000 [all …]
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/freebsd/sys/dev/sfxge/common/ |
H A D | efx_regs_ef10.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2016 Solarflare Communications Inc. 48 * BIU_HW_REV_ID_REG(32bit): 60 * BIU_MC_SFT_STATUS_REG(32bit): 74 * BIU_INT_ISR_REG(32bit): 86 * MC_DB_LWRD_REG(32bit): 98 * MC_DB_HWRD_REG(32bit): 110 * EVQ_RPTR_REG(32bit): 126 * EVQ_RPTR_REG_64K(32bit): [all …]
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/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/ |
H A D | mac.h | 1 /* SPDX-License-Identifier: ISC */ 15 #define MT_RXD0_NORMAL_IP_SUM BIT(23) 16 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24) 17 #define MT_RXD0_NORMAL_GROUP_1 BIT(25) 18 #define MT_RXD0_NORMAL_GROUP_2 BIT(26) 19 #define MT_RXD0_NORMAL_GROUP_3 BIT(27) 20 #define MT_RXD0_NORMAL_GROUP_4 BIT(28) 25 #define MT_RXD1_MID_AMSDU_FRAME BIT(1) 26 #define MT_RXD1_LAST_AMSDU_FRAME BIT(0) 27 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23) [all …]
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/freebsd/sys/contrib/dev/athk/ath11k/ |
H A D | rx_desc.h | 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 88 #define RX_ATTENTION_INFO1_FIRST_MPDU BIT(0) 89 #define RX_ATTENTION_INFO1_RSVD_1A BIT(1) 90 #define RX_ATTENTION_INFO1_MCAST_BCAST BIT(2) 91 #define RX_ATTENTION_INFO1_AST_IDX_NOT_FOUND BIT(3) 92 #define RX_ATTENTION_INFO1_AST_IDX_TIMEDOUT BIT(4) 93 #define RX_ATTENTION_INFO1_POWER_MGMT BIT(5) 94 #define RX_ATTENTION_INFO1_NON_QOS BIT(6) 95 #define RX_ATTENTION_INFO1_NULL_DATA BIT(7) [all …]
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/freebsd/sys/dev/clk/rockchip/ |
H A D | rk3328_cru.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2018-2021 Emmanuel Vadot <manu@freebsd.org> 256 /* Bit 3 bus_src_clk_en */ 257 /* Bit 4 clk_ddrphy_src_en */ 258 /* Bit 5 clk_ddrpd_src_en */ 259 /* Bit 6 clk_ddrmon_en */ 260 /* Bit 7-8 unused */ 261 /* Bit 9 testclk_en */ 265 /* Bit 13-15 unused */ [all …]
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/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
H A D | udivdi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 19 .size \name, . - \name 31 r10 = sub(r7,r6) // left shift count for bit & divisor 33 r15:14 = #1 // initialize bit to 1 37 r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 54 r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 61 r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration
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H A D | udivmoddi4.S | 1 //===----------------------Hexagon builtin routine ------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 19 .size \name, . - \name 31 r10 = sub(r7,r6) // left shift count for bit & divisor 33 r15:14 = #1 // initialize bit to 1 37 r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 54 r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 61 r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration
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H A D | umoddi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 19 .size \name, . - \name 31 r10 = sub(r7,r6) // left shift count for bit & divisor 33 r15:14 = #1 // initialize bit to 1 37 r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 38 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 54 r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 61 r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration
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H A D | divdi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 18 .size \name, . - \name 39 r10 = sub(r7,r6) // left shift count for bit & divisor 41 r15:14 = #1 // initialize bit to 1 45 r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 46 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 62 r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 69 r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration
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H A D | moddi3.S | 1 //===----------------------Hexagon builtin routine ------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 18 .size \name, . - \name 37 r10 = sub(r7,r6) // left shift count for bit & divisor 39 r15:14 = #1 // initialize bit to 1 43 r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb 44 r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor 60 r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) 67 r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCFixupKinds.h | 1 //===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 19 // 24-bit PC relative relocation for direct branches like 'b' and 'bl'. 22 // 24-bit PC relative relocation for direct branches like 'b' and 'bl' where 26 /// 14-bit PC relative relocation for conditional branches. 29 /// 24-bit absolute relocation for direct branches like 'ba' and 'bla'. 32 /// 14-bit absolute relocation for conditional branches. 35 /// A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like 39 /// A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for [all …]
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/freebsd/sys/contrib/dev/athk/ath12k/ |
H A D | rx_desc.h | 1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. 27 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7) 28 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8) 29 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9) 30 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10) 32 #define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL GENMASK(16, 14) 33 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17) 34 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18) [all …]
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/freebsd/sys/contrib/dev/rtw88/ |
H A D | rtw8822c.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2018-2019 Realtek Corporation 179 #define BIT_LDOE25_PON BIT(0) 207 #define BIT_PT_OPT BIT(21) 210 #define BIT_PATH_EN BIT(31) 212 #define BIT_DIS_SHARERX_TXGAT BIT(27) 213 #define BIT_3WIRE_TX_EN BIT(0) 214 #define BIT_3WIRE_RX_EN BIT(1) 216 #define BIT_3WIRE_PI_ON BIT(28) 218 #define BIT_ANAPAR_UPDATE BIT(29) [all …]
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