/freebsd/contrib/mknod/ |
H A D | pack_dev.h | 45 #define major_netbsd(x) ((int32_t)((((x) & 0x000fff00) >> 8))) 46 #define minor_netbsd(x) ((int32_t)((((x) & 0xfff00000) >> 12) | \ 47 (((x) & 0x000000ff) >> 0))) 48 #define makedev_netbsd(x,y) ((dev_t)((((x) << 8) & 0x000fff00) | \ 49 (((y) << 12) & 0xfff00000) | \ 50 (((y) << 0) & 0x000000ff)))
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H A D | pack_dev.c | 69 portdev_t dev = 0; in pack_native() 72 dev = makedev(numbers[0], numbers[1]); in pack_native() 73 if ((u_long)major(dev) != numbers[0]) in pack_native() 86 portdev_t dev = 0; in pack_netbsd() 89 dev = makedev_netbsd(numbers[0], numbers[1]); in pack_netbsd() 90 if ((u_long)major_netbsd(dev) != numbers[0]) in pack_netbsd() 100 #define major_freebsd(x) ((int32_t)(((x) & 0x0000ff00) >> 8)) 101 #define minor_freebsd(x) ((int32_t)(((x) & 0xffff00ff) >> 0)) 102 #define makedev_freebsd(x,y) ((portdev_t)((((x) << 8) & 0x0000ff00) | \ 103 (((y) << 0) & 0xffff00ff))) [all …]
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/freebsd/contrib/libarchive/libarchive/ |
H A D | archive_pack_dev.h | 42 #define major_netbsd(x) ((int32_t)((((x) & 0x000fff00) >> 8))) 43 #define minor_netbsd(x) ((int32_t)((((x) & 0xfff00000) >> 12) | \ 44 (((x) & 0x000000ff) >> 0))) 45 #define makedev_netbsd(x,y) ((dev_t)((((x) << 8) & 0x000fff00) | \ 46 (((y) << 12) & 0xfff00000) | \ 47 (((y) << 0) & 0x000000ff)))
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H A D | archive_pack_dev.c | 83 #define major(x) ((int)(0x00ff & ((x) >> 8))) 84 #define minor(x) ((int)(0xffff00ff & (x))) 85 #define makedev(maj,min) ((0xff00 & ((maj)<<8)) | (0xffff00ff & (min))) 108 dev_t dev = 0; 111 dev = apd_makedev(numbers[0], numbers[1]); 112 if ((unsigned long)major(dev) != numbers[0]) 125 dev_t dev = 0; in pack_native() 128 dev = makedev_netbsd(numbers[0], numbers[1]); 129 if ((unsigned long)major_netbsd(dev) != numbers[0]) [all...] |
/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | mvebu-mbus.txt | 65 pcie-mem-aperture = <0xe0000000 0x8000000>; 66 pcie-io-aperture = <0xe8000000 0x100000>; 73 reg = <0x20000 0x100>, <0x20180 0x20>, <0x20250 0x8>; 87 0xSIAA0000 0x00oooooo 91 S = 0x0 for a MBus valid window 92 S = 0xf for a non-valid window (see below) 94 If S = 0x0, then: 99 If S = 0xf, then: 105 (S = 0x0), an address decoding window is allocated. On the other side, 106 entries for translation that do not correspond to valid windows (S = 0xf) [all …]
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/freebsd/sys/contrib/dev/rtw89/ |
H A D | rtw8852c_rfk_table.c | 8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1), 9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1), 10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1), 11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1), 17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x [all...] |
/freebsd/sys/arm/altera/socfpga/ |
H A D | socfpga_machdep.c | 60 devmap_add_entry(0xffc00000, 0x100000); in socfpga_devmap_init() 70 devmap_add_entry(0xffb00000, 0x100000); in socfpga_devmap_init() 73 devmap_add_entry(0xff700000, 0x100000); in socfpga_devmap_init() 76 devmap_add_entry(0xfff00000, 0x100000); in socfpga_devmap_init() 79 devmap_add_entry(0xd0000000, 0x10000000); in socfpga_devmap_init() 81 return (0); in socfpga_devmap_init() 91 devmap_add_entry(0xffc00000, 0x100000); in socfpga_a10_devmap_init() 94 devmap_add_entry(0xffb00000, 0x100000); in socfpga_a10_devmap_init() 97 devmap_add_entry(0xff800000, 0x100000); in socfpga_a10_devmap_init() 100 devmap_add_entry(0xfff00000, 0x100000); in socfpga_a10_devmap_init() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nuvoton/ |
H A D | nuvoton-common-npcm8xx.dtsi | 22 reg = <0x0 0xf0800000 0x0 0x1000>; 27 reg = <0x0 0xdfff9000 0x0 0x1000>, 28 <0x0 0xdfffa00 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
H A D | cache_sram.txt | 18 reg = <0 0xfff00000 0 0x10000>;
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | calxeda-ddr-ctrlr.yaml | 40 reg = <0xfff00000 0x1000>; 41 interrupts = <0 91 4>;
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp-matrix.dts | 21 memory@0 { 28 reg = <0 0x00000000 0 0xf0000000>; 32 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 33 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 34 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 35 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; 75 pcie@1,0 { 76 /* Port 0, Lane 0 */
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H A D | armada-382-rd-ac3x-48g4x2xl.dts | 29 reg = <0x00000000 0x20000000>; /* 512MB */ 33 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 34 MBUS_ID(0x01, 0x1d) 0 [all...] |
H A D | armada-388-rd.dts | 26 reg = <0x00000000 0x10000000>; /* 256 MB */ 30 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 31 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 32 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 33 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; 43 pinctrl-0 = <&sdhci_pins>; 69 phy0: ethernet-phy@0 { 70 reg = <0>; 89 pcie@1,0 { 90 /* Port 0, Lane 0 */ [all …]
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H A D | armada-395-gp.dts | 24 reg = <0x00000000 0x40000000>; /* 1 GB */ 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 38 reg = <0x57>; 85 pcie@2,0 { 86 /* Port 1, Lane 0 */ 91 pcie@4,0 { 92 /* Port 3, Lane 0 */ 101 pinctrl-0 = <&nand_pins>; 104 nand@0 { [all …]
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H A D | armada-38x-solidrun-microsom.dtsi | 13 reg = <0x00000000 0x10000000>; /* 256 MB */ 17 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 18 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 19 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 20 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 21 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; 45 pinctrl-0 = <&ge0_rgmii_pins>; 50 bm,pool-long = <0>; 60 pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; 63 phy_dedicated: ethernet-phy@0 { [all …]
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H A D | armada-398-db.dts | 23 reg = <0x00000000 0x80000000>; /* 2 GB */ 27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 32 pinctrl-0 = <&i2c0_pins>; 39 pinctrl-0 = <&uart0_pins>; 45 pinctrl-0 = <&uart1_pins>; 62 pcie@1,0 { 66 pcie@2,0 { 70 pcie@3,0 { 79 pinctrl-0 = <&spi1_pins>; [all …]
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H A D | armada-390-db.dts | 24 reg = <0x00000000 0x80000000>; /* 2 GB */ 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 38 reg = <0x50>; 62 pcie@1,0 { 67 pcie@2,0 { 72 pcie@3,0 { 81 pinctrl-0 = <&spi1_pins>; 84 flash@0 { 89 reg = <0>; /* Chip select 0 */ [all …]
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H A D | armada-385-db-88f6820-amc.dts | 30 reg = <0x00000000 0x80000000>; /* 2GB */ 34 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 35 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 41 pinctrl-0 = <&i2c0_pins>; 52 pinctrl-0 = <&uart0_pins>; 60 * The Reference Clock 0 is used to provide a 63 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; 83 pinctrl-0 = <&mdio_pins>; 89 phy1: ethernet-phy@0 { 90 reg = <0>; [all …]
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H A D | armada-xp-axpwifiap.dts | 6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 28 memory@0 { 30 reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ 34 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 35 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 36 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 37 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; 56 pinctrl-0 = <&ge0_rgmii_pins>; 63 pinctrl-0 = <&ge1_rgmii_pins>; 74 pinctrl-0 = <&keys_pin>; [all …]
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/freebsd/sys/compat/linux/ |
H A D | linux.h | 39 * As of version 2.6.0 of the Linux kernel, dev_t is a 32-bit quantity 58 return ((_minor & 0xff) | ((_major & 0xfff) << 8) | in linux_encode_dev() 59 (((_minor & ~0xff) << 12) & 0xfff00000)); in linux_encode_dev() 66 return (_dev == NODEV ? 0 : linux_encode_dev(major(_dev), minor(_dev))); in linux_new_encode_dev() 73 return (_dev == NODEV ? 0 : major(_dev) & 0xfff); in linux_encode_major() 80 return (_dev == NODEV ? 0 : minor(_dev) & 0xfffff); in linux_encode_minor() 87 return ((_dev & 0xfff00) >> 8); in linux_decode_major() 94 return ((_dev & 0xff) | ((_dev & 0xfff00000) >> 12)); in linux_decode_minor() 107 #define LINUX_BI_FUTEX_REQUEUE 0x01000000 112 #define LINUX_POLLIN 0x0001 [all …]
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/freebsd/sys/contrib/device-tree/src/arm/calxeda/ |
H A D | ecx-2000.dts | 9 /memreserve/ 0x00000000 0x0001000; 19 #size-cells = <0>; 21 cpu@0 { 24 reg = <0>; 54 memory@0 { 57 reg = <0x00000000 0x00000000 0x00000000 0xff800000>; 63 reg = <0x00000002 0x00000000 0x00000003 0x00000000>; 67 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; 70 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, 71 <1 14 0xf08>, [all …]
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H A D | highbank.dts | 9 /memreserve/ 0x00000000 0x0001000; 19 #size-cells = <0>; 24 reg = <0x900>; 43 reg = <0x901>; 62 reg = <0x902>; 81 reg = <0x903>; 98 memory@0 { 101 reg = <0x00000000 0xff900000>; 105 ranges = <0x00000000 0x00000000 0xffffffff>; 109 reg = <0xfff00000 0x1000>; [all …]
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/freebsd/sys/contrib/alpine-hal/ |
H A D | al_hal_pcie_axi_reg.h | 53 /* [0x0] */ 56 /* [0x8] */ 58 /* [0xc] */ 60 /* [0x10] */ 62 /* [0x14] */ 64 /* [0x18] */ 66 /* [0x1c] */ 68 /* [0x20] */ 70 /* [0x24] */ 72 /* [0x28] */ [all …]
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/freebsd/lib/msun/i387/ |
H A D | e_exp.S | 44 andl $0x7fffffff,%eax 45 cmpl $0x7ff00000,%eax 58 andl $0x0300,%eax 59 cmpl $0x0300,%eax /* RC == 0 && PC == 3? */ 61 movl $0x137f,8(%esp) 82 * Return 0 if x is -Inf. Otherwise just return x; when x is Inf 86 cmpl $0xfff00000,8(%esp) 88 cmpl $0,4(%esp)
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-orion.txt | 19 chip-select lines 0 through 7 respectively. 37 #size-cells = <0>; 38 cell-index = <0>; 39 reg = <0x10600 0x28>; 47 #size-cells = <0>; 48 cell-index = <0>; 49 reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x28>, /* control */ 50 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */ 51 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */ 52 <MBUS_ID(0x01, 0x9e) 0 0xffffffff>, /* CS2 */ [all …]
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