1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright 2011-2012 Calxeda, Inc. 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot/dts-v1/; 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot/* First 4KB has pen for secondary cores. */ 9*f126890aSEmmanuel Vadot/memreserve/ 0x00000000 0x0001000; 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot/ { 12*f126890aSEmmanuel Vadot model = "Calxeda ECX-2000"; 13*f126890aSEmmanuel Vadot compatible = "calxeda,ecx-2000"; 14*f126890aSEmmanuel Vadot #address-cells = <2>; 15*f126890aSEmmanuel Vadot #size-cells = <2>; 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot cpus { 18*f126890aSEmmanuel Vadot #address-cells = <1>; 19*f126890aSEmmanuel Vadot #size-cells = <0>; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot cpu@0 { 22*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15"; 23*f126890aSEmmanuel Vadot device_type = "cpu"; 24*f126890aSEmmanuel Vadot reg = <0>; 25*f126890aSEmmanuel Vadot clocks = <&a9pll>; 26*f126890aSEmmanuel Vadot clock-names = "cpu"; 27*f126890aSEmmanuel Vadot }; 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot cpu@1 { 30*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15"; 31*f126890aSEmmanuel Vadot device_type = "cpu"; 32*f126890aSEmmanuel Vadot reg = <1>; 33*f126890aSEmmanuel Vadot clocks = <&a9pll>; 34*f126890aSEmmanuel Vadot clock-names = "cpu"; 35*f126890aSEmmanuel Vadot }; 36*f126890aSEmmanuel Vadot 37*f126890aSEmmanuel Vadot cpu@2 { 38*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15"; 39*f126890aSEmmanuel Vadot device_type = "cpu"; 40*f126890aSEmmanuel Vadot reg = <2>; 41*f126890aSEmmanuel Vadot clocks = <&a9pll>; 42*f126890aSEmmanuel Vadot clock-names = "cpu"; 43*f126890aSEmmanuel Vadot }; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot cpu@3 { 46*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15"; 47*f126890aSEmmanuel Vadot device_type = "cpu"; 48*f126890aSEmmanuel Vadot reg = <3>; 49*f126890aSEmmanuel Vadot clocks = <&a9pll>; 50*f126890aSEmmanuel Vadot clock-names = "cpu"; 51*f126890aSEmmanuel Vadot }; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot 54*f126890aSEmmanuel Vadot memory@0 { 55*f126890aSEmmanuel Vadot name = "memory"; 56*f126890aSEmmanuel Vadot device_type = "memory"; 57*f126890aSEmmanuel Vadot reg = <0x00000000 0x00000000 0x00000000 0xff800000>; 58*f126890aSEmmanuel Vadot }; 59*f126890aSEmmanuel Vadot 60*f126890aSEmmanuel Vadot memory@200000000 { 61*f126890aSEmmanuel Vadot name = "memory"; 62*f126890aSEmmanuel Vadot device_type = "memory"; 63*f126890aSEmmanuel Vadot reg = <0x00000002 0x00000000 0x00000003 0x00000000>; 64*f126890aSEmmanuel Vadot }; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot soc { 67*f126890aSEmmanuel Vadot ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; 68*f126890aSEmmanuel Vadot 69*f126890aSEmmanuel Vadot timer { 70*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, 71*f126890aSEmmanuel Vadot <1 14 0xf08>, 72*f126890aSEmmanuel Vadot <1 11 0xf08>, 73*f126890aSEmmanuel Vadot <1 10 0xf08>; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot 76*f126890aSEmmanuel Vadot memory-controller@fff00000 { 77*f126890aSEmmanuel Vadot compatible = "calxeda,ecx-2000-ddr-ctrl"; 78*f126890aSEmmanuel Vadot reg = <0xfff00000 0x1000>; 79*f126890aSEmmanuel Vadot interrupts = <0 91 4>; 80*f126890aSEmmanuel Vadot }; 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot intc: interrupt-controller@fff11000 { 83*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15-gic"; 84*f126890aSEmmanuel Vadot #interrupt-cells = <3>; 85*f126890aSEmmanuel Vadot #address-cells = <0>; 86*f126890aSEmmanuel Vadot interrupt-controller; 87*f126890aSEmmanuel Vadot interrupts = <1 9 0xf04>; 88*f126890aSEmmanuel Vadot reg = <0xfff11000 0x1000>, 89*f126890aSEmmanuel Vadot <0xfff12000 0x2000>, 90*f126890aSEmmanuel Vadot <0xfff14000 0x2000>, 91*f126890aSEmmanuel Vadot <0xfff16000 0x2000>; 92*f126890aSEmmanuel Vadot }; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot pmu { 95*f126890aSEmmanuel Vadot compatible = "arm,cortex-a9-pmu"; 96*f126890aSEmmanuel Vadot interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>; 97*f126890aSEmmanuel Vadot }; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot}; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot/include/ "ecx-common.dtsi" 102