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/linux/arch/powerpc/boot/dts/
H A Dmpc8377_wlan.dts28 #size-cells = <0>;
30 PowerPC,8377@0 {
32 reg = <0x0>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
43 memory@0 {
45 reg = <0x00000000 0x20000000>; // 512MB at 0
52 reg = <0xe0005000 0x1000>;
53 interrupts = <77 0x8>;
[all …]
H A Dmpc8377_rdb.dts27 #size-cells = <0>;
29 PowerPC,8377@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
42 memory@0 {
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
[all …]
H A Dmpc8378_rdb.dts27 #size-cells = <0>;
29 PowerPC,8378@0 {
31 reg = <0x0>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
42 memory@0 {
44 reg = <0x00000000 0x10000000>; // 256MB at 0
51 reg = <0xe0005000 0x1000>;
52 interrupts = <77 0x8>;
[all …]
H A Dsocrates.dts27 #size-cells = <0>;
29 PowerPC,8544@0 {
31 reg = <0>;
34 d-cache-size = <0x8000>; // L1, 32K
35 i-cache-size = <0x8000>; // L1, 32K
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
45 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x00000000 0xe0000000 0x00100000>;
[all …]
/linux/tools/testing/selftests/powerpc/include/
H A Dinstructions.h10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
16 asm volatile(str(COPY(0, %0, 0))";" in copy()
25 asm volatile(str(COPY(0, %0, 1))";" in copy_first()
34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
42 asm volatile(str(PASTE(0, %1, 0, 0))";" in paste()
43 "mfcr %0;" in paste()
55 asm volatile(str(PASTE(0, %1, 1, 1))";" in paste_last()
56 "mfcr %0;" in paste_last()
64 #define PPC_INST_COPY __COPY(0, 0, 0)
65 #define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
[all …]
/linux/arch/arm/mach-sa1100/include/mach/
H A Dmemory.h22 * node 0: 0xc0000000 - 0xc7ffffff
23 * node 1: 0xc8000000 - 0xcfffffff
24 * node 2: 0xd0000000 - 0xd7ffffff
25 * node 3: 0xd8000000 - 0xdfffffff
33 #define FLUSH_BASE_PHYS 0xe0000000
34 #define FLUSH_BASE 0xf5000000
35 #define FLUSH_BASE_MINICACHE 0xf5100000
/linux/Documentation/devicetree/bindings/spi/
H A Dnuvoton,wpcm450-fiu.yaml50 reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
52 #size-cells = <0>;
54 clocks = <&clk 0>;
57 flash@0 {
59 reg = <0>;
/linux/drivers/media/common/saa7146/
H A Dsaa7146_vbi.c13 int count = 0; in vbi_workaround()
34 saa7146_write(dev, BASE_PAGE3, 0x0); in vbi_workaround()
35 saa7146_write(dev, NUM_LINE_BYTE3, (2<<16)|((vbi_pixel_to_capture)<<0)); in vbi_workaround()
41 WRITE_RPS1(0xc000008c); in vbi_workaround()
43 if ( 0 != (SAA7146_USE_PORT_B_FOR_VBI & dev->ext_vv_data->flags)) { in vbi_workaround()
86 for(i = 0; i < 2; i++) { in vbi_workaround()
91 saa7146_write(dev, NUM_LINE_BYTE3, (1<<16)|(2<<0)); in vbi_workaround()
120 DEB_VBI("aborted (rps:0x%08x)\n", in vbi_workaround()
132 return 0; in vbi_workaround()
141 int count = 0; in saa7146_set_vbi_capture()
[all …]
/linux/arch/m68k/fpsp040/
H A Dget_op.S9 | determines the opclass (0, 2, or 3) and branches to the
17 | - For unnormalized numbers (opclass 0, 2, or 3) the
23 | - For denormalized numbers (opclass 0 or 2) the number(s) is not
71 .long 0x40000000,0xc90fdaa2,0x2168c235 |pi
73 .long 0x40000000,0xc90fdaa2,0x2168c234 |pi
75 .long 0x40000000,0xc90fdaa2,0x2168c235 |pi
79 .long 0x3ffd0000,0x9a209a84,0xfbcff798 |log10(2)
80 .long 0x40000000,0xadf85458,0xa2bb4a9a |e
81 .long 0x3fff0000,0xb8aa3b29,0x5c17f0bc |log2(e)
82 .long 0x3ffd0000,0xde5bd8a9,0x37287195 |log10(e)
[all …]
/linux/arch/arm/mach-dove/
H A Ddove.h14 * e0000000 @runtime 128M PCIe-0 Memory space
18 * f2000000 fee00000 1M PCIe-0 I/O space
22 #define DOVE_CESA_PHYS_BASE 0xc8000000
23 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
26 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
29 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
32 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
35 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
36 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
39 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp4xx.dtsi19 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
26 ranges = <0 0x0 0x50000000 0x01000000>,
27 <1 0x0 0x51000000 0x01000000>,
28 <2 0x0 0x52000000 0x01000000>,
29 <3 0x0 0x53000000 0x01000000>,
30 <4 0x0 0x54000000 0x01000000>,
31 <5 0x0 0x55000000 0x01000000>,
32 <6 0x0 0x56000000 0x01000000>,
33 <7 0x0 0x57000000 0x01000000>;
34 dma-ranges = <0 0x0 0x50000000 0x01000000>,
[all …]
/linux/Documentation/translations/zh_CN/devicetree/
H A Dusage-model.rst153 initrd-start = <0xc8000000>;
154 initrd-end = <0xc8200000>;
208 reg = <0x00000000 0x40000000>;
221 reg = <0x50041000 0x1000>, < 0x50040100 0x0100 >;
226 reg = <0x70006300 0x100>;
232 reg = <0x70002800 0x100>;
240 #size-cells = <0>;
241 reg = <0x7000c000 0x100>;
246 reg = <0x1a>;
/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b.dtsi19 #size-cells = <0>;
25 reg = <0x200>;
37 reg = <0x201>;
49 reg = <0x202>;
61 reg = <0x203>;
169 hwrom@0 {
170 reg = <0x0 0x200000>;
225 reg = <0xc8000000 0x8000>;
228 ranges = <0x0 0xc8000000 0x8000>;
232 reg = <0x400 0x20>;
[all …]
H A Dmeson8.dtsi21 #size-cells = <0>;
27 reg = <0x200>;
39 reg = <0x201>;
51 reg = <0x202>;
63 reg = <0x203>;
177 hwrom@0 {
178 reg = <0x0 0x200000>;
193 reg = <0x4f00000 0x100000>;
248 reg = <0xc8000000 0x8000>;
251 ranges = <0x0 0xc8000000 0x8000>;
[all …]
/linux/arch/arm/mach-versatile/
H A Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dintegratorcp.dts19 #size-cells = <0>;
21 cpu@0 {
30 reg = <0>;
35 operating-points = <50000 0
36 48000 0>;
51 #clock-cells = <0>;
58 #clock-cells = <0>;
67 #clock-cells = <0>;
74 #clock-cells = <0>;
81 #clock-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-wpcm450.dtsi24 #size-cells = <0>;
26 cpu@0 {
29 reg = <0>;
37 #clock-cells = <0>;
45 #clock-cells = <0>;
57 reg = <0xb0000000 0x200>;
62 reg = <0xb0000200 0x100>;
71 reg = <0xb8000000 0x20>;
76 pinctrl-0 = <&bsp_pins>;
82 reg = <0xb8000100 0x20>;
[all …]
/linux/Documentation/arch/xtensa/
H A Dmmu.rst16 - RASID is 0x04030201 (reset state).
28 After step 2, we jump to virtual address in the range 0x40000000..0x5fffffff
29 or 0x00000000..0x1fffffff, depending on whether the kernel was loaded below
30 0x40000000 or above. That address corresponds to next instruction to execute
32 The scheme below assumes that the kernel is loaded below 0x40000000.
49 The default location of IO peripherals is above 0xf0000000. This may be changed
75 | Userspace | 0x00000000 TASK_SIZE
76 +------------------+ 0x40000000
78 | Page table | XCHAL_PAGE_TABLE_VADDR 0x80000000 XCHAL_PAGE_TABLE_SIZE
80 | KASAN shadow map | KASAN_SHADOW_START 0x80400000 KASAN_SHADOW_SIZE
[all …]
/linux/arch/m68k/math-emu/
H A Dfp_scan.S50 Long = 0, i.e. fmove.l
69 cmp.b #0xf2,%d0 | cpid = 1
71 cmp.b #0xfc,%d0 | cpid = 6
114 lea 0f,%a0
120 0: .byte 'l','s','x','p','w','d','b',0
146 jmp ([0f:w,%pc,%d1.w*4])
149 0:
202 jmp ([0f:w,%pc,%d0*4])
205 0:
246 jmp ([0f:w,%pc,%d1.w*4])
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9580_1p0_initvals.h29 {0x00016000, 0x36db2db6},
30 {0x00016004, 0x6db6db40},
31 {0x00016008, 0x73f00000},
32 {0x0001600c, 0x00000000},
33 {0x00016040, 0x7f80fff8},
34 {0x0001604c, 0x76d005b5},
35 {0x00016050, 0x556cf031},
36 {0x00016054, 0x13449440},
37 {0x00016058, 0x0c51c92c},
38 {0x0001605c, 0x3db7fffc},
[all …]
H A Dar9003_2p2_initvals.h25 {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
26 {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
27 {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
28 {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
29 {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
30 {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
31 {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
32 {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
33 {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
38 {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Ddove.dtsi22 #size-cells = <0>;
24 cpu0: cpu@0 {
28 reg = <0>;
34 marvell,tauros2-cache-features = <0>;
46 #size-cells = <0>;
51 pinctrl-0 = <&pmx_i2cmux_0>;
55 i2c0: i2c@0 {
56 reg = <0>;
58 #size-cells = <0>;
65 #size-cells = <0>;
[all …]
/linux/arch/m68k/ifpsp060/
H A Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]

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