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Searched +full:0 +full:xc500 (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/spi/
H A Domap-spi.yaml109 reg = <0x2100000 0x400>;
114 #size-cells = <0>;
115 dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
/linux/sound/soc/codecs/
H A Drt1017-sdca-sdw.c27 case 0x2f55: in rt1017_sdca_readable_register()
28 case 0x3206: in rt1017_sdca_readable_register()
29 case 0xc000: in rt1017_sdca_readable_register()
30 case 0xc001: in rt1017_sdca_readable_register()
31 case 0xc022: in rt1017_sdca_readable_register()
32 case 0xc030: in rt1017_sdca_readable_register()
33 case 0xc104: in rt1017_sdca_readable_register()
34 case 0xc10b: in rt1017_sdca_readable_register()
35 case 0xc10c: in rt1017_sdca_readable_register()
36 case 0xc11 in rt1017_sdca_readable_register()
[all...]
H A Drt1017-sdca-sdw.h18 #define FUNC_NUM_SMART_AMP 0x04
21 #define RT1017_SDCA_ENT_PDE23 0x31
22 #define RT1017_SDCA_ENT_PDE22 0x33
23 #define RT1017_SDCA_ENT_CS21 0x21
24 #define RT1017_SDCA_ENT_SAPU29 0x29
25 #define RT1017_SDCA_ENT_XU22 0x22
26 #define RT1017_SDCA_ENT_FU 0x03
27 #define RT1017_SDCA_ENT_UDMPU21 0x02
30 #define RT1017_SDCA_CTL_FS_INDEX 0x10
31 #define RT1017_SDCA_CTL_REQ_POWER_STATE 0x01
[all …]
H A Drt1320-sdw.c31 { 0xc003, 0xe0 },
32 { 0xc01b, 0xfc },
33 { 0xc5c3, 0xf2 },
34 { 0xc5c2, 0x00 },
35 { 0xc5c6, 0x10 },
36 { 0xc5c4, 0x12 },
37 { 0xc5c8, 0x03 },
38 { 0xc5d8, 0x0a },
39 { 0xc5f7, 0x22 },
40 { 0xc5f6, 0x22 },
[all …]
/linux/drivers/dma/ti/
H A Dk3-psil-am62a.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
H A Dk3-psil-am62.c73 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
74 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
75 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
76 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
78 PSIL_PDMA_XY_PKT(0x4300),
79 PSIL_PDMA_XY_PKT(0x4301),
80 PSIL_PDMA_XY_PKT(0x4302),
81 PSIL_PDMA_XY_PKT(0x4303),
82 PSIL_PDMA_XY_PKT(0x4304),
83 PSIL_PDMA_XY_PKT(0x4305),
[all …]
H A Dk3-psil-am64.c66 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0),
67 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0),
68 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0),
69 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0),
71 PSIL_ETHERNET(0x4100, 21, 48, 16),
72 PSIL_ETHERNET(0x4101, 22, 64, 16),
73 PSIL_ETHERNET(0x4102, 23, 80, 16),
74 PSIL_ETHERNET(0x4103, 24, 96, 16),
76 PSIL_ETHERNET(0x4200, 25, 112, 16),
77 PSIL_ETHERNET(0x4201, 26, 128, 16),
[all …]
H A Dk3-psil-am62p.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
H A Dk3-psil-j721e.c72 PSIL_SA2UL(0x4000, 0),
73 PSIL_SA2UL(0x4001, 0),
74 PSIL_SA2UL(0x4002, 0),
75 PSIL_SA2UL(0x4003, 0),
77 PSIL_ETHERNET(0x4100),
78 PSIL_ETHERNET(0x4101),
79 PSIL_ETHERNET(0x4102),
80 PSIL_ETHERNET(0x4103),
82 PSIL_ETHERNET(0x4200),
83 PSIL_ETHERNET(0x4201),
[all …]
/linux/drivers/media/dvb-frontends/
H A Dstv6111.c37 { 2572, 0 },
73 { 1548, 0 },
109 { 4870, 0x3000 },
110 { 4850, 0x3C00 },
111 { 4800, 0x4500 },
112 { 4750, 0x4800 },
113 { 4700, 0x4B00 },
114 { 4650, 0x4D00 },
115 { 4600, 0x4F00 },
116 { 4550, 0x5100 },
[all …]
/linux/include/linux/mfd/
H A Didt8a340_reg.h3 * Based on 5.2.0, Family Programming Guide (Sept 30, 2020)
10 #define PAGE_ADDR_BASE 0x0000
11 #define PAGE_ADDR 0x00fc
13 #define HW_REVISION 0x8180
14 #define REV_ID 0x007a
16 #define HW_DPLL_0 (0x8a00)
17 #define HW_DPLL_1 (0x8b00)
18 #define HW_DPLL_2 (0x8c00)
19 #define HW_DPLL_3 (0x8d00)
20 #define HW_DPLL_4 (0x8e00)
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-main.dtsi11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
24 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
25 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
26 <0x01 0x00000000 0x00 0x2000>, /* GICC */
27 <0x01 0x00010000 0x00 0x1000>, /* GICH */
28 <0x01 0x00020000 0x00 0x2000>; /* GICV */
37 reg = <0x00 0x01820000 0x00 0x10000>;
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
48 ranges = <0x0 0x00 0x00100000 0x20000>;
[all …]
H A Dk3-am62a-main.dtsi11 reg = <0x00 0x70000000 0x00 0x10000>;
14 ranges = <0x0 0x00 0x70000000 0x10000>;
19 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
20 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
21 <0x01 0x00000000 0x00 0x2000>, /* GICC */
22 <0x01 0x00010000 0x00 0x1000>, /* GICH */
23 <0x01 0x00020000 0x00 0x2000>; /* GICV */
37 reg = <0x00 0x01820000 0x00 0x10000>;
38 socionext,synquacer-pre-its = <0x1000000 0x400000>;
48 ranges = <0x00 0x00 0x00100000 0x20000>;
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_offset.h29 // base address: 0x0
30 …BIF_BX0_PCIE_INDEX 0x000c
31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0
32 …BIF_BX0_PCIE_DATA 0x000d
33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0
34 …BIF_BX0_PCIE_INDEX2 0x000e
35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0
36 …BIF_BX0_PCIE_DATA2 0x000f
37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0
38 …BIF_BX0_PCIE_INDEX_HI 0x0010
[all …]
H A Dnbio_4_3_0_offset.h29 // base address: 0x0
30 …BIF_BX0_PCIE_INDEX 0x000c
31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 0
32 …BIF_BX0_PCIE_DATA 0x000d
33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 0
34 …BIF_BX0_PCIE_INDEX2 0x000e
35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 0
36 …BIF_BX0_PCIE_DATA2 0x000f
37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 0
38 …BIF_BX0_PCIE_INDEX_HI 0x0010
[all …]
H A Dnbio_7_2_0_offset.h26 // base address: 0x0
27 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000
28 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002
29 …BIF_CFG_DEV0_RC_COMMAND 0x0004
30 …BIF_CFG_DEV0_RC_STATUS 0x0006
31 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008
32 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009
33 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a
34 …BIF_CFG_DEV0_RC_BASE_CLASS 0x000b
35 …BIF_CFG_DEV0_RC_CACHE_LINE 0x000c
[all …]
H A Dnbio_7_7_0_offset.h29 // base address: 0x0
30 …NBCFG_SCRATCH_4 0x0078
34 // base address: 0x0
35 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000
36 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002
37 …BIF_CFG_DEV0_RC_COMMAND 0x0004
38 …BIF_CFG_DEV0_RC_STATUS 0x0006
39 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008
40 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009
41 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h28 // base address: 0x0
29 …IRQ_BRIDGE_CNTL 0x003e
33 // base address: 0x0
34 …BIF_CFG_DEV0_EPF0_VENDOR_ID 0x0000
35 …BIF_CFG_DEV0_EPF0_DEVICE_ID 0x0002
36 …BIF_CFG_DEV0_EPF0_COMMAND 0x0004
37 …BIF_CFG_DEV0_EPF0_STATUS 0x0006
38 …BIF_CFG_DEV0_EPF0_REVISION_ID 0x0008
39 …BIF_CFG_DEV0_EPF0_PROG_INTERFACE 0x0009
40 …BIF_CFG_DEV0_EPF0_SUB_CLASS 0x000a
[all …]
/linux/fs/nls/
H A Dnls_cp949.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */
26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */
[all …]