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Searched +full:0 +full:xc300 (Results 1 – 25 of 25) sorted by relevance

/linux/arch/powerpc/boot/dts/fsl/
H A Dpq3-dma-1.dtsi2 * PQ3 DMA device tree stub [ controller @ offset 0xc300 ]
39 reg = <0xc300 0x4>;
40 ranges = <0x0 0xc100 0x200>;
42 dma-channel@0 {
44 reg = <0x0 0x80>;
45 cell-index = <0>;
46 interrupts = <76 2 0 0>;
50 reg = <0x80 0x80>;
52 interrupts = <77 2 0 0>;
56 reg = <0x100 0x80>;
[all …]
/linux/drivers/dma/ti/
H A Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
H A Dk3-psil-am62a.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
H A Dk3-psil-am62.c73 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
74 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
75 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
76 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
78 PSIL_PDMA_XY_PKT(0x4300),
79 PSIL_PDMA_XY_PKT(0x4301),
80 PSIL_PDMA_XY_PKT(0x4302),
81 PSIL_PDMA_XY_PKT(0x4303),
82 PSIL_PDMA_XY_PKT(0x4304),
83 PSIL_PDMA_XY_PKT(0x4305),
[all …]
H A Dk3-psil-am62p.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
/linux/drivers/staging/media/meson/vdec/
H A Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
/linux/sound/soc/codecs/
H A Drt1318-sdw.c24 { 0xc001, 0x43 },
25 { 0xc003, 0xa2 },
26 { 0xc004, 0x44 },
27 { 0xc005, 0x44 },
28 { 0xc006, 0x3
[all...]
H A Drt1017-sdca-sdw.h18 #define FUNC_NUM_SMART_AMP 0x04
21 #define RT1017_SDCA_ENT_PDE23 0x31
22 #define RT1017_SDCA_ENT_PDE22 0x33
23 #define RT1017_SDCA_ENT_CS21 0x21
24 #define RT1017_SDCA_ENT_SAPU29 0x29
25 #define RT1017_SDCA_ENT_XU22 0x22
26 #define RT1017_SDCA_ENT_FU 0x03
27 #define RT1017_SDCA_ENT_UDMPU21 0x02
30 #define RT1017_SDCA_CTL_FS_INDEX 0x10
31 #define RT1017_SDCA_CTL_REQ_POWER_STATE 0x01
[all …]
H A Drt1017-sdca-sdw.c27 case 0x2f55: in rt1017_sdca_readable_register()
28 case 0x3206: in rt1017_sdca_readable_register()
29 case 0xc000: in rt1017_sdca_readable_register()
30 case 0xc001: in rt1017_sdca_readable_register()
31 case 0xc022: in rt1017_sdca_readable_register()
32 case 0xc030: in rt1017_sdca_readable_register()
33 case 0xc104: in rt1017_sdca_readable_register()
34 case 0xc10b: in rt1017_sdca_readable_register()
35 case 0xc10c: in rt1017_sdca_readable_register()
36 case 0xc11 in rt1017_sdca_readable_register()
[all...]
H A Drt1308-sdw.c31 case 0x00e0: in rt1308_readable_register()
32 case 0x00f0: in rt1308_readable_register()
33 case 0x2f01 ... 0x2f07: in rt1308_readable_register()
34 case 0x3000 ... 0x3001: in rt1308_readable_register()
35 case 0x3004 ... 0x3005: in rt1308_readable_register()
36 case 0x3008: in rt1308_readable_register()
37 case 0x300 in rt1308_readable_register()
[all...]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dqt202x_phy.c28 #define MDIO_QUAKE_LED0_REG (0xD006)
31 #define PCS_FW_HEARTBEAT_REG 0xd7ee
32 #define PCS_FW_HEARTB_LBN 0
34 #define PCS_FW_PRODUCT_CODE_1 0xd7f0
35 #define PCS_FW_VERSION_1 0xd7f3
36 #define PCS_FW_BUILD_1 0xd7f6
37 #define PCS_UC8051_STATUS_REG 0xd7fd
38 #define PCS_UC_STATUS_LBN 0
40 #define PCS_UC_STATUS_FW_SAVE 0x20
41 #define PMA_PMD_MODE_REG 0xc301
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dti,icssg-prueth.yaml21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
35 - const: tx0-0
39 - const: tx1-0
92 const: 0
95 ^port@[0-1]$:
104 - enum: [0, 1]
131 - port@0
170 /* Example k3-am654 base board SR2.0, dual-emac */
174 pinctrl-0 = <&icssg2_rgmii_pins_default>;
191 dmas = <&main_udmap 0xc300>, /* egress slice 0 */
[all …]
/linux/include/linux/mfd/
H A Didt8a340_reg.h3 * Based on 5.2.0, Family Programming Guide (Sept 30, 2020)
10 #define PAGE_ADDR_BASE 0x0000
11 #define PAGE_ADDR 0x00fc
13 #define HW_REVISION 0x8180
14 #define REV_ID 0x007a
16 #define HW_DPLL_0 (0x8a00)
17 #define HW_DPLL_1 (0x8b00)
18 #define HW_DPLL_2 (0x8c00)
19 #define HW_DPLL_3 (0x8d00)
20 #define HW_DPLL_4 (0x8e00)
[all …]
/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm4908.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x0 0xff8>;
58 reg = <0x3>;
60 cpu-release-addr = <0x0 0xff8>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dxpedite5301.dts16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
29 #size-cells = <0>;
31 PowerPC,8572@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
46 reg = <0x1>;
[all …]
H A Dxpedite5370.dts27 #size-cells = <0>;
29 PowerPC,8572@0 {
31 reg = <0x0>;
34 d-cache-size = <0x8000>; // L1, 32K
35 i-cache-size = <0x8000>; // L1, 32K
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
44 reg = <0x1>;
47 d-cache-size = <0x8000>; // L1, 32K
[all …]
H A Dxcalibur1501.dts28 #size-cells = <0>;
30 PowerPC,8572@0 {
32 reg = <0x0>;
35 d-cache-size = <0x8000>; // L1, 32K
36 i-cache-size = <0x8000>; // L1, 32K
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 reg = <0x1>;
48 d-cache-size = <0x8000>; // L1, 32K
[all …]
H A Dxpedite5330.dts16 boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */
30 #size-cells = <0>;
32 pmcslot@0 {
33 cell-index = <0>;
44 #size-cells = <0>;
46 xmcslot@0 {
47 cell-index = <0>;
65 #size-cells = <0>;
67 PowerPC,8572@0 {
69 reg = <0x0>;
[all …]
/linux/arch/mips/include/asm/sn/
H A Dioc3.h30 u8 iu_ier; /* DLAB == 0 */
34 u8 iu_rbr; /* read only, DLAB == 0 */
35 u8 iu_thr; /* write only, DLAB == 0 */
45 u8 fill[0x141]; /* starts at 0x141 */
50 u8 fill0[0x151 - 0x142 - 1];
56 u8 fill1[0x159 - 0x153 - 1];
62 u8 fill2[0x16a - 0x15b - 1];
67 u8 fill3[0x170 - 0x16b - 1];
69 struct ioc3_uartregs uartb; /* 0x20170 */
70 struct ioc3_uartregs uarta; /* 0x20178 */
[all …]
/linux/drivers/hid/
H A Dhid-ids.h17 #define USB_VENDOR_ID_258A 0x258a
18 #define USB_DEVICE_ID_258A_6A88 0x6a88
20 #define USB_VENDOR_ID_3M 0x0596
21 #define USB_DEVICE_ID_3M1968 0x0500
22 #define USB_DEVICE_ID_3M2256 0x0502
23 #define USB_DEVICE_ID_3M3266 0x0506
25 #define USB_VENDOR_ID_8BITDO 0x2dc8
26 #define USB_DEVICE_ID_8BITDO_PRO_3 0x6009
28 #define USB_VENDOR_ID_A4TECH 0x09da
29 #define USB_DEVICE_ID_A4TECH_WCP32PU 0x0006
[all …]
/linux/drivers/clk/imx/
H A Dclk-imx8mn.c334 hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx8mn_clocks_probe()
343 base = devm_of_iomap(dev, np, 0, NULL); in imx8mn_clocks_probe()
350 …hws[IMX8MN_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", base + 0x0, 0, 2, pll_ref_se… in imx8mn_clocks_probe()
351 …hws[IMX8MN_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", base + 0x14, 0, 2, pll_ref_s… in imx8mn_clocks_probe()
352 …hws[IMX8MN_VIDEO_PLL_REF_SEL] = imx_clk_hw_mux("video_pll_ref_sel", base + 0x28, 0, 2, pll_ref_sel… in imx8mn_clocks_probe()
353 …hws[IMX8MN_DRAM_PLL_REF_SEL] = imx_clk_hw_mux("dram_pll_ref_sel", base + 0x50, 0, 2, pll_ref_sels,… in imx8mn_clocks_probe()
354 …hws[IMX8MN_GPU_PLL_REF_SEL] = imx_clk_hw_mux("gpu_pll_ref_sel", base + 0x64, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe()
355 …hws[IMX8MN_M7_ALT_PLL_REF_SEL] = imx_clk_hw_mux("m7_alt_pll_ref_sel", base + 0x74, 0, 2, pll_ref_s… in imx8mn_clocks_probe()
356 …hws[IMX8MN_ARM_PLL_REF_SEL] = imx_clk_hw_mux("arm_pll_ref_sel", base + 0x84, 0, 2, pll_ref_sels, A… in imx8mn_clocks_probe()
357 …hws[IMX8MN_SYS_PLL3_REF_SEL] = imx_clk_hw_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels… in imx8mn_clocks_probe()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dcikd.h27 #define BONAIRE_GB_ADDR_CONFIG_GOLDEN 0x12010001
28 #define HAWAII_GB_ADDR_CONFIG_GOLDEN 0x12011003
34 #define DIDT_SQ_CTRL0 0x0
35 # define DIDT_CTRL_EN (1 << 0)
36 #define DIDT_DB_CTRL0 0x20
37 #define DIDT_TD_CTRL0 0x40
38 #define DIDT_TCP_CTRL0 0x60
41 #define DPM_TABLE_475 0x3F768
42 # define SamuBootLevel(x) ((x) << 0)
43 # define SamuBootLevel_MASK 0x000000ff
[all …]
/linux/drivers/video/fbdev/
H A Damifb.c71 # define IS_OCS (0)
80 # define IS_ECS (0)
89 # define IS_AGA (0)
171 (0, 0) is somewhere in the upper-left corner :-)
203 (0, 0) is somewhere in the upper-left corner :-)
258 < 192 -> sprite 0 dma
373 #define CUSTOM_OFS(fld) ((long)&((struct CUSTOM*)0)->fld)
376 * BPLCON0 -- Bitplane Control Register 0
379 #define BPC0_HIRES (0x8000)
380 #define BPC0_BPU2 (0x4000) /* Bit plane used count */
[all …]
/linux/sound/hda/codecs/realtek/
H A Dalc269.c52 static const hda_nid_t alc269_ignore[] = { 0x1d, 0 }; in alc269_parse_auto_config()
53 static const hda_nid_t alc269_ssids[] = { 0, 0x1b, 0x14, 0x21 }; in alc269_parse_auto_config()
54 static const hda_nid_t alc269va_ssids[] = { 0x15, 0x1b, 0x14, 0 }; in alc269_parse_auto_config()
104 int report = 0; in alc_headset_btn_callback()
131 case 0x10ec0215: in alc_disable_headset_jack_key()
132 case 0x10ec0225: in alc_disable_headset_jack_key()
133 case 0x10ec0285: in alc_disable_headset_jack_key()
134 case 0x10ec0287: in alc_disable_headset_jack_key()
135 case 0x10ec0295: in alc_disable_headset_jack_key()
136 case 0x10ec0289: in alc_disable_headset_jack_key()
[all …]
/linux/fs/nls/
H A Dnls_cp949.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */
26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */
[all …]