/linux/fs/smb/client/ |
H A D | nterr.h | 26 #define NT_STATUS_MORE_ENTRIES 0x0105 27 #define NT_ERROR_INVALID_PARAMETER 0x0057 28 #define NT_ERROR_INSUFFICIENT_BUFFER 0x007a 29 #define NT_STATUS_1804 0x070c 30 #define NT_STATUS_NOTIFY_ENUM_DIR 0x010c 37 #define NT_STATUS_OK 0x0000 38 #define NT_STATUS_SOME_UNMAPPED 0x0107 39 #define NT_STATUS_BUFFER_OVERFLOW 0x80000005 40 #define NT_STATUS_NO_MORE_ENTRIES 0x8000001a 41 #define NT_STATUS_MEDIA_CHANGED 0x8000001c [all …]
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/linux/fs/smb/server/ |
H A D | nterr.h | 16 #define NT_STATUS_MORE_ENTRIES 0x0105 17 #define NT_ERROR_INVALID_PARAMETER 0x0057 18 #define NT_ERROR_INSUFFICIENT_BUFFER 0x007a 19 #define NT_STATUS_1804 0x070c 20 #define NT_STATUS_NOTIFY_ENUM_DIR 0x010c 21 #define NT_STATUS_INVALID_LOCK_RANGE (0xC0000000 | 0x01a1) 27 #define NT_STATUS_OK 0x0000 28 #define NT_STATUS_SOME_UNMAPPED 0x0107 29 #define NT_STATUS_BUFFER_OVERFLOW 0x80000005 30 #define NT_STATUS_NO_MORE_ENTRIES 0x8000001a [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | p1010rdb_36b.dtsi | 41 ranges = <0x0 0x0 0xf 0xee000000 0x02000000 42 0x1 0x0 0xf 0xff800000 0x00010000 43 0x3 0x0 0xf 0xffb00000 0x00000020>; 44 reg = <0xf 0xffe1e000 0 0x2000>; 48 ranges = <0x0 0xf 0xffe00000 0x100000>; 52 reg = <0xf 0xffe09000 0 0x1000>; 53 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 54 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; 55 pcie@0 { 56 ranges = <0x2000000 0x0 0xc0000000 [all …]
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H A D | mpc8572ds.dts | 19 reg = <0 0xffe05000 0 0x1000>; 21 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 22 0x1 0x0 0x0 0xe0000000 0x08000000 23 0x2 0x0 0x0 0xffa00000 0x00040000 24 0x3 0x0 0x0 0xffdf0000 0x00008000 25 0x4 0x0 0x0 0xffa40000 0x00040000 26 0x5 0x0 0x0 0xffa80000 0x00040000 27 0x6 0x0 0x0 0xffac0000 0x00040000>; 31 ranges = <0x0 0 0xffe00000 0x100000>; 35 reg = <0 0xffe08000 0 0x1000>; [all …]
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H A D | p2020ds.dts | 19 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 20 0x1 0x0 0x0 0xe0000000 0x08000000 21 0x2 0x0 0x0 0xffa00000 0x00040000 22 0x3 0x0 0x0 0xffdf0000 0x00008000 23 0x4 0x0 0x0 0xffa40000 0x00040000 24 0x5 0x0 0x0 0xffa80000 0x00040000 25 0x6 0x0 0x0 0xffac0000 0x00040000>; 26 reg = <0 0xffe05000 0 0x1000>; 30 ranges = <0x0 0x0 0xffe00000 0x100000>; 34 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 [all …]
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H A D | p1020rdb_36b.dts | 18 reg = <0xf 0xffe05000 0 0x1000>; 21 ranges = <0x0 0x0 0xf 0xef000000 0x01000000 22 0x1 0x0 0xf 0xffa00000 0x00040000 23 0x2 0x0 0xf 0xffb00000 0x00020000>; 27 ranges = <0x0 0xf 0xffe00000 0x100000>; 31 reg = <0xf 0xffe09000 0 0x1000>; 32 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 33 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; 34 pcie@0 { 35 ranges = <0x2000000 0x0 0xc0000000 [all …]
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H A D | p1021rdb-pc_36b.dts | 45 reg = <0xf 0xffe05000 0 0x1000>; 48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000 49 0x1 0x0 0xf 0xff800000 0x00040000 50 0x2 0x0 0xf 0xffb00000 0x00020000>; 54 ranges = <0x0 0xf 0xffe00000 0x100000>; 58 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 59 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; 60 reg = <0xf 0xffe09000 0 0x1000>; 61 pcie@0 { 62 ranges = <0x2000000 0x0 0xa0000000 [all …]
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H A D | p1020rdb-pc_36b.dts | 45 reg = <0xf 0xffe05000 0 0x1000>; 48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000 49 0x1 0x0 0xf 0xff800000 0x00040000 50 0x2 0x0 0xf 0xffb00000 0x00040000 51 0x3 0x0 0xf 0xffa00000 0x00020000>; 55 ranges = <0x0 0xf 0xffe00000 0x100000>; 59 reg = <0xf 0xffe09000 0 0x1000>; 60 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 61 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; 62 pcie@0 { [all …]
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H A D | ge_imp3a.dts | 22 reg = <0 0xfef05000 0 0x1000>; 24 ranges = <0x0 0x0 0x0 0xff000000 0x01000000 25 0x1 0x0 0x0 0xe0000000 0x08000000 26 0x2 0x0 0x0 0xe8000000 0x08000000 27 0x3 0x0 0x0 0xfc100000 0x00020000 28 0x4 0x0 0x0 0xfc000000 0x00008000 29 0x5 0x0 0x0 0xfc008000 0x00008000 30 0x6 0x0 0x0 0xfee00000 0x00040000 31 0x7 0x0 0x0 0xfee80000 0x00040000>; 33 /* nor@0,0 is a mirror of part of the memory in nor@1,0 [all …]
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H A D | mvme2500.dts | 29 ranges = <0x0 0 0xffe00000 0x100000>; 34 reg = <0x4c>; 39 reg = <0x68>; 40 interrupts = <8 1 0 0>; 45 reg = <0x54>; 50 reg = <0x52>; 55 reg = <0x53>; 60 reg = <0x50>; 68 flash@0 { 70 reg = <0>; [all …]
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H A D | gef_sbc310.dts | 25 reg = <0x0 0x40000000>; // set by uboot 29 reg = <0xfef05000 0x1000>; 31 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash 32 1 0 0xe0000000 0x08000000 // Paged Flash 0 33 2 0 0xe8000000 0x08000000 // Paged Flash 1 34 3 0 0xfc100000 0x00020000 // NVRAM 35 4 0 0xfc000000 0x00010000>; // FPGA 37 /* flash@0,0 is a mirror of part of the memory in flash@1,0 38 flash@0,0 { 40 reg = <0x0 0x0 0x01000000>; [all …]
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | arm,integrator-ap-lm.yaml | 15 determine if a logic module is connected at index 0, 1, 2 or 3. The logic 35 "^bus(@[0-9a-f]*)?$": 37 and are named with bus. The first module is at 0xc0000000, the second 38 at 0xd0000000 and so on until the top of the memory of the system at 39 0xffffffff. All information about the memory used by the module is 55 ranges = <0xc0000000 0xc0000000 0x40000000>; 60 ranges = <0x00000000 0xc0000000 0x10000000>; 61 /* The Logic Modules sees the Core Module 0 RAM @80000000 */ 62 dma-ranges = <0x00000000 0x80000000 0x10000000>; 68 reg = <0x00100000 0x1000>; [all …]
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/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
H A D | nv50.c | 35 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv50_gr_units() 48 if (ret == 0) { in nv50_gr_object_bind() 50 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv50_gr_object_bind() 51 nvkm_wo32(*pgpuobj, 0x04, 0x00000000); in nv50_gr_object_bind() 52 nvkm_wo32(*pgpuobj, 0x08, 0x00000000); in nv50_gr_object_bind() 53 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); in nv50_gr_object_bind() 75 if (ret == 0) { in nv50_gr_chan_bind() 100 return 0; in nv50_gr_chan_new() 108 { 0x01, "STACK_UNDERFLOW" }, 109 { 0x02, "STACK_MISMATCH" }, [all …]
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H A D | gf100.c | 53 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color() 54 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color() 55 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color() 56 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color() 58 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color() 59 nvkm_wr32(device, 0x405820, zbc); in gf100_gr_zbc_clear_color() 60 nvkm_wr32(device, 0x405824, 0x00000004); /* TRIGGER | WRITE | COLOR */ in gf100_gr_zbc_clear_color() 84 zbc = (zbc < 0) ? i : zbc; in gf100_gr_zbc_color_get() 88 if (zbc < 0) in gf100_gr_zbc_color_get() 104 nvkm_wr32(device, 0x405818, gr->zbc_depth[zbc].ds); in gf100_gr_zbc_clear_depth() [all …]
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | smu7_powertune.h | 26 #define DIDT_SQ_CTRL0__UNUSED_0_MASK 0xfffc0000 27 #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT 0x12 28 #define DIDT_TD_CTRL0__UNUSED_0_MASK 0xfffc0000 29 #define DIDT_TD_CTRL0__UNUSED_0__SHIFT 0x12 30 #define DIDT_TCP_CTRL0__UNUSED_0_MASK 0xfffc0000 31 #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12 32 #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 33 #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e 34 #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK 0xc0000000 35 #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT 0x0000001e [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx53-tqma53.dtsi | 15 reg = <0x70000000 0x40000000>; /* Up to 1GiB */ 29 pinctrl-0 = <&pinctrl_esdhc2>, 39 pinctrl-0 = <&pinctrl_uart3>; 45 pinctrl-0 = <&pinctrl_ecspi1>; 53 pinctrl-0 = <&pinctrl_esdhc3>; 62 pinctrl-0 = <&pinctrl_hog>; 67 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */ 68 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */ 69 MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */ 70 MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */ [all …]
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H A D | imx53-smd.dts | 16 reg = <0x70000000 0x40000000>; 24 gpios = <&gpio2 14 0>; 30 gpios = <&gpio2 15 0>; 38 pinctrl-0 = <&pinctrl_esdhc1>; 46 pinctrl-0 = <&pinctrl_esdhc2>; 53 pinctrl-0 = <&pinctrl_uart3>; 60 pinctrl-0 = <&pinctrl_ecspi1>; 64 zigbee: mc1323@0 { 67 reg = <0>; 77 partition@0 { [all …]
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H A D | imx53-m53evk.dts | 17 pinctrl-0 = <&pinctrl_ipu_disp1>; 44 pwms = <&pwm1 0 3000 0>; 45 brightness-levels = <0 4 8 16 32 64 128 255>; 53 pinctrl-0 = <&led_pin_gpio>; 57 gpios = <&gpio2 8 0>; 63 gpios = <&gpio2 9 0>; 73 gpio = <&gpio1 2 0>; 81 gpio = <&gpio1 4 0>; 103 pinctrl-0 = <&pinctrl_audmux>; 109 pinctrl-0 = <&pinctrl_can1>; [all …]
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/linux/arch/arm/boot/dts/arm/ |
H A D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
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/linux/arch/arm/configs/ |
H A D | dram_0xc0000000.config | 1 # Help: DRAM base at 0xc0000000 2 CONFIG_DRAM_BASE=0xc0000000
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/linux/arch/arm/boot/dts/hisilicon/ |
H A D | hip04-d01.dts | 18 memory@0,10000000 { 20 reg = <0x00000000 0x10000000 0x00000000 0xc0000000>, 21 <0x00000004 0xc0000000 0x00000003 0x40000000>;
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/linux/arch/arm64/boot/dts/socionext/ |
H A D | uniphier-ld20-akebi96.dts | 43 reg = <0 0x80000000 0 0xc0000000>; 48 reg = <0 0xc0000000 0 0x02000000>; 61 reg = <0 0xc0000000 0 0x02000000>; 75 #sound-dai-cells = <0>; 77 port@0 { 86 #sound-dai-cells = <0>; 88 port@0 { 106 #size-cells = <0>; 107 usb-over-spi@0 { 109 reg = <0>; [all …]
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/linux/arch/sh/include/cpu-sh2/cpu/ |
H A D | cache.h | 18 #define SH_CCR 0xffffffec 20 #define CCR_CACHE_CE 0x01 /* Cache enable */ 21 #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */ 22 /* 0x00000000-0x7fffffff: Write-through */ 23 /* 0x80000000-0x9fffffff: Write-back */ 24 /* 0xc0000000-0xdfffffff: Write-through */ 25 #define CCR_CACHE_CB 0x04 /* CCR[bit1=0,bit2=0] */ 26 /* 0x00000000-0x7fffffff: Write-back */ 27 /* 0x80000000-0x9fffffff: Write-through */ 28 /* 0xc0000000-0xdfffffff: Write-back */ [all …]
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/linux/tools/testing/selftests/kvm/include/x86_64/ |
H A D | processor.h | 35 #define NMI_VECTOR 0x02 39 #define X86_CR4_VME (1ul << 0) 70 u8 extended_state_area[0]; 73 #define XFEATURE_MASK_FP BIT_ULL(0) 123 kvm_static_assert((fn & 0xc0000000) == 0 || \ 124 (fn & 0xc0000000) == 0x40000000 || \ 125 (fn & 0xc0000000) == 0x80000000 || \ 126 (fn & 0xc0000000) == 0xc0000000); \ 134 #define X86_FEATURE_MWAIT KVM_X86_CPU_FEATURE(0x1, 0, ECX, 3) 135 #define X86_FEATURE_VMX KVM_X86_CPU_FEATURE(0x1, 0, ECX, 5) [all …]
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/linux/tools/testing/selftests/kvm/x86_64/ |
H A D | vmx_dirty_log_test.c | 22 #define GUEST_TEST_MEM 0xc0000000 25 #define NESTED_TEST_MEM1 0xc0001000 26 #define NESTED_TEST_MEM2 0xc0002000 82 vm_vaddr_t vmx_pages_gva = 0; in test_vmx_dirty_log() 107 * Add an identity map for GVA range [0xc0000000, 0xc0002000). This in test_vmx_dirty_log() 113 * ... pages in the L2 GPA range [0xc0001000, 0xc0003000) will map to in test_vmx_dirty_log() 114 * 0xc0000000. in test_vmx_dirty_log() 123 prepare_eptp(vmx, vm, 0); in test_vmx_dirty_log() 124 nested_map_memslot(vmx, vm, 0); in test_vmx_dirty_log() 133 memset(host_test_mem, 0xaa, TEST_MEM_PAGES * 4096); in test_vmx_dirty_log() [all …]
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