Lines Matching +full:0 +full:xc0000000
16 reg = <0x70000000 0x40000000>;
24 gpios = <&gpio2 14 0>;
30 gpios = <&gpio2 15 0>;
38 pinctrl-0 = <&pinctrl_esdhc1>;
46 pinctrl-0 = <&pinctrl_esdhc2>;
53 pinctrl-0 = <&pinctrl_uart3>;
60 pinctrl-0 = <&pinctrl_ecspi1>;
64 zigbee: mc1323@0 {
67 reg = <0>;
77 partition@0 {
79 reg = <0x0 0x40000>;
85 reg = <0x40000 0x3c0000>;
92 pinctrl-0 = <&pinctrl_esdhc3>;
99 pinctrl-0 = <&pinctrl_hog>;
104 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
105 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
106 MX53_PAD_EIM_EB2__GPIO2_30 0x80000000
107 MX53_PAD_EIM_DA13__GPIO3_13 0x80000000
108 MX53_PAD_EIM_D19__GPIO3_19 0x80000000
109 MX53_PAD_KEY_ROW2__GPIO4_11 0x80000000
110 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
116 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
117 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
118 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
124 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
125 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
126 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
127 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
128 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
129 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
135 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
136 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
137 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
138 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
139 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
140 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
146 MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
147 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
148 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
149 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
150 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
151 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
152 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
153 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
154 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
155 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
161 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
162 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
163 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
164 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
165 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
166 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
167 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
168 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
169 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
170 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
176 MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000
177 MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000
183 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
184 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
190 MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1c4
191 MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1c4
192 MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1c4
193 MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1c4
194 MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1c4
195 MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1c4
196 MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1c4
197 MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1c4
198 MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4
199 MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1e4
200 MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1e4
201 MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4
207 MX53_PAD_NANDF_WP_B__GPIO6_9 0x1e4
208 MX53_PAD_NANDF_RB0__GPIO6_10 0x1e4
209 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
215 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
216 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
222 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
223 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
229 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
230 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
231 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
232 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
240 pinctrl-0 = <&pinctrl_uart1>;
246 pinctrl-0 = <&pinctrl_uart2>;
252 pinctrl-0 = <&pinctrl_i2c2>;
257 reg = <0x0a>;
262 reg = <0x0e>;
267 reg = <0x5a>;
273 pinctrl-0 = <&pinctrl_i2c1>;
278 reg = <0x1c>;
283 reg = <0x3c>;
285 pinctrl-0 = <&pinctrl_ov5642>;
290 assigned-clock-rates = <0>, <24000000>;
310 reg = <0x48>;
330 pinctrl-0 = <&pinctrl_fec>;
345 pinctrl-0 = <&pinctrl_ipu_csi0>;