1*03d679bfSLinus Walleij# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*03d679bfSLinus Walleij%YAML 1.2 3*03d679bfSLinus Walleij--- 4*03d679bfSLinus Walleij$id: http://devicetree.org/schemas/bus/arm,integrator-ap-lm.yaml# 5*03d679bfSLinus Walleij$schema: http://devicetree.org/meta-schemas/core.yaml# 6*03d679bfSLinus Walleij 7*03d679bfSLinus Walleijtitle: Integrator/AP Logic Module extension bus 8*03d679bfSLinus Walleij 9*03d679bfSLinus Walleijmaintainers: 10*03d679bfSLinus Walleij - Linus Walleij <linusw@kernel.org> 11*03d679bfSLinus Walleij 12*03d679bfSLinus Walleijdescription: The Integrator/AP is a prototyping platform and as such has a 13*03d679bfSLinus Walleij site for stacking up to four logic modules (LM) designed specifically for 14*03d679bfSLinus Walleij use with this platform. A special system controller register can be read to 15*03d679bfSLinus Walleij determine if a logic module is connected at index 0, 1, 2 or 3. The logic 16*03d679bfSLinus Walleij module connector is described in this binding. The logic modules per se 17*03d679bfSLinus Walleij then have their own specific per-module bindings and they will be described 18*03d679bfSLinus Walleij as subnodes under this logic module extension bus. 19*03d679bfSLinus Walleij 20*03d679bfSLinus Walleijproperties: 21*03d679bfSLinus Walleij "#address-cells": 22*03d679bfSLinus Walleij const: 1 23*03d679bfSLinus Walleij 24*03d679bfSLinus Walleij "#size-cells": 25*03d679bfSLinus Walleij const: 1 26*03d679bfSLinus Walleij 27*03d679bfSLinus Walleij compatible: 28*03d679bfSLinus Walleij items: 29*03d679bfSLinus Walleij - const: arm,integrator-ap-lm 30*03d679bfSLinus Walleij 31*03d679bfSLinus Walleij ranges: true 32*03d679bfSLinus Walleij dma-ranges: true 33*03d679bfSLinus Walleij 34*03d679bfSLinus WalleijpatternProperties: 35*03d679bfSLinus Walleij "^bus(@[0-9a-f]*)?$": 36*03d679bfSLinus Walleij description: Nodes on the Logic Module bus represent logic modules 37*03d679bfSLinus Walleij and are named with bus. The first module is at 0xc0000000, the second 38*03d679bfSLinus Walleij at 0xd0000000 and so on until the top of the memory of the system at 39*03d679bfSLinus Walleij 0xffffffff. All information about the memory used by the module is 40*03d679bfSLinus Walleij in ranges and dma-ranges. 41*03d679bfSLinus Walleij type: object 42*03d679bfSLinus Walleij 43*03d679bfSLinus Walleij required: 44*03d679bfSLinus Walleij - compatible 45*03d679bfSLinus Walleij 46*03d679bfSLinus Walleijrequired: 47*03d679bfSLinus Walleij - compatible 48*03d679bfSLinus Walleij 49*03d679bfSLinus Walleijexamples: 50*03d679bfSLinus Walleij - | 51*03d679bfSLinus Walleij bus@c0000000 { 52*03d679bfSLinus Walleij compatible = "arm,integrator-ap-lm"; 53*03d679bfSLinus Walleij #address-cells = <1>; 54*03d679bfSLinus Walleij #size-cells = <1>; 55*03d679bfSLinus Walleij ranges = <0xc0000000 0xc0000000 0x40000000>; 56*03d679bfSLinus Walleij dma-ranges; 57*03d679bfSLinus Walleij 58*03d679bfSLinus Walleij bus@c0000000 { 59*03d679bfSLinus Walleij compatible = "simple-bus"; 60*03d679bfSLinus Walleij ranges = <0x00000000 0xc0000000 0x10000000>; 61*03d679bfSLinus Walleij /* The Logic Modules sees the Core Module 0 RAM @80000000 */ 62*03d679bfSLinus Walleij dma-ranges = <0x00000000 0x80000000 0x10000000>; 63*03d679bfSLinus Walleij #address-cells = <1>; 64*03d679bfSLinus Walleij #size-cells = <1>; 65*03d679bfSLinus Walleij 66*03d679bfSLinus Walleij serial@100000 { 67*03d679bfSLinus Walleij compatible = "arm,pl011", "arm,primecell"; 68*03d679bfSLinus Walleij reg = <0x00100000 0x1000>; 69*03d679bfSLinus Walleij interrupts-extended = <&impd1_vic 1>; 70*03d679bfSLinus Walleij }; 71*03d679bfSLinus Walleij 72*03d679bfSLinus Walleij impd1_vic: interrupt-controller@3000000 { 73*03d679bfSLinus Walleij compatible = "arm,pl192-vic"; 74*03d679bfSLinus Walleij interrupt-controller; 75*03d679bfSLinus Walleij #interrupt-cells = <1>; 76*03d679bfSLinus Walleij reg = <0x03000000 0x1000>; 77*03d679bfSLinus Walleij valid-mask = <0x00000bff>; 78*03d679bfSLinus Walleij interrupts-extended = <&pic 9>; 79*03d679bfSLinus Walleij }; 80*03d679bfSLinus Walleij }; 81*03d679bfSLinus Walleij }; 82*03d679bfSLinus Walleij 83*03d679bfSLinus WalleijadditionalProperties: false 84