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/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml228 reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
229 <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
230 <0 0x01300000 0 0x50000>;
/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_hfi.c36 return 0; in a6xx_hfi_queue_read()
54 for (i = 0; i < HFI_HEADER_SIZE(hdr); i++) { in a6xx_hfi_queue_read()
84 for (i = 0; i < dwords; i++) { in a6xx_hfi_queue_write()
92 queue->data[index] = 0xfafafafa; in a6xx_hfi_queue_write()
98 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
99 return 0; in a6xx_hfi_queue_write()
167 return 0; in a6xx_hfi_wait_for_ack()
178 seqnum = atomic_inc_return(&queue->seqnum) % 0xfff; in a6xx_hfi_send_msg()
196 struct a6xx_hfi_msg_gmu_init_cmd msg = { 0 }; in a6xx_hfi_send_gmu_init()
203 NULL, 0); in a6xx_hfi_send_gmu_init()
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml147 reg = <0x03c00000 0xa0000>;
155 reg = <0x30000000 0x50000>;
158 ranges = <0x0 0x30000000 0x50000>;
161 reg = <0x4e000 0x1000>;
167 reg = <0x4f000 0x1000>;
191 #size-cells = <0>;
/linux/arch/arm/mach-orion5x/
H A Dorion5x.h36 #define ORION5X_REGS_PHYS_BASE 0xf1000000
37 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
40 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
41 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
44 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
45 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
48 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
52 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
53 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
56 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
[all …]
/linux/arch/mips/boot/dts/ralink/
H A Drt2880_eval.dts10 memory@0 {
12 reg = <0x8000000 0x2000000>;
21 reg = <0x1f000000 0x400000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x3b0000>;
H A Drt3052_eval.dts10 memory@0 {
12 reg = <0x0 0x2000000>;
21 reg = <0x1f000000 0x800000>;
28 partition@0 {
30 reg = <0x0 0x30000>;
35 reg = <0x30000 0x10000>;
40 reg = <0x40000 0x10000>;
45 reg = <0x50000 0x7b0000>;
H A Dmt7621-gnubee-gb-pc1.dts13 memory@0 {
15 reg = <0x00000000 0x1c000000>,
16 <0x20000000 0x04000000>;
57 flash@0 {
61 reg = <0>;
65 partition@0 {
67 reg = <0x0 0x30000>;
73 reg = <0x30000 0x10000>;
79 reg = <0x40000 0x10000>;
85 reg = <0x50000 0x1fb0000>;
[all …]
H A Dmt7621-gnubee-gb-pc2.dts13 memory@0 {
15 reg = <0x00000000 0x1c000000>,
16 <0x20000000 0x04000000>;
77 flash@0 {
81 reg = <0>;
85 partition@0 {
87 reg = <0x0 0x30000>;
93 reg = <0x30000 0x10000>;
99 reg = <0x40000 0x10000>;
105 reg = <0x50000 0x1fb0000>;
[all …]
/linux/drivers/crypto/
H A Dgeode-aes.h9 #define AES_MODE_ECB 0
12 #define AES_DIR_DECRYPT 0
15 #define AES_FLAGS_HIDDENKEY (1 << 0)
19 #define AES_CTRLA_REG 0x0000
21 #define AES_CTRL_START 0x01
22 #define AES_CTRL_DECRYPT 0x00
23 #define AES_CTRL_ENCRYPT 0x02
24 #define AES_CTRL_WRKEY 0x04
25 #define AES_CTRL_DCA 0x08
26 #define AES_CTRL_SCA 0x10
[all …]
/linux/arch/arm/mach-mmp/
H A Daddr-map.h15 #define APB_PHYS_BASE 0xd4000000
16 #define APB_VIRT_BASE IOMEM(0xfe000000)
17 #define APB_PHYS_SIZE 0x00200000
19 #define AXI_PHYS_BASE 0xd4200000
20 #define AXI_VIRT_BASE IOMEM(0xfe200000)
21 #define AXI_PHYS_SIZE 0x00200000
23 #define PGU_PHYS_BASE 0xe0000000
24 #define PGU_VIRT_BASE IOMEM(0xfe400000)
25 #define PGU_PHYS_SIZE 0x00100000
27 /* Static Memory Controller - Chip Select 0 and 1 */
[all …]
/linux/arch/arm/boot/dts/st/
H A Dspear600-evb.dts17 reg = <0 0x10000000>;
55 reg = <0xf8000000 0x800000>;
63 partition@0 {
65 reg = <0x0 0x10000>;
69 reg = <0x10000 0x50000>;
73 reg = <0x60000 0x10000>;
77 reg = <0x70000 0x10000>;
81 reg = <0x80000 0x310000>;
85 reg = <0x390000 0x0>;
H A Dspear310-evb.dts18 reg = <0 0x40000000>;
24 pinctrl-0 = <&state_default>;
102 reg = <0xf8000000 0x800000>;
105 partition@0 {
107 reg = <0x0 0x10000>;
111 reg = <0x10000 0x50000>;
115 reg = <0x60000 0x10000>;
119 reg = <0x70000 0x10000>;
123 reg = <0x80000 0x310000>;
127 reg = <0x390000 0x0>;
[all …]
H A Dspear320-evb.dts18 reg = <0 0x40000000>;
25 pinctrl-0 = <&state_default>;
103 reg = <0xf8000000 0x800000>;
106 partition@0 {
108 reg = <0x0 0x10000>;
112 reg = <0x10000 0x50000>;
116 reg = <0x60000 0x10000>;
120 reg = <0x70000 0x10000>;
124 reg = <0x80000 0x310000>;
128 reg = <0x390000 0x0>;
[all …]
H A Dspear300-evb.dts18 reg = <0 0x40000000>;
25 pinctrl-0 = <&state_default>;
77 cd-gpios = <&gpio1 0 0>;
88 reg = <0xf8000000 0x800000>;
91 partition@0 {
93 reg = <0x0 0x10000>;
97 reg = <0x10000 0x50000>;
101 reg = <0x60000 0x10000>;
105 reg = <0x70000 0x10000>;
109 reg = <0x80000 0x310000>;
[all …]
/linux/include/uapi/linux/genwqe/
H A Dgenwqe_card.h36 #define GENWQE_TYPE_ALTERA_230 0x00 /* GenWQE4 Stratix-IV-230 */
37 #define GENWQE_TYPE_ALTERA_530 0x01 /* GenWQE4 Stratix-IV-530 */
38 #define GENWQE_TYPE_ALTERA_A4 0x02 /* GenWQE5 A4 Stratix-V-A4 */
39 #define GENWQE_TYPE_ALTERA_A7 0x03 /* GenWQE5 A7 Stratix-V-A7 */
43 #define GENWQE_SLU_OFFS GENWQE_UID_OFFS(0)
49 #define IO_EXTENDED_ERROR_POINTER 0x00000048
50 #define IO_ERROR_INJECT_SELECTOR 0x00000060
51 #define IO_EXTENDED_DIAG_SELECTOR 0x00000070
52 #define IO_EXTENDED_DIAG_READ_MBX 0x00000078
53 #define IO_EXTENDED_DIAG_MAP(ring) (0x00000500 | ((ring) << 3))
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-bman-portals.dtsi14 bman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
26 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
32 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
38 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
44 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
50 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
56 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
62 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
68 reg = <0x80000 0x4000>, <0x4080000 0x4000>;
[all …]
H A Dqoriq-qman-portals.dtsi14 qportal0: qman-portal@0 {
20 reg = <0x0 0x4000>, <0x4000000 0x4000>;
22 cell-index = <0>;
27 reg = <0x10000 0x4000>, <0x4010000 0x4000>;
34 reg = <0x20000 0x4000>, <0x4020000 0x4000>;
41 reg = <0x30000 0x4000>, <0x4030000 0x4000>;
48 reg = <0x40000 0x4000>, <0x4040000 0x4000>;
55 reg = <0x50000 0x4000>, <0x4050000 0x4000>;
62 reg = <0x60000 0x4000>, <0x4060000 0x4000>;
69 reg = <0x70000 0x4000>, <0x4070000 0x4000>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62p-main.dtsi11 reg = <0x00 0x0f910000 0x00 0x800>,
12 <0x00 0x0f918000 0x00 0x400>;
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
24 reg = <0x00 0x31100000 0x00 0x50000>;
25 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
26 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
37 reg = <0x00 0x70000000 0x00 0x10000>;
38 ranges = <0x00 0x00 0x70000000 0x10000>;
47 <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>,
60 gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Db4860si-post.dtsi37 /* controller at 0x200000 */
64 dcsr-epu@0 {
79 reg = <0x13000 0x1000>;
96 reg = <0x108000 0x1000 0x109000 0x1000>;
101 reg = <0x110000 0x1000 0x111000 0x1000>;
106 reg = <0x118000 0x1000 0x119000 0x1000>;
113 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
114 interrupts = <133 2 0 0>;
118 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
119 interrupts = <135 2 0 0>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7180-lpasscorecc.yaml86 reg = <0x63000000 0x28>;
99 reg = <0x62d00000 0x50000>, <0x62780000 0x30000>;
/linux/arch/arm/boot/dts/microchip/
H A Dat91rm9200ek.dts19 reg = <0x20000000 0x4000000>;
35 timer@0 {
37 reg = <0>, <1>;
63 pinctrl-0 =
75 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
76 flash@0 {
79 reg = <0>;
99 reg = <0x10000000 0x800000>;
100 linux,mtd-name = "physmap-flash.0";
105 barebox@0 {
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dti,am62-usb.yaml62 "^usb@[0-9a-f]+$":
88 reg = <0x00 0x0f910000 0x00 0x800>,
89 <0x00 0x0f918000 0x00 0x400>;
92 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
99 reg = <0x00 0x31100000 0x00 0x50000>;
100 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
101 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
/linux/Documentation/devicetree/bindings/access-controllers/
H A Daccess-controllers.yaml66 reg = <0x50000 0x400>;
71 reg = <0x60000 0x10000>;
78 reg = <0x60100 0x400>;
/linux/arch/mips/include/asm/sgi/
H A Dheart.h24 #define HEART_XKPHYS_BASE ((void *)(IO_BASE | 0x000000000ff00000ULL))
47 * @__pad0: 0x0f40 bytes of padding -> next HEART register 0x01000.
49 * @__pad1: 0xeff8 bytes of padding -> next HEART register 0x10000.
56 * @__pad2: 0xffb8 bytes of padding -> next HEART register 0x20000.
58 * @__pad3: 0xfff8 bytes of padding -> next HEART register 0x30000.
60 * @__pad4: 0xfff8 bytes of padding -> next HEART register 0x40000.
62 * @__pad5: 0xfff8 bytes of padding -> next HEART register 0x50000.
64 * @__pad6: 0xfff8 bytes of padding -> next HEART register 0x60000.
79 struct ip30_heart_regs { /* 0x0ff00000 */
80 u64 mode; /* + 0x00000 */
[all …]

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