Searched +full:0 +full:x18013000 (Results 1 – 7 of 7) sorted by relevance
117 reg = <0x18012000 0x1000>;120 interrupt-map-mask = <0 0 0 0>;121 interrupt-map = <0 0 0 0 [all...]
77 reg = <0x18012000 0x1000>;80 interrupt-map-mask = <0 0 0 0>;81 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;83 linux,pci-domain = <0>;85 bus-range = <0x00 0xff>;90 ranges = <0x81000000 0 0 0x28000000 0 0x0001000091 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;93 phys = <&phy 0 5>;97 brcm,pcie-ob-axi-offset = <0x00000000>;115 reg = <0x18013000 0x1000>;[all …]
45 #size-cells = <0>;47 cpu0: cpu@0 {51 reg = <0x0>;64 ranges = <0x00000000 0x19000000 0x00023000>;68 a9pll: arm_clk@0 {69 #clock-cells = <0>;72 reg = <0x0 0x100[all...]
48 memory@0 {50 reg = <0 0>;55 #size-cells = <0>;57 cpu@0 {61 reg = <0x0>;74 ranges = <0x00000000 0x19000000 0x1000000>;80 reg = <0x2020[all...]
54 #size-cells = <0>;56 cpu0: cpu@0 {60 reg = <0x0>;68 secondary-boot-reg = <0xffff0fec>;69 reg = <0x1>;82 ranges = <0x00000000 0x19000000 0x00023000>;86 a9pll: arm_clk@0 {87 #clock-cells = <0>;[all...]
42 #define MT_MCU_INT_EVENT 0x210843 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)48 #define MT_PLE_BASE 0x820c000051 #define MT_FL_Q_EMPTY MT_PLE(0x360)52 #define MT_FL_Q0_CTRL MT_PLE(0x3e0)53 #define MT_FL_Q2_CTRL MT_PLE(0x3e8)54 #define MT_FL_Q3_CTRL MT_PLE(0x3ec)56 #define MT_PLE_FREEPG_CNT MT_PLE(0x380)57 #define MT_PLE_FREEPG_HEAD_TAIL MT_PLE(0x384)58 #define MT_PLE_PG_HIF_GROUP MT_PLE(0x00c)[all …]
129 #define MT_MCU_WFDMA0_BASE 0x2000132 #define MT_MCU_WFDMA0_DUMMY_CR MT_MCU_WFDMA0(0x120)135 #define MT_MCU_WFDMA1_BASE 0x3000139 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)145 #define MT_PLE_BASE 0x820c0000148 #define MT_PLE_HOST_RPT0 MT_PLE(0x030)153 #define MT_FL_Q2_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0x8)154 #define MT_FL_Q3_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0xc)164 #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2))166 #define MT_PSE_BASE 0x820c8000[all …]