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/linux/arch/arm/mach-omap2/
H A Domap-headsmp.S22 #define AUX_CORE_BOOT0_PA 0x48281800
23 #define API_HYP_ENTRY 0x102
46 mrc p15, 0, r4, c0, c0, 5
47 and r4, r4, #0x0f
64 mrc p15, 0, r4, c0, c0, 5
65 and r4, r4, #0x0f
70 smc #0
82 hold: ldr r12,=0x103
84 smc #0 @ read from AuxCoreBoot0
86 mrc p15, 0, r4, c0, c0, 5
[all …]
H A Domap-smc.S30 smc #0
46 mov r1, #0x0 @ Process ID
47 mov r6, #0xff
48 mov r12, #0x00 @ Secure Service ID
49 mov r7, #0
50 mcr p15, 0, r7, c7, c5, 6
53 smc #0
68 mov r6, #0xff @ Indicate new Task call
76 ldr r12, =0x104
78 smc #0
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_abm.c52 #define MCP_ABM_LEVEL_SET 0x65
53 #define MCP_ABM_PIPE_SET 0x66
54 #define MCP_BL_SET 0x67
61 uint32_t rampingBoundary = 0xFFFF; in dce_abm_set_pipe()
66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
93 unsigned int backlight_8_bit = 0; in dmcu_set_backlight_level()
96 if (backlight_pwm_u16_16 & 0x10000) in dmcu_set_backlight_level()
98 backlight_8_bit = 0xFF; in dmcu_set_backlight_level()
101 backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; in dmcu_set_backlight_level()
[all …]
/linux/drivers/media/usb/au0828/
H A Dau0828-reg.h11 #define REG_000 0x000
12 #define REG_001 0x001
13 #define REG_002 0x002
14 #define REG_003 0x003
16 #define AU0828_SENSORCTRL_100 0x100
17 #define AU0828_SENSORCTRL_VBI_103 0x103
20 #define AU0828_I2C_TRIGGER_200 0x200
21 #define AU0828_I2C_STATUS_201 0x201
22 #define AU0828_I2C_CLK_DIVIDER_202 0x202
23 #define AU0828_I2C_DEST_ADDR_203 0x203
[all …]
/linux/drivers/gpu/drm/xe/abi/
H A Dguc_errors_abi.h10 XE_GUC_RESPONSE_STATUS_SUCCESS = 0x0,
11 XE_GUC_RESPONSE_ERROR_PROTOCOL = 0x04,
12 XE_GUC_RESPONSE_INVALID_STATE = 0x0A,
13 XE_GUC_RESPONSE_UNSUPPORTED_VERSION = 0x0B,
14 XE_GUC_RESPONSE_INVALID_VFID = 0x0C,
15 XE_GUC_RESPONSE_UNPROVISIONED_VF = 0x0D,
16 XE_GUC_RESPONSE_INVALID_EVENT = 0x0E,
17 XE_GUC_RESPONSE_NOT_SUPPORTED = 0x20,
18 XE_GUC_RESPONSE_UNKNOWN_ACTION = 0x30,
19 XE_GUC_RESPONSE_ACTION_ABORTED = 0x31,
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dusb_a9g20-dab-mmx.dtsi21 i2c-gpio@0 {
69 #size-cells = <0>;
74 linux,code = <0x100>;
80 linux,code = <0x101>;
86 linux,code = <0x102>;
92 linux,code = <0x103>;
H A Dat91-foxg20.dts21 reg = <0x20000000 0x4000000>;
37 timer@0 {
39 reg = <0>, <1>;
54 pinctrl-0 = <
68 pinctrl-0 =
121 pinctrl_i2c0: i2c0-0 {
140 i2c-gpio-0 {
142 pinctrl-0 = <&pinctrl_i2c0>;
164 linux,code = <0x103>;
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
/linux/include/linux/mfd/
H A Didt82p33_reg.h10 #define REG_ADDR(page, offset) (((page) << 0x7) | ((offset) & 0x7f))
13 #define DPLL1_TOD_CNFG 0x134
14 #define DPLL2_TOD_CNFG 0x1B4
16 #define DPLL1_TOD_STS 0x10B
17 #define DPLL2_TOD_STS 0x18B
19 #define DPLL1_TOD_TRIGGER 0x115
20 #define DPLL2_TOD_TRIGGER 0x195
22 #define DPLL1_OPERATING_MODE_CNFG 0x120
23 #define DPLL2_OPERATING_MODE_CNFG 0x1A0
25 #define DPLL1_HOLDOVER_FREQ_CNFG 0x12C
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6prm.h7 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100
9 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101
11 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102
13 #define Q6PRM_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103
15 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_IBIT 0x104
17 #define Q6PRM_LPASS_CLK_ID_TER_MI2S_EBIT 0x105
19 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106
21 #define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_EBIT 0x107
23 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_IBIT 0x108
25 #define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_EBIT 0x109
[all …]
/linux/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dcache.json79 "EventCode": "0x34",
85 "EventCode": "0x35",
91 "EventCode": "0x102",
97 "EventCode": "0x103",
103 "EventCode": "0x104",
109 "EventCode": "0x105",
115 "EventCode": "0x106",
121 "EventCode": "0x107",
127 "EventCode": "0x111",
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
[all …]
/linux/fs/smb/server/
H A Dsmb_common.h19 #define SMB1_PROT 0
27 #define BAD_PROT 0xFFFF
41 #define MAX_STREAM_PROT_LEN 0x00FFFFFF
44 #define F_SUPERSEDED 0
52 #define ATTR_POSIX_SEMANTICS 0x01000000
53 #define ATTR_BACKUP_SEMANTICS 0x02000000
54 #define ATTR_DELETE_ON_CLOSE 0x04000000
55 #define ATTR_SEQUENTIAL_SCAN 0x08000000
56 #define ATTR_RANDOM_ACCESS 0x10000000
57 #define ATTR_NO_BUFFERING 0x20000000
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6755.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0x000>;
36 reg = <0x001>;
43 reg = <0x002>;
50 reg = <0x003>;
57 reg = <0x100>;
64 reg = <0x101>;
71 reg = <0x102>;
78 reg = <0x103>;
[all …]
/linux/include/uapi/sound/
H A Dskl-tplg-interface.h16 * Default types range from 0~12. type can range from 0 to 0xff
19 #define SKL_CONTROL_TYPE_BYTE_TLV 0x100
20 #define SKL_CONTROL_TYPE_MIC_SELECT 0x102
21 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT 0x103
22 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC 0x104
30 /* Reserve event type 0 for no event handlers */
32 SKL_EVENT_NONE = 0,
57 SKL_CH_CFG_MONO = 0,
75 SKL_MODULE_TYPE_MIXER = 0,
86 SKL_AFFINITY_CORE_0 = 0,
[all …]
H A Dtlv.h6 #define SNDRV_CTL_TLVT_CONTAINER 0 /* one level down - group of TLVs */
17 #define SNDRV_CTL_TLVT_CHMAP_FIXED 0x101 /* fixed channel position */
18 #define SNDRV_CTL_TLVT_CHMAP_VAR 0x102 /* channels freely swappable */
19 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
35 #define SNDRV_CTL_TLVO_TYPE 0
45 #define SNDRV_CTL_TLVD_DB_SCALE_MASK 0xffff
46 #define SNDRV_CTL_TLVD_DB_SCALE_MUTE 0x10000
51 ((mute) ? SNDRV_CTL_TLVD_DB_SCALE_MUTE : 0))
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12b.dtsi13 #address-cells = <0x2>;
14 #size-cells = <0x0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
59 reg = <0x0 0x1>;
69 reg = <0x0 0x100>;
79 reg = <0x0 0x101>;
89 reg = <0x0 0x102>;
99 reg = <0x0 0x103>;
H A Damlogic-t7.dtsi16 #address-cells = <0x2>;
17 #size-cells = <0x0>;
54 reg = <0x0 0x100>;
61 reg = <0x0 0x101>;
68 reg = <0x0 0x102>;
75 reg = <0x0 0x103>;
79 cpu0: cpu@0 {
82 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
96 reg = <0x0 0x2>;
[all …]
/linux/arch/powerpc/include/asm/
H A Dreg_fsl_emb.h38 #define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
39 #define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
40 #define PMRN_PMC2 0x012 /* Performance Monitor Counter 2 */
41 #define PMRN_PMC3 0x013 /* Performance Monitor Counter 3 */
42 #define PMRN_PMC4 0x014 /* Performance Monitor Counter 4 */
43 #define PMRN_PMC5 0x015 /* Performance Monitor Counter 5 */
44 #define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
45 #define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
46 #define PMRN_PMLCA2 0x092 /* PM Local Control A2 */
47 #define PMRN_PMLCA3 0x093 /* PM Local Control A3 */
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-mpic4.3.dtsi2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
37 #address-cells = <0>;
39 reg = <0x40000 0x40000>;
42 clock-frequency = <0x0>;
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
56 reg = <0x41600 0x200 0x44148 4>;
[all …]
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmsi-pic.txt45 reg = <0x41600 0x80>;
46 msi-available-ranges = <0 0x100>;
48 0xe0 0
49 0xe1 0
50 0xe2 0
51 0xe3 0
52 0xe4 0
53 0xe5 0
54 0xe6 0
55 0xe7 0>;
[all …]
/linux/include/scsi/fc/
H A Dfc_ms.h25 #define FC_FDMI_SUBTYPE 0x10 /* fs_ct_hdr.ct_fs_subtype */
37 FC_FDMI_GRHL = 0x0100, /* Get Registered HBA List */
38 FC_FDMI_GHAT = 0x0101, /* Get HBA Attributes */
39 FC_FDMI_GRPL = 0x0102, /* Get Registered Port List */
40 FC_FDMI_GPAT = 0x0110, /* Get Port Attributes */
41 FC_FDMI_RHBA = 0x0200, /* Register HBA */
42 FC_FDMI_RHAT = 0x0201, /* Register HBA Attributes */
43 FC_FDMI_RPRT = 0x0210, /* Register Port */
44 FC_FDMI_RPA = 0x0211, /* Register Port Attributes */
45 FC_FDMI_DHBA = 0x0300, /* Deregister HBA */
[all …]
/linux/fs/smb/client/
H A Dcifspdu.h16 #define CIFS_PROT 0
18 #define BAD_PROT 0xFFFF
21 * Note some commands have minimal (wct=0,bcc=0), or uninteresting, responses
25 #define SMB_COM_CREATE_DIRECTORY 0x00 /* trivial response */
26 #define SMB_COM_DELETE_DIRECTORY 0x01 /* trivial response */
27 #define SMB_COM_CLOSE 0x04 /* triv req/rsp, timestamp ignored */
28 #define SMB_COM_FLUSH 0x05 /* triv req/rsp */
29 #define SMB_COM_DELETE 0x06 /* trivial response */
30 #define SMB_COM_RENAME 0x07 /* trivial response */
31 #define SMB_COM_QUERY_INFORMATION 0x08 /* aka getattr */
[all …]
/linux/drivers/media/pci/tw686x/
H A Dtw686x-regs.h6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe})
7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \
8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \
9 a0 + 0x38})
10 #define INT_STATUS 0x00
11 #define PB_STATUS 0x01
12 #define DMA_CMD 0x02
13 #define VIDEO_FIFO_STATUS 0x03
14 #define VIDEO_CHANNEL_ID 0x04
15 #define VIDEO_PARSER_STATUS 0x05
[all …]
/linux/tools/perf/pmu-events/arch/nds32/n13/
H A Datcpmu.json4 "EventCode": "0x102",
10 "EventCode": "0x103",
16 "EventCode": "0x104",
22 "EventCode": "0x105",
28 "EventCode": "0x106",
34 "EventCode": "0x107",
40 "EventCode": "0x108",
46 "EventCode": "0x109",
52 "EventCode": "0x10a",
58 "EventCode": "0x10b",
[all …]
/linux/arch/arm/boot/dts/intel/axm/
H A Daxm5516-cpus.dtsi11 #size-cells = <0>;
72 CPU0: cpu@0 {
75 reg = <0x00>;
77 cpu-release-addr = <0>; // Fixed by the boot loader
83 reg = <0x01>;
85 cpu-release-addr = <0>; // Fixed by the boot loader
91 reg = <0x02>;
93 cpu-release-addr = <0>; // Fixed by the boot loader
99 reg = <0x03>;
101 cpu-release-addr = <0>; // Fixed by the boot loader
[all …]

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