1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6
7 #include "hal_desc.h"
8 #include "../dp_mon.h"
9 #include "dp_mon.h"
10 #include "../debug.h"
11 #include "hal_qcn9274.h"
12 #include "dp_rx.h"
13 #include "../dp_tx.h"
14 #include "../peer.h"
15
16 static void
ath12k_wifi7_dp_mon_hal_aggr_tlv(struct hal_rx_mon_ppdu_info * ppdu_info,u16 tlv_len,const void * tlv_data)17 ath12k_wifi7_dp_mon_hal_aggr_tlv(struct hal_rx_mon_ppdu_info *ppdu_info,
18 u16 tlv_len, const void *tlv_data)
19 {
20 if (tlv_len <= HAL_RX_MON_MAX_AGGR_SIZE - ppdu_info->tlv_aggr.cur_len) {
21 memcpy(ppdu_info->tlv_aggr.buf + ppdu_info->tlv_aggr.cur_len,
22 tlv_data, tlv_len);
23 ppdu_info->tlv_aggr.cur_len += tlv_len;
24 }
25 }
26
27 static void
ath12k_wifi7_dp_mon_rx_memset_ppdu_info(struct hal_rx_mon_ppdu_info * ppdu_info)28 ath12k_wifi7_dp_mon_rx_memset_ppdu_info(struct hal_rx_mon_ppdu_info *ppdu_info)
29 {
30 memset(ppdu_info, 0, sizeof(*ppdu_info));
31 ppdu_info->peer_id = HAL_INVALID_PEERID;
32 }
33
34 /* Hardware fill buffer with 128 bytes aligned. So need to reap it
35 * with 128 bytes aligned.
36 */
37 #define RXDMA_DATA_DMA_BLOCK_SIZE 128
38
39 static void
ath12k_wifi7_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info * info,bool * is_frag,u32 * total_len,u32 * frag_len,u32 * msdu_cnt)40 ath12k_wifi7_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info *info,
41 bool *is_frag, u32 *total_len,
42 u32 *frag_len, u32 *msdu_cnt)
43 {
44 if (info->msdu_flags & RX_MSDU_DESC_INFO0_MSDU_CONTINUATION) {
45 *is_frag = true;
46 *frag_len = (RX_MON_STATUS_BASE_BUF_SIZE -
47 sizeof(struct hal_rx_desc)) &
48 ~(RXDMA_DATA_DMA_BLOCK_SIZE - 1);
49 *total_len += *frag_len;
50 } else {
51 if (*is_frag)
52 *frag_len = info->msdu_len - *total_len;
53 else
54 *frag_len = info->msdu_len;
55
56 *msdu_cnt -= 1;
57 }
58 }
59
60 static void
ath12k_wifi7_dp_mon_rx_handle_ofdma_info(const struct hal_rx_ppdu_end_user_stats * ppdu_end_user,struct hal_rx_user_status * rx_user_status)61 ath12k_wifi7_dp_mon_rx_handle_ofdma_info(const struct hal_rx_ppdu_end_user_stats *ppdu_end_user,
62 struct hal_rx_user_status *rx_user_status)
63 {
64 rx_user_status->ul_ofdma_user_v0_word0 =
65 __le32_to_cpu(ppdu_end_user->usr_resp_ref);
66 rx_user_status->ul_ofdma_user_v0_word1 =
67 __le32_to_cpu(ppdu_end_user->usr_resp_ref_ext);
68 }
69
70 static void
ath12k_wifi7_dp_mon_rx_populate_byte_count(const struct hal_rx_ppdu_end_user_stats * stats,void * ppduinfo,struct hal_rx_user_status * rx_user_status)71 ath12k_wifi7_dp_mon_rx_populate_byte_count(const struct hal_rx_ppdu_end_user_stats *stats,
72 void *ppduinfo,
73 struct hal_rx_user_status *rx_user_status)
74 {
75 rx_user_status->mpdu_ok_byte_count =
76 le32_get_bits(stats->info7,
77 HAL_RX_PPDU_END_USER_STATS_INFO7_MPDU_OK_BYTE_COUNT);
78 rx_user_status->mpdu_err_byte_count =
79 le32_get_bits(stats->info8,
80 HAL_RX_PPDU_END_USER_STATS_INFO8_MPDU_ERR_BYTE_COUNT);
81 }
82
83 static void
ath12k_wifi7_dp_mon_rx_populate_mu_user_info(const struct hal_rx_ppdu_end_user_stats * rx_tlv,struct hal_rx_mon_ppdu_info * ppdu_info,struct hal_rx_user_status * rx_user_status)84 ath12k_wifi7_dp_mon_rx_populate_mu_user_info(const struct hal_rx_ppdu_end_user_stats *rx_tlv,
85 struct hal_rx_mon_ppdu_info *ppdu_info,
86 struct hal_rx_user_status *rx_user_status)
87 {
88 rx_user_status->ast_index = ppdu_info->ast_index;
89 rx_user_status->tid = ppdu_info->tid;
90 rx_user_status->tcp_ack_msdu_count =
91 ppdu_info->tcp_ack_msdu_count;
92 rx_user_status->tcp_msdu_count =
93 ppdu_info->tcp_msdu_count;
94 rx_user_status->udp_msdu_count =
95 ppdu_info->udp_msdu_count;
96 rx_user_status->other_msdu_count =
97 ppdu_info->other_msdu_count;
98 rx_user_status->frame_control = ppdu_info->frame_control;
99 rx_user_status->frame_control_info_valid =
100 ppdu_info->frame_control_info_valid;
101 rx_user_status->data_sequence_control_info_valid =
102 ppdu_info->data_sequence_control_info_valid;
103 rx_user_status->first_data_seq_ctrl =
104 ppdu_info->first_data_seq_ctrl;
105 rx_user_status->preamble_type = ppdu_info->preamble_type;
106 rx_user_status->ht_flags = ppdu_info->ht_flags;
107 rx_user_status->vht_flags = ppdu_info->vht_flags;
108 rx_user_status->he_flags = ppdu_info->he_flags;
109 rx_user_status->rs_flags = ppdu_info->rs_flags;
110
111 rx_user_status->mpdu_cnt_fcs_ok =
112 ppdu_info->num_mpdu_fcs_ok;
113 rx_user_status->mpdu_cnt_fcs_err =
114 ppdu_info->num_mpdu_fcs_err;
115 memcpy(&rx_user_status->mpdu_fcs_ok_bitmap[0], &ppdu_info->mpdu_fcs_ok_bitmap[0],
116 HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
117 sizeof(ppdu_info->mpdu_fcs_ok_bitmap[0]));
118
119 ath12k_wifi7_dp_mon_rx_populate_byte_count(rx_tlv, ppdu_info, rx_user_status);
120 }
121
122 static inline enum ath12k_eht_ru_size
hal_rx_mon_hal_ru_size_to_ath12k_ru_size(u32 hal_ru_size)123 hal_rx_mon_hal_ru_size_to_ath12k_ru_size(u32 hal_ru_size)
124 {
125 switch (hal_ru_size) {
126 case HAL_EHT_RU_26:
127 return ATH12K_EHT_RU_26;
128 case HAL_EHT_RU_52:
129 return ATH12K_EHT_RU_52;
130 case HAL_EHT_RU_78:
131 return ATH12K_EHT_RU_52_26;
132 case HAL_EHT_RU_106:
133 return ATH12K_EHT_RU_106;
134 case HAL_EHT_RU_132:
135 return ATH12K_EHT_RU_106_26;
136 case HAL_EHT_RU_242:
137 return ATH12K_EHT_RU_242;
138 case HAL_EHT_RU_484:
139 return ATH12K_EHT_RU_484;
140 case HAL_EHT_RU_726:
141 return ATH12K_EHT_RU_484_242;
142 case HAL_EHT_RU_996:
143 return ATH12K_EHT_RU_996;
144 case HAL_EHT_RU_996x2:
145 return ATH12K_EHT_RU_996x2;
146 case HAL_EHT_RU_996x3:
147 return ATH12K_EHT_RU_996x3;
148 case HAL_EHT_RU_996x4:
149 return ATH12K_EHT_RU_996x4;
150 case HAL_EHT_RU_NONE:
151 return ATH12K_EHT_RU_INVALID;
152 case HAL_EHT_RU_996_484:
153 return ATH12K_EHT_RU_996_484;
154 case HAL_EHT_RU_996x2_484:
155 return ATH12K_EHT_RU_996x2_484;
156 case HAL_EHT_RU_996x3_484:
157 return ATH12K_EHT_RU_996x3_484;
158 case HAL_EHT_RU_996_484_242:
159 return ATH12K_EHT_RU_996_484_242;
160 default:
161 return ATH12K_EHT_RU_INVALID;
162 }
163 }
164
165 static inline u32
hal_rx_ul_ofdma_ru_size_to_width(enum ath12k_eht_ru_size ru_size)166 hal_rx_ul_ofdma_ru_size_to_width(enum ath12k_eht_ru_size ru_size)
167 {
168 switch (ru_size) {
169 case ATH12K_EHT_RU_26:
170 return RU_26;
171 case ATH12K_EHT_RU_52:
172 return RU_52;
173 case ATH12K_EHT_RU_52_26:
174 return RU_52_26;
175 case ATH12K_EHT_RU_106:
176 return RU_106;
177 case ATH12K_EHT_RU_106_26:
178 return RU_106_26;
179 case ATH12K_EHT_RU_242:
180 return RU_242;
181 case ATH12K_EHT_RU_484:
182 return RU_484;
183 case ATH12K_EHT_RU_484_242:
184 return RU_484_242;
185 case ATH12K_EHT_RU_996:
186 return RU_996;
187 case ATH12K_EHT_RU_996_484:
188 return RU_996_484;
189 case ATH12K_EHT_RU_996_484_242:
190 return RU_996_484_242;
191 case ATH12K_EHT_RU_996x2:
192 return RU_2X996;
193 case ATH12K_EHT_RU_996x2_484:
194 return RU_2X996_484;
195 case ATH12K_EHT_RU_996x3:
196 return RU_3X996;
197 case ATH12K_EHT_RU_996x3_484:
198 return RU_3X996_484;
199 case ATH12K_EHT_RU_996x4:
200 return RU_4X996;
201 default:
202 return RU_INVALID;
203 }
204 }
205
206 static void
ath12k_wifi7_dp_mon_hal_rx_parse_user_info(const struct hal_receive_user_info * rx_usr_info,u16 user_id,struct hal_rx_mon_ppdu_info * ppdu_info)207 ath12k_wifi7_dp_mon_hal_rx_parse_user_info(const struct hal_receive_user_info *rx_usr_info,
208 u16 user_id,
209 struct hal_rx_mon_ppdu_info *ppdu_info)
210 {
211 struct hal_rx_user_status *mon_rx_user_status = NULL;
212 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
213 enum ath12k_eht_ru_size rtap_ru_size = ATH12K_EHT_RU_INVALID;
214 u32 ru_width, reception_type, ru_index = HAL_EHT_RU_INVALID;
215 u32 ru_type_80_0, ru_start_index_80_0;
216 u32 ru_type_80_1, ru_start_index_80_1;
217 u32 ru_type_80_2, ru_start_index_80_2;
218 u32 ru_type_80_3, ru_start_index_80_3;
219 u32 ru_size = 0, num_80mhz_with_ru = 0;
220 u64 ru_index_320mhz = 0;
221 u32 ru_index_per80mhz;
222
223 reception_type = le32_get_bits(rx_usr_info->info0,
224 HAL_RX_USR_INFO0_RECEPTION_TYPE);
225
226 switch (reception_type) {
227 case HAL_RECEPTION_TYPE_SU:
228 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU;
229 break;
230 case HAL_RECEPTION_TYPE_DL_MU_MIMO:
231 case HAL_RECEPTION_TYPE_UL_MU_MIMO:
232 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO;
233 break;
234 case HAL_RECEPTION_TYPE_DL_MU_OFMA:
235 case HAL_RECEPTION_TYPE_UL_MU_OFDMA:
236 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA;
237 break;
238 case HAL_RECEPTION_TYPE_DL_MU_OFDMA_MIMO:
239 case HAL_RECEPTION_TYPE_UL_MU_OFDMA_MIMO:
240 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO;
241 }
242
243 ppdu_info->is_stbc = le32_get_bits(rx_usr_info->info0, HAL_RX_USR_INFO0_STBC);
244 ppdu_info->ldpc = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_LDPC);
245 ppdu_info->dcm = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_STA_DCM);
246 ppdu_info->bw = le32_get_bits(rx_usr_info->info1, HAL_RX_USR_INFO1_RX_BW);
247 ppdu_info->mcs = le32_get_bits(rx_usr_info->info1, HAL_RX_USR_INFO1_MCS);
248 ppdu_info->nss = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_NSS) + 1;
249
250 if (user_id < HAL_MAX_UL_MU_USERS) {
251 mon_rx_user_status = &ppdu_info->userstats[user_id];
252 mon_rx_user_status->mcs = ppdu_info->mcs;
253 mon_rx_user_status->nss = ppdu_info->nss;
254 }
255
256 if (!(ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_MIMO ||
257 ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_OFDMA ||
258 ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO))
259 return;
260
261 /* RU allocation present only for OFDMA reception */
262 ru_type_80_0 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_0);
263 ru_start_index_80_0 = le32_get_bits(rx_usr_info->info3,
264 HAL_RX_USR_INFO3_RU_START_IDX_80_0);
265 if (ru_type_80_0 != HAL_EHT_RU_NONE) {
266 ru_size += ru_type_80_0;
267 ru_index_per80mhz = ru_start_index_80_0;
268 ru_index = ru_index_per80mhz;
269 ru_index_320mhz |= HAL_RU_PER80(ru_type_80_0, 0, ru_index_per80mhz);
270 num_80mhz_with_ru++;
271 }
272
273 ru_type_80_1 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_1);
274 ru_start_index_80_1 = le32_get_bits(rx_usr_info->info3,
275 HAL_RX_USR_INFO3_RU_START_IDX_80_1);
276 if (ru_type_80_1 != HAL_EHT_RU_NONE) {
277 ru_size += ru_type_80_1;
278 ru_index_per80mhz = ru_start_index_80_1;
279 ru_index = ru_index_per80mhz;
280 ru_index_320mhz |= HAL_RU_PER80(ru_type_80_1, 1, ru_index_per80mhz);
281 num_80mhz_with_ru++;
282 }
283
284 ru_type_80_2 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_2);
285 ru_start_index_80_2 = le32_get_bits(rx_usr_info->info3,
286 HAL_RX_USR_INFO3_RU_START_IDX_80_2);
287 if (ru_type_80_2 != HAL_EHT_RU_NONE) {
288 ru_size += ru_type_80_2;
289 ru_index_per80mhz = ru_start_index_80_2;
290 ru_index = ru_index_per80mhz;
291 ru_index_320mhz |= HAL_RU_PER80(ru_type_80_2, 2, ru_index_per80mhz);
292 num_80mhz_with_ru++;
293 }
294
295 ru_type_80_3 = le32_get_bits(rx_usr_info->info2, HAL_RX_USR_INFO2_RU_TYPE_80_3);
296 ru_start_index_80_3 = le32_get_bits(rx_usr_info->info2,
297 HAL_RX_USR_INFO3_RU_START_IDX_80_3);
298 if (ru_type_80_3 != HAL_EHT_RU_NONE) {
299 ru_size += ru_type_80_3;
300 ru_index_per80mhz = ru_start_index_80_3;
301 ru_index = ru_index_per80mhz;
302 ru_index_320mhz |= HAL_RU_PER80(ru_type_80_3, 3, ru_index_per80mhz);
303 num_80mhz_with_ru++;
304 }
305
306 if (num_80mhz_with_ru > 1) {
307 /* Calculate the MRU index */
308 switch (ru_index_320mhz) {
309 case HAL_EHT_RU_996_484_0:
310 case HAL_EHT_RU_996x2_484_0:
311 case HAL_EHT_RU_996x3_484_0:
312 ru_index = 0;
313 break;
314 case HAL_EHT_RU_996_484_1:
315 case HAL_EHT_RU_996x2_484_1:
316 case HAL_EHT_RU_996x3_484_1:
317 ru_index = 1;
318 break;
319 case HAL_EHT_RU_996_484_2:
320 case HAL_EHT_RU_996x2_484_2:
321 case HAL_EHT_RU_996x3_484_2:
322 ru_index = 2;
323 break;
324 case HAL_EHT_RU_996_484_3:
325 case HAL_EHT_RU_996x2_484_3:
326 case HAL_EHT_RU_996x3_484_3:
327 ru_index = 3;
328 break;
329 case HAL_EHT_RU_996_484_4:
330 case HAL_EHT_RU_996x2_484_4:
331 case HAL_EHT_RU_996x3_484_4:
332 ru_index = 4;
333 break;
334 case HAL_EHT_RU_996_484_5:
335 case HAL_EHT_RU_996x2_484_5:
336 case HAL_EHT_RU_996x3_484_5:
337 ru_index = 5;
338 break;
339 case HAL_EHT_RU_996_484_6:
340 case HAL_EHT_RU_996x2_484_6:
341 case HAL_EHT_RU_996x3_484_6:
342 ru_index = 6;
343 break;
344 case HAL_EHT_RU_996_484_7:
345 case HAL_EHT_RU_996x2_484_7:
346 case HAL_EHT_RU_996x3_484_7:
347 ru_index = 7;
348 break;
349 case HAL_EHT_RU_996x2_484_8:
350 ru_index = 8;
351 break;
352 case HAL_EHT_RU_996x2_484_9:
353 ru_index = 9;
354 break;
355 case HAL_EHT_RU_996x2_484_10:
356 ru_index = 10;
357 break;
358 case HAL_EHT_RU_996x2_484_11:
359 ru_index = 11;
360 break;
361 default:
362 ru_index = HAL_EHT_RU_INVALID;
363 break;
364 }
365
366 ru_size += 4;
367 }
368
369 rtap_ru_size = hal_rx_mon_hal_ru_size_to_ath12k_ru_size(ru_size);
370 if (rtap_ru_size != ATH12K_EHT_RU_INVALID) {
371 u32 known, data;
372
373 known = __le32_to_cpu(eht->known);
374 known |= IEEE80211_RADIOTAP_EHT_KNOWN_RU_MRU_SIZE_OM;
375 eht->known = cpu_to_le32(known);
376
377 data = __le32_to_cpu(eht->data[1]);
378 data |= u32_encode_bits(rtap_ru_size,
379 IEEE80211_RADIOTAP_EHT_DATA1_RU_SIZE);
380 eht->data[1] = cpu_to_le32(data);
381 }
382
383 if (ru_index != HAL_EHT_RU_INVALID) {
384 u32 known, data;
385
386 known = __le32_to_cpu(eht->known);
387 known |= IEEE80211_RADIOTAP_EHT_KNOWN_RU_MRU_INDEX_OM;
388 eht->known = cpu_to_le32(known);
389
390 data = __le32_to_cpu(eht->data[1]);
391 data |= u32_encode_bits(rtap_ru_size,
392 IEEE80211_RADIOTAP_EHT_DATA1_RU_INDEX);
393 eht->data[1] = cpu_to_le32(data);
394 }
395
396 if (mon_rx_user_status && ru_index != HAL_EHT_RU_INVALID &&
397 rtap_ru_size != ATH12K_EHT_RU_INVALID) {
398 mon_rx_user_status->ul_ofdma_ru_start_index = ru_index;
399 mon_rx_user_status->ul_ofdma_ru_size = rtap_ru_size;
400
401 ru_width = hal_rx_ul_ofdma_ru_size_to_width(rtap_ru_size);
402
403 mon_rx_user_status->ul_ofdma_ru_width = ru_width;
404 mon_rx_user_status->ofdma_info_valid = 1;
405 }
406 }
407
408 static __always_inline u8
ath12k_wifi7_hal_mon_map_legacy_rate_to_hw_rate(u8 rate)409 ath12k_wifi7_hal_mon_map_legacy_rate_to_hw_rate(u8 rate)
410 {
411 u8 ath12k_rate;
412
413 /* Map hal_rx_legacy_rate to ath12k_hw_rate_cck */
414 switch (rate) {
415 case HAL_RX_LEGACY_RATE_LP_1_MBPS:
416 ath12k_rate = ATH12K_HW_RATE_CCK_LP_1M;
417 break;
418 case HAL_RX_LEGACY_RATE_LP_2_MBPS:
419 ath12k_rate = ATH12K_HW_RATE_CCK_LP_2M;
420 break;
421 case HAL_RX_LEGACY_RATE_LP_5_5_MBPS:
422 ath12k_rate = ATH12K_HW_RATE_CCK_LP_5_5M;
423 break;
424 case HAL_RX_LEGACY_RATE_LP_11_MBPS:
425 ath12k_rate = ATH12K_HW_RATE_CCK_LP_11M;
426 break;
427 case HAL_RX_LEGACY_RATE_SP_2_MBPS:
428 ath12k_rate = ATH12K_HW_RATE_CCK_SP_2M;
429 break;
430 case HAL_RX_LEGACY_RATE_SP_5_5_MBPS:
431 ath12k_rate = ATH12K_HW_RATE_CCK_SP_5_5M;
432 break;
433 case HAL_RX_LEGACY_RATE_SP_11_MBPS:
434 ath12k_rate = ATH12K_HW_RATE_CCK_SP_11M;
435 break;
436 default:
437 ath12k_rate = rate;
438 break;
439 }
440
441 return ath12k_rate;
442 }
443
444 static void
ath12k_wifi7_dp_mon_parse_l_sig_b(const struct hal_rx_lsig_b_info * lsigb,struct hal_rx_mon_ppdu_info * ppdu_info)445 ath12k_wifi7_dp_mon_parse_l_sig_b(const struct hal_rx_lsig_b_info *lsigb,
446 struct hal_rx_mon_ppdu_info *ppdu_info)
447 {
448 u32 info0 = __le32_to_cpu(lsigb->info0);
449 u8 rate;
450
451 rate = u32_get_bits(info0, HAL_RX_LSIG_B_INFO_INFO0_RATE);
452 switch (rate) {
453 case 1:
454 rate = HAL_RX_LEGACY_RATE_LP_1_MBPS;
455 break;
456 case 2:
457 rate = HAL_RX_LEGACY_RATE_LP_2_MBPS;
458 break;
459 case 3:
460 rate = HAL_RX_LEGACY_RATE_LP_5_5_MBPS;
461 break;
462 case 4:
463 rate = HAL_RX_LEGACY_RATE_LP_11_MBPS;
464 break;
465 case 5:
466 rate = HAL_RX_LEGACY_RATE_SP_2_MBPS;
467 break;
468 case 6:
469 rate = HAL_RX_LEGACY_RATE_SP_5_5_MBPS;
470 break;
471 case 7:
472 rate = HAL_RX_LEGACY_RATE_SP_11_MBPS;
473 break;
474 default:
475 rate = HAL_RX_LEGACY_RATE_INVALID;
476 break;
477 }
478
479 ppdu_info->rate = ath12k_wifi7_hal_mon_map_legacy_rate_to_hw_rate(rate);
480 ppdu_info->cck_flag = 1;
481 }
482
483 static void
ath12k_wifi7_dp_mon_parse_l_sig_a(const struct hal_rx_lsig_a_info * lsiga,struct hal_rx_mon_ppdu_info * ppdu_info)484 ath12k_wifi7_dp_mon_parse_l_sig_a(const struct hal_rx_lsig_a_info *lsiga,
485 struct hal_rx_mon_ppdu_info *ppdu_info)
486 {
487 u32 info0 = __le32_to_cpu(lsiga->info0);
488 u8 rate;
489
490 rate = u32_get_bits(info0, HAL_RX_LSIG_A_INFO_INFO0_RATE);
491 switch (rate) {
492 case 8:
493 rate = HAL_RX_LEGACY_RATE_OFDM_48_MBPS;
494 break;
495 case 9:
496 rate = HAL_RX_LEGACY_RATE_OFDM_24_MBPS;
497 break;
498 case 10:
499 rate = HAL_RX_LEGACY_RATE_OFDM_12_MBPS;
500 break;
501 case 11:
502 rate = HAL_RX_LEGACY_RATE_OFDM_6_MBPS;
503 break;
504 case 12:
505 rate = HAL_RX_LEGACY_RATE_OFDM_54_MBPS;
506 break;
507 case 13:
508 rate = HAL_RX_LEGACY_RATE_OFDM_36_MBPS;
509 break;
510 case 14:
511 rate = HAL_RX_LEGACY_RATE_OFDM_18_MBPS;
512 break;
513 case 15:
514 rate = HAL_RX_LEGACY_RATE_OFDM_9_MBPS;
515 break;
516 default:
517 rate = HAL_RX_LEGACY_RATE_OFDM_INVALID;
518 break;
519 }
520
521 ppdu_info->rate = rate;
522 }
523
524 static void
ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_cmn(const struct hal_mon_usig_cmn * cmn,struct hal_rx_mon_ppdu_info * ppdu_info)525 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_cmn(const struct hal_mon_usig_cmn *cmn,
526 struct hal_rx_mon_ppdu_info *ppdu_info)
527 {
528 u32 common;
529
530 ppdu_info->u_sig_info.bw = le32_get_bits(cmn->info0,
531 HAL_RX_USIG_CMN_INFO0_BW);
532 ppdu_info->u_sig_info.ul_dl = le32_get_bits(cmn->info0,
533 HAL_RX_USIG_CMN_INFO0_UL_DL);
534
535 common = __le32_to_cpu(ppdu_info->u_sig_info.usig.common);
536 common |= IEEE80211_RADIOTAP_EHT_USIG_COMMON_PHY_VER_KNOWN |
537 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW_KNOWN |
538 IEEE80211_RADIOTAP_EHT_USIG_COMMON_UL_DL_KNOWN |
539 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BSS_COLOR_KNOWN |
540 IEEE80211_RADIOTAP_EHT_USIG_COMMON_TXOP_KNOWN |
541 ATH12K_LE32_DEC_ENC(cmn->info0,
542 HAL_RX_USIG_CMN_INFO0_PHY_VERSION,
543 IEEE80211_RADIOTAP_EHT_USIG_COMMON_PHY_VER) |
544 u32_encode_bits(ppdu_info->u_sig_info.bw,
545 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BW) |
546 u32_encode_bits(ppdu_info->u_sig_info.ul_dl,
547 IEEE80211_RADIOTAP_EHT_USIG_COMMON_UL_DL) |
548 ATH12K_LE32_DEC_ENC(cmn->info0,
549 HAL_RX_USIG_CMN_INFO0_BSS_COLOR,
550 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BSS_COLOR) |
551 ATH12K_LE32_DEC_ENC(cmn->info0,
552 HAL_RX_USIG_CMN_INFO0_TXOP,
553 IEEE80211_RADIOTAP_EHT_USIG_COMMON_TXOP);
554 ppdu_info->u_sig_info.usig.common = cpu_to_le32(common);
555
556 switch (ppdu_info->u_sig_info.bw) {
557 default:
558 fallthrough;
559 case HAL_EHT_BW_20:
560 ppdu_info->bw = HAL_RX_BW_20MHZ;
561 break;
562 case HAL_EHT_BW_40:
563 ppdu_info->bw = HAL_RX_BW_40MHZ;
564 break;
565 case HAL_EHT_BW_80:
566 ppdu_info->bw = HAL_RX_BW_80MHZ;
567 break;
568 case HAL_EHT_BW_160:
569 ppdu_info->bw = HAL_RX_BW_160MHZ;
570 break;
571 case HAL_EHT_BW_320_1:
572 case HAL_EHT_BW_320_2:
573 ppdu_info->bw = HAL_RX_BW_320MHZ;
574 break;
575 }
576 }
577
578 static void
ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_tb(const struct hal_mon_usig_tb * usig_tb,struct hal_rx_mon_ppdu_info * ppdu_info)579 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_tb(const struct hal_mon_usig_tb *usig_tb,
580 struct hal_rx_mon_ppdu_info *ppdu_info)
581 {
582 struct ieee80211_radiotap_eht_usig *usig = &ppdu_info->u_sig_info.usig;
583 enum ieee80211_radiotap_eht_usig_tb spatial_reuse1, spatial_reuse2;
584 u32 common, value, mask;
585
586 spatial_reuse1 = IEEE80211_RADIOTAP_EHT_USIG2_TB_B3_B6_SPATIAL_REUSE_1;
587 spatial_reuse2 = IEEE80211_RADIOTAP_EHT_USIG2_TB_B7_B10_SPATIAL_REUSE_2;
588
589 common = __le32_to_cpu(usig->common);
590 value = __le32_to_cpu(usig->value);
591 mask = __le32_to_cpu(usig->mask);
592
593 ppdu_info->u_sig_info.ppdu_type_comp_mode =
594 le32_get_bits(usig_tb->info0,
595 HAL_RX_USIG_TB_INFO0_PPDU_TYPE_COMP_MODE);
596
597 common |= ATH12K_LE32_DEC_ENC(usig_tb->info0,
598 HAL_RX_USIG_TB_INFO0_RX_INTEG_CHECK_PASS,
599 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BAD_USIG_CRC);
600
601 value |= IEEE80211_RADIOTAP_EHT_USIG1_TB_B20_B25_DISREGARD |
602 u32_encode_bits(ppdu_info->u_sig_info.ppdu_type_comp_mode,
603 IEEE80211_RADIOTAP_EHT_USIG2_TB_B0_B1_PPDU_TYPE) |
604 IEEE80211_RADIOTAP_EHT_USIG2_TB_B2_VALIDATE |
605 ATH12K_LE32_DEC_ENC(usig_tb->info0,
606 HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_1,
607 spatial_reuse1) |
608 ATH12K_LE32_DEC_ENC(usig_tb->info0,
609 HAL_RX_USIG_TB_INFO0_SPATIAL_REUSE_2,
610 spatial_reuse2) |
611 IEEE80211_RADIOTAP_EHT_USIG2_TB_B11_B15_DISREGARD |
612 ATH12K_LE32_DEC_ENC(usig_tb->info0,
613 HAL_RX_USIG_TB_INFO0_CRC,
614 IEEE80211_RADIOTAP_EHT_USIG2_TB_B16_B19_CRC) |
615 ATH12K_LE32_DEC_ENC(usig_tb->info0,
616 HAL_RX_USIG_TB_INFO0_TAIL,
617 IEEE80211_RADIOTAP_EHT_USIG2_TB_B20_B25_TAIL);
618
619 mask |= IEEE80211_RADIOTAP_EHT_USIG1_TB_B20_B25_DISREGARD |
620 IEEE80211_RADIOTAP_EHT_USIG2_TB_B0_B1_PPDU_TYPE |
621 IEEE80211_RADIOTAP_EHT_USIG2_TB_B2_VALIDATE |
622 spatial_reuse1 | spatial_reuse2 |
623 IEEE80211_RADIOTAP_EHT_USIG2_TB_B11_B15_DISREGARD |
624 IEEE80211_RADIOTAP_EHT_USIG2_TB_B16_B19_CRC |
625 IEEE80211_RADIOTAP_EHT_USIG2_TB_B20_B25_TAIL;
626
627 usig->common = cpu_to_le32(common);
628 usig->value = cpu_to_le32(value);
629 usig->mask = cpu_to_le32(mask);
630 }
631
632 static void
ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_mu(const struct hal_mon_usig_mu * usig_mu,struct hal_rx_mon_ppdu_info * ppdu_info)633 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_mu(const struct hal_mon_usig_mu *usig_mu,
634 struct hal_rx_mon_ppdu_info *ppdu_info)
635 {
636 struct ieee80211_radiotap_eht_usig *usig = &ppdu_info->u_sig_info.usig;
637 enum ieee80211_radiotap_eht_usig_mu sig_symb, punc;
638 u32 common, value, mask;
639
640 sig_symb = IEEE80211_RADIOTAP_EHT_USIG2_MU_B11_B15_EHT_SIG_SYMBOLS;
641 punc = IEEE80211_RADIOTAP_EHT_USIG2_MU_B3_B7_PUNCTURED_INFO;
642
643 common = __le32_to_cpu(usig->common);
644 value = __le32_to_cpu(usig->value);
645 mask = __le32_to_cpu(usig->mask);
646
647 ppdu_info->u_sig_info.ppdu_type_comp_mode =
648 le32_get_bits(usig_mu->info0,
649 HAL_RX_USIG_MU_INFO0_PPDU_TYPE_COMP_MODE);
650 ppdu_info->u_sig_info.eht_sig_mcs =
651 le32_get_bits(usig_mu->info0,
652 HAL_RX_USIG_MU_INFO0_EHT_SIG_MCS);
653 ppdu_info->u_sig_info.num_eht_sig_sym =
654 le32_get_bits(usig_mu->info0,
655 HAL_RX_USIG_MU_INFO0_NUM_EHT_SIG_SYM);
656
657 common |= ATH12K_LE32_DEC_ENC(usig_mu->info0,
658 HAL_RX_USIG_MU_INFO0_RX_INTEG_CHECK_PASS,
659 IEEE80211_RADIOTAP_EHT_USIG_COMMON_BAD_USIG_CRC);
660
661 value |= IEEE80211_RADIOTAP_EHT_USIG1_MU_B20_B24_DISREGARD |
662 IEEE80211_RADIOTAP_EHT_USIG1_MU_B25_VALIDATE |
663 u32_encode_bits(ppdu_info->u_sig_info.ppdu_type_comp_mode,
664 IEEE80211_RADIOTAP_EHT_USIG2_MU_B0_B1_PPDU_TYPE) |
665 IEEE80211_RADIOTAP_EHT_USIG2_MU_B2_VALIDATE |
666 ATH12K_LE32_DEC_ENC(usig_mu->info0,
667 HAL_RX_USIG_MU_INFO0_PUNC_CH_INFO,
668 punc) |
669 IEEE80211_RADIOTAP_EHT_USIG2_MU_B8_VALIDATE |
670 u32_encode_bits(ppdu_info->u_sig_info.eht_sig_mcs,
671 IEEE80211_RADIOTAP_EHT_USIG2_MU_B9_B10_SIG_MCS) |
672 u32_encode_bits(ppdu_info->u_sig_info.num_eht_sig_sym,
673 sig_symb) |
674 ATH12K_LE32_DEC_ENC(usig_mu->info0,
675 HAL_RX_USIG_MU_INFO0_CRC,
676 IEEE80211_RADIOTAP_EHT_USIG2_MU_B16_B19_CRC) |
677 ATH12K_LE32_DEC_ENC(usig_mu->info0,
678 HAL_RX_USIG_MU_INFO0_TAIL,
679 IEEE80211_RADIOTAP_EHT_USIG2_MU_B20_B25_TAIL);
680
681 mask |= IEEE80211_RADIOTAP_EHT_USIG1_MU_B20_B24_DISREGARD |
682 IEEE80211_RADIOTAP_EHT_USIG1_MU_B25_VALIDATE |
683 IEEE80211_RADIOTAP_EHT_USIG2_MU_B0_B1_PPDU_TYPE |
684 IEEE80211_RADIOTAP_EHT_USIG2_MU_B2_VALIDATE |
685 punc |
686 IEEE80211_RADIOTAP_EHT_USIG2_MU_B8_VALIDATE |
687 IEEE80211_RADIOTAP_EHT_USIG2_MU_B9_B10_SIG_MCS |
688 sig_symb |
689 IEEE80211_RADIOTAP_EHT_USIG2_MU_B16_B19_CRC |
690 IEEE80211_RADIOTAP_EHT_USIG2_MU_B20_B25_TAIL;
691
692 usig->common = cpu_to_le32(common);
693 usig->value = cpu_to_le32(value);
694 usig->mask = cpu_to_le32(mask);
695 }
696
697 static void
ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_hdr(const struct hal_mon_usig_hdr * usig,struct hal_rx_mon_ppdu_info * ppdu_info)698 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_hdr(const struct hal_mon_usig_hdr *usig,
699 struct hal_rx_mon_ppdu_info *ppdu_info)
700 {
701 u8 comp_mode;
702
703 ppdu_info->eht_usig = true;
704
705 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_cmn(&usig->cmn, ppdu_info);
706
707 comp_mode = le32_get_bits(usig->non_cmn.mu.info0,
708 HAL_RX_USIG_MU_INFO0_PPDU_TYPE_COMP_MODE);
709
710 if (comp_mode == 0 && ppdu_info->u_sig_info.ul_dl)
711 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_tb(&usig->non_cmn.tb, ppdu_info);
712 else
713 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_mu(&usig->non_cmn.mu, ppdu_info);
714 }
715
716 static void
ath12k_wifi7_dp_mon_parse_vht_sig_a(const struct hal_rx_vht_sig_a_info * vht_sig,struct hal_rx_mon_ppdu_info * ppdu_info)717 ath12k_wifi7_dp_mon_parse_vht_sig_a(const struct hal_rx_vht_sig_a_info *vht_sig,
718 struct hal_rx_mon_ppdu_info *ppdu_info)
719 {
720 u32 nsts, info0, info1;
721 u8 gi_setting;
722
723 info0 = __le32_to_cpu(vht_sig->info0);
724 info1 = __le32_to_cpu(vht_sig->info1);
725
726 ppdu_info->ldpc = u32_get_bits(info1, HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING);
727 ppdu_info->mcs = u32_get_bits(info1, HAL_RX_VHT_SIG_A_INFO_INFO1_MCS);
728 gi_setting = u32_get_bits(info1, HAL_RX_VHT_SIG_A_INFO_INFO1_GI_SETTING);
729 switch (gi_setting) {
730 case HAL_RX_VHT_SIG_A_NORMAL_GI:
731 ppdu_info->gi = HAL_RX_GI_0_8_US;
732 break;
733 case HAL_RX_VHT_SIG_A_SHORT_GI:
734 case HAL_RX_VHT_SIG_A_SHORT_GI_AMBIGUITY:
735 ppdu_info->gi = HAL_RX_GI_0_4_US;
736 break;
737 }
738
739 ppdu_info->is_stbc = u32_get_bits(info0, HAL_RX_VHT_SIG_A_INFO_INFO0_STBC);
740 nsts = u32_get_bits(info0, HAL_RX_VHT_SIG_A_INFO_INFO0_NSTS);
741 if (ppdu_info->is_stbc && nsts > 0)
742 nsts = ((nsts + 1) >> 1) - 1;
743
744 ppdu_info->nss = u32_get_bits(nsts, VHT_SIG_SU_NSS_MASK) + 1;
745 ppdu_info->bw = u32_get_bits(info0, HAL_RX_VHT_SIG_A_INFO_INFO0_BW);
746 ppdu_info->beamformed = u32_get_bits(info1,
747 HAL_RX_VHT_SIG_A_INFO_INFO1_BEAMFORMED);
748 ppdu_info->vht_flag_values5 = u32_get_bits(info0,
749 HAL_RX_VHT_SIG_A_INFO_INFO0_GROUP_ID);
750 ppdu_info->vht_flag_values3[0] = (((ppdu_info->mcs) << 4) |
751 ppdu_info->nss);
752 ppdu_info->vht_flag_values2 = ppdu_info->bw;
753 ppdu_info->vht_flag_values4 =
754 u32_get_bits(info1, HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING);
755 }
756
757 static void
ath12k_wifi7_dp_mon_parse_ht_sig(const struct hal_rx_ht_sig_info * ht_sig,struct hal_rx_mon_ppdu_info * ppdu_info)758 ath12k_wifi7_dp_mon_parse_ht_sig(const struct hal_rx_ht_sig_info *ht_sig,
759 struct hal_rx_mon_ppdu_info *ppdu_info)
760 {
761 u32 info0 = __le32_to_cpu(ht_sig->info0);
762 u32 info1 = __le32_to_cpu(ht_sig->info1);
763
764 ppdu_info->mcs = u32_get_bits(info0, HAL_RX_HT_SIG_INFO_INFO0_MCS);
765 ppdu_info->bw = u32_get_bits(info0, HAL_RX_HT_SIG_INFO_INFO0_BW);
766 ppdu_info->is_stbc = u32_get_bits(info1, HAL_RX_HT_SIG_INFO_INFO1_STBC);
767 ppdu_info->ldpc = u32_get_bits(info1, HAL_RX_HT_SIG_INFO_INFO1_FEC_CODING);
768 ppdu_info->gi = u32_get_bits(info1, HAL_RX_HT_SIG_INFO_INFO1_GI);
769 ppdu_info->nss = (ppdu_info->mcs >> 3) + 1;
770 }
771
772 static void
ath12k_wifi7_dp_mon_parse_he_sig_b2_ofdma(const struct hal_rx_he_sig_b2_ofdma_info * ofdma,struct hal_rx_mon_ppdu_info * ppdu_info)773 ath12k_wifi7_dp_mon_parse_he_sig_b2_ofdma(const struct hal_rx_he_sig_b2_ofdma_info *ofdma,
774 struct hal_rx_mon_ppdu_info *ppdu_info)
775 {
776 u32 info0, value;
777
778 info0 = __le32_to_cpu(ofdma->info0);
779
780 ppdu_info->he_data1 |= HE_MCS_KNOWN | HE_DCM_KNOWN | HE_CODING_KNOWN;
781
782 /* HE-data2 */
783 ppdu_info->he_data2 |= HE_TXBF_KNOWN;
784
785 ppdu_info->mcs = u32_get_bits(info0, HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_MCS);
786 value = ppdu_info->mcs << HE_TRANSMIT_MCS_SHIFT;
787 ppdu_info->he_data3 |= value;
788
789 value = u32_get_bits(info0, HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_DCM);
790 value = value << HE_DCM_SHIFT;
791 ppdu_info->he_data3 |= value;
792
793 value = u32_get_bits(info0, HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_CODING);
794 ppdu_info->ldpc = value;
795 value = value << HE_CODING_SHIFT;
796 ppdu_info->he_data3 |= value;
797
798 /* HE-data4 */
799 value = u32_get_bits(info0, HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_ID);
800 value = value << HE_STA_ID_SHIFT;
801 ppdu_info->he_data4 |= value;
802
803 ppdu_info->nss =
804 u32_get_bits(info0,
805 HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS) + 1;
806 ppdu_info->beamformed = u32_get_bits(info0,
807 HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF);
808 }
809
810 static void
ath12k_wifi7_dp_mon_parse_he_sig_b2_mu(const struct hal_rx_he_sig_b2_mu_info * he_sig_b2_mu,struct hal_rx_mon_ppdu_info * ppdu_info)811 ath12k_wifi7_dp_mon_parse_he_sig_b2_mu(const struct hal_rx_he_sig_b2_mu_info *he_sig_b2_mu,
812 struct hal_rx_mon_ppdu_info *ppdu_info)
813 {
814 u32 info0, value;
815
816 info0 = __le32_to_cpu(he_sig_b2_mu->info0);
817
818 ppdu_info->he_data1 |= HE_MCS_KNOWN | HE_CODING_KNOWN;
819
820 ppdu_info->mcs = u32_get_bits(info0, HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS);
821 value = ppdu_info->mcs << HE_TRANSMIT_MCS_SHIFT;
822 ppdu_info->he_data3 |= value;
823
824 value = u32_get_bits(info0, HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING);
825 ppdu_info->ldpc = value;
826 value = value << HE_CODING_SHIFT;
827 ppdu_info->he_data3 |= value;
828
829 value = u32_get_bits(info0, HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_ID);
830 value = value << HE_STA_ID_SHIFT;
831 ppdu_info->he_data4 |= value;
832
833 ppdu_info->nss =
834 u32_get_bits(info0,
835 HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS) + 1;
836 }
837
838 static void
ath12k_wifi7_dp_mon_parse_he_sig_b1_mu(const struct hal_rx_he_sig_b1_mu_info * he_sig_b1_mu,struct hal_rx_mon_ppdu_info * ppdu_info)839 ath12k_wifi7_dp_mon_parse_he_sig_b1_mu(const struct hal_rx_he_sig_b1_mu_info *he_sig_b1_mu,
840 struct hal_rx_mon_ppdu_info *ppdu_info)
841 {
842 u32 info0 = __le32_to_cpu(he_sig_b1_mu->info0);
843 u16 ru_tones;
844
845 ru_tones = u32_get_bits(info0,
846 HAL_RX_HE_SIG_B1_MU_INFO_INFO0_RU_ALLOCATION);
847 ppdu_info->ru_alloc = ath12k_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);
848 ppdu_info->he_RU[0] = ru_tones;
849 }
850
851 static void
ath12k_wifi7_dp_mon_parse_he_sig_mu(const struct hal_rx_he_sig_a_mu_dl_info * he_sig_a_mu_dl,struct hal_rx_mon_ppdu_info * ppdu_info)852 ath12k_wifi7_dp_mon_parse_he_sig_mu(const struct hal_rx_he_sig_a_mu_dl_info *he_sig_a_mu_dl,
853 struct hal_rx_mon_ppdu_info *ppdu_info)
854 {
855 u32 info0, info1, value;
856 u16 he_gi = 0, he_ltf = 0;
857
858 info0 = __le32_to_cpu(he_sig_a_mu_dl->info0);
859 info1 = __le32_to_cpu(he_sig_a_mu_dl->info1);
860
861 ppdu_info->he_mu_flags = 1;
862
863 ppdu_info->he_data1 = HE_MU_FORMAT_TYPE;
864 ppdu_info->he_data1 |=
865 HE_BSS_COLOR_KNOWN |
866 HE_DL_UL_KNOWN |
867 HE_LDPC_EXTRA_SYMBOL_KNOWN |
868 HE_STBC_KNOWN |
869 HE_DATA_BW_RU_KNOWN |
870 HE_DOPPLER_KNOWN;
871
872 ppdu_info->he_data2 =
873 HE_GI_KNOWN |
874 HE_LTF_SYMBOLS_KNOWN |
875 HE_PRE_FEC_PADDING_KNOWN |
876 HE_PE_DISAMBIGUITY_KNOWN |
877 HE_TXOP_KNOWN |
878 HE_MIDABLE_PERIODICITY_KNOWN;
879
880 /* data3 */
881 ppdu_info->he_data3 = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_BSS_COLOR);
882 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_UL_FLAG);
883 value = value << HE_DL_UL_SHIFT;
884 ppdu_info->he_data3 |= value;
885
886 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_LDPC_EXTRA);
887 value = value << HE_LDPC_EXTRA_SYMBOL_SHIFT;
888 ppdu_info->he_data3 |= value;
889
890 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_STBC);
891 value = value << HE_STBC_SHIFT;
892 ppdu_info->he_data3 |= value;
893
894 /* data4 */
895 ppdu_info->he_data4 = u32_get_bits(info0,
896 HAL_RX_HE_SIG_A_MU_DL_INFO0_SPATIAL_REUSE);
897 ppdu_info->he_data4 = value;
898
899 /* data5 */
900 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_TRANSMIT_BW);
901 ppdu_info->he_data5 = value;
902 ppdu_info->bw = value;
903
904 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_CP_LTF_SIZE);
905 switch (value) {
906 case 0:
907 he_gi = HE_GI_0_8;
908 he_ltf = HE_LTF_4_X;
909 break;
910 case 1:
911 he_gi = HE_GI_0_8;
912 he_ltf = HE_LTF_2_X;
913 break;
914 case 2:
915 he_gi = HE_GI_1_6;
916 he_ltf = HE_LTF_2_X;
917 break;
918 case 3:
919 he_gi = HE_GI_3_2;
920 he_ltf = HE_LTF_4_X;
921 break;
922 }
923
924 ppdu_info->gi = he_gi;
925 value = he_gi << HE_GI_SHIFT;
926 ppdu_info->he_data5 |= value;
927
928 value = he_ltf << HE_LTF_SIZE_SHIFT;
929 ppdu_info->he_data5 |= value;
930
931 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_NUM_LTF_SYMB);
932 value = (value << HE_LTF_SYM_SHIFT);
933 ppdu_info->he_data5 |= value;
934
935 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_PKT_EXT_FACTOR);
936 value = value << HE_PRE_FEC_PAD_SHIFT;
937 ppdu_info->he_data5 |= value;
938
939 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_PKT_EXT_PE_DISAM);
940 value = value << HE_PE_DISAMBIGUITY_SHIFT;
941 ppdu_info->he_data5 |= value;
942
943 /*data6*/
944 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_DOPPLER_INDICATION);
945 value = value << HE_DOPPLER_SHIFT;
946 ppdu_info->he_data6 |= value;
947
948 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_MU_DL_INFO1_TXOP_DURATION);
949 value = value << HE_TXOP_SHIFT;
950 ppdu_info->he_data6 |= value;
951
952 /* HE-MU Flags */
953 /* HE-MU-flags1 */
954 ppdu_info->he_flags1 =
955 HE_SIG_B_MCS_KNOWN |
956 HE_SIG_B_DCM_KNOWN |
957 HE_SIG_B_COMPRESSION_FLAG_1_KNOWN |
958 HE_SIG_B_SYM_NUM_KNOWN |
959 HE_RU_0_KNOWN;
960
961 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_MCS_OF_SIGB);
962 ppdu_info->he_flags1 |= value;
963 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_DCM_OF_SIGB);
964 value = value << HE_DCM_FLAG_1_SHIFT;
965 ppdu_info->he_flags1 |= value;
966
967 /* HE-MU-flags2 */
968 ppdu_info->he_flags2 = HE_BW_KNOWN;
969
970 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_TRANSMIT_BW);
971 ppdu_info->he_flags2 |= value;
972 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_COMP_MODE_SIGB);
973 value = value << HE_SIG_B_COMPRESSION_FLAG_2_SHIFT;
974 ppdu_info->he_flags2 |= value;
975 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_MU_DL_INFO0_NUM_SIGB_SYMB);
976 value = value - 1;
977 value = value << HE_NUM_SIG_B_SYMBOLS_SHIFT;
978 ppdu_info->he_flags2 |= value;
979
980 ppdu_info->is_stbc = info1 &
981 HAL_RX_HE_SIG_A_MU_DL_INFO1_STBC;
982 }
983
984 static void
ath12k_wifi7_dp_mon_parse_he_sig_su(const struct hal_rx_he_sig_a_su_info * he_sig_a,struct hal_rx_mon_ppdu_info * ppdu_info)985 ath12k_wifi7_dp_mon_parse_he_sig_su(const struct hal_rx_he_sig_a_su_info *he_sig_a,
986 struct hal_rx_mon_ppdu_info *ppdu_info)
987 {
988 u32 info0, info1, value;
989 u32 dcm;
990 u8 he_dcm = 0, he_stbc = 0;
991 u16 he_gi = 0, he_ltf = 0;
992
993 ppdu_info->he_flags = 1;
994
995 info0 = __le32_to_cpu(he_sig_a->info0);
996 info1 = __le32_to_cpu(he_sig_a->info1);
997
998 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_FORMAT_IND);
999 if (value == 0)
1000 ppdu_info->he_data1 = HE_TRIG_FORMAT_TYPE;
1001 else
1002 ppdu_info->he_data1 = HE_SU_FORMAT_TYPE;
1003
1004 ppdu_info->he_data1 |=
1005 HE_BSS_COLOR_KNOWN |
1006 HE_BEAM_CHANGE_KNOWN |
1007 HE_DL_UL_KNOWN |
1008 HE_MCS_KNOWN |
1009 HE_DCM_KNOWN |
1010 HE_CODING_KNOWN |
1011 HE_LDPC_EXTRA_SYMBOL_KNOWN |
1012 HE_STBC_KNOWN |
1013 HE_DATA_BW_RU_KNOWN |
1014 HE_DOPPLER_KNOWN;
1015
1016 ppdu_info->he_data2 |=
1017 HE_GI_KNOWN |
1018 HE_TXBF_KNOWN |
1019 HE_PE_DISAMBIGUITY_KNOWN |
1020 HE_TXOP_KNOWN |
1021 HE_LTF_SYMBOLS_KNOWN |
1022 HE_PRE_FEC_PADDING_KNOWN |
1023 HE_MIDABLE_PERIODICITY_KNOWN;
1024
1025 ppdu_info->he_data3 = u32_get_bits(info0,
1026 HAL_RX_HE_SIG_A_SU_INFO_INFO0_BSS_COLOR);
1027 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_BEAM_CHANGE);
1028 value = value << HE_BEAM_CHANGE_SHIFT;
1029 ppdu_info->he_data3 |= value;
1030 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_DL_UL_FLAG);
1031 value = value << HE_DL_UL_SHIFT;
1032 ppdu_info->he_data3 |= value;
1033
1034 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS);
1035 ppdu_info->mcs = value;
1036 value = value << HE_TRANSMIT_MCS_SHIFT;
1037 ppdu_info->he_data3 |= value;
1038
1039 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM);
1040 he_dcm = value;
1041 value = value << HE_DCM_SHIFT;
1042 ppdu_info->he_data3 |= value;
1043 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING);
1044 value = value << HE_CODING_SHIFT;
1045 ppdu_info->he_data3 |= value;
1046 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_LDPC_EXTRA);
1047 value = value << HE_LDPC_EXTRA_SYMBOL_SHIFT;
1048 ppdu_info->he_data3 |= value;
1049 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC);
1050 he_stbc = value;
1051 value = value << HE_STBC_SHIFT;
1052 ppdu_info->he_data3 |= value;
1053
1054 /* data4 */
1055 ppdu_info->he_data4 = u32_get_bits(info0,
1056 HAL_RX_HE_SIG_A_SU_INFO_INFO0_SPATIAL_REUSE);
1057
1058 /* data5 */
1059 value = u32_get_bits(info0,
1060 HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW);
1061 ppdu_info->he_data5 = value;
1062 ppdu_info->bw = value;
1063 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE);
1064 switch (value) {
1065 case 0:
1066 he_gi = HE_GI_0_8;
1067 he_ltf = HE_LTF_1_X;
1068 break;
1069 case 1:
1070 he_gi = HE_GI_0_8;
1071 he_ltf = HE_LTF_2_X;
1072 break;
1073 case 2:
1074 he_gi = HE_GI_1_6;
1075 he_ltf = HE_LTF_2_X;
1076 break;
1077 case 3:
1078 if (he_dcm && he_stbc) {
1079 he_gi = HE_GI_0_8;
1080 he_ltf = HE_LTF_4_X;
1081 } else {
1082 he_gi = HE_GI_3_2;
1083 he_ltf = HE_LTF_4_X;
1084 }
1085 break;
1086 }
1087 ppdu_info->gi = he_gi;
1088 value = he_gi << HE_GI_SHIFT;
1089 ppdu_info->he_data5 |= value;
1090 value = he_ltf << HE_LTF_SIZE_SHIFT;
1091 ppdu_info->ltf_size = he_ltf;
1092 ppdu_info->he_data5 |= value;
1093
1094 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS);
1095 value = (value << HE_LTF_SYM_SHIFT);
1096 ppdu_info->he_data5 |= value;
1097
1098 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_FACTOR);
1099 value = value << HE_PRE_FEC_PAD_SHIFT;
1100 ppdu_info->he_data5 |= value;
1101
1102 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF);
1103 value = value << HE_TXBF_SHIFT;
1104 ppdu_info->he_data5 |= value;
1105 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_PE_DISAM);
1106 value = value << HE_PE_DISAMBIGUITY_SHIFT;
1107 ppdu_info->he_data5 |= value;
1108
1109 /* data6 */
1110 value = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS);
1111 value++;
1112 ppdu_info->he_data6 = value;
1113 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_DOPPLER_IND);
1114 value = value << HE_DOPPLER_SHIFT;
1115 ppdu_info->he_data6 |= value;
1116 value = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXOP_DURATION);
1117 value = value << HE_TXOP_SHIFT;
1118 ppdu_info->he_data6 |= value;
1119
1120 ppdu_info->mcs =
1121 u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS);
1122 ppdu_info->bw =
1123 u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW);
1124 ppdu_info->ldpc = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING);
1125 ppdu_info->is_stbc = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC);
1126 ppdu_info->beamformed = u32_get_bits(info1, HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF);
1127 dcm = u32_get_bits(info0, HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM);
1128 ppdu_info->nss = u32_get_bits(info0,
1129 HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS) + 1;
1130 ppdu_info->dcm = dcm;
1131 }
1132
1133 static inline bool
ath12k_wifi7_dp_mon_hal_rx_is_non_ofdma(const struct hal_rx_u_sig_info * usig_info)1134 ath12k_wifi7_dp_mon_hal_rx_is_non_ofdma(const struct hal_rx_u_sig_info *usig_info)
1135 {
1136 u32 ppdu_type_comp_mode = usig_info->ppdu_type_comp_mode;
1137 u32 ul_dl = usig_info->ul_dl;
1138
1139 if ((ppdu_type_comp_mode == HAL_RX_RECEPTION_TYPE_MU_MIMO && ul_dl == 0) ||
1140 (ppdu_type_comp_mode == HAL_RX_RECEPTION_TYPE_MU_OFDMA && ul_dl == 0) ||
1141 (ppdu_type_comp_mode == HAL_RX_RECEPTION_TYPE_MU_MIMO && ul_dl == 1))
1142 return true;
1143
1144 return false;
1145 }
1146
1147 static inline bool
ath12k_wifi7_dp_mon_hal_rx_is_ofdma(const struct hal_rx_u_sig_info * usig_info)1148 ath12k_wifi7_dp_mon_hal_rx_is_ofdma(const struct hal_rx_u_sig_info *usig_info)
1149 {
1150 if (usig_info->ppdu_type_comp_mode == 0 && usig_info->ul_dl == 0)
1151 return true;
1152
1153 return false;
1154 }
1155
1156 static inline bool
ath12k_wifi7_dp_mon_hal_rx_is_frame_type_ndp(const struct hal_rx_u_sig_info * usig_info)1157 ath12k_wifi7_dp_mon_hal_rx_is_frame_type_ndp(const struct hal_rx_u_sig_info *usig_info)
1158 {
1159 if (usig_info->ppdu_type_comp_mode == 1 &&
1160 usig_info->eht_sig_mcs == 0 &&
1161 usig_info->num_eht_sig_sym == 0)
1162 return true;
1163
1164 return false;
1165 }
1166
1167 static void
ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ndp(const struct hal_eht_sig_ndp_cmn_eb * eht_sig_ndp,struct hal_rx_mon_ppdu_info * ppdu_info)1168 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ndp(const struct hal_eht_sig_ndp_cmn_eb *eht_sig_ndp,
1169 struct hal_rx_mon_ppdu_info *ppdu_info)
1170 {
1171 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
1172 u32 known, data;
1173
1174 known = __le32_to_cpu(eht->known);
1175 known |= IEEE80211_RADIOTAP_EHT_KNOWN_SPATIAL_REUSE |
1176 IEEE80211_RADIOTAP_EHT_KNOWN_EHT_LTF |
1177 IEEE80211_RADIOTAP_EHT_KNOWN_NSS_S |
1178 IEEE80211_RADIOTAP_EHT_KNOWN_BEAMFORMED_S |
1179 IEEE80211_RADIOTAP_EHT_KNOWN_DISREGARD_S |
1180 IEEE80211_RADIOTAP_EHT_KNOWN_CRC1 |
1181 IEEE80211_RADIOTAP_EHT_KNOWN_TAIL1;
1182 eht->known = cpu_to_le32(known);
1183
1184 data = __le32_to_cpu(eht->data[0]);
1185 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1186 HAL_RX_EHT_SIG_NDP_CMN_INFO0_SPATIAL_REUSE,
1187 IEEE80211_RADIOTAP_EHT_DATA0_SPATIAL_REUSE);
1188 /* GI and LTF size are separately indicated in radiotap header
1189 * and hence will be parsed from other TLV
1190 */
1191 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1192 HAL_RX_EHT_SIG_NDP_CMN_INFO0_NUM_LTF_SYM,
1193 IEEE80211_RADIOTAP_EHT_DATA0_EHT_LTF);
1194
1195 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1196 HAL_RX_EHT_SIG_NDP_CMN_INFO0_CRC,
1197 IEEE80211_RADIOTAP_EHT_DATA0_CRC1_O);
1198
1199 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1200 HAL_RX_EHT_SIG_NDP_CMN_INFO0_DISREGARD,
1201 IEEE80211_RADIOTAP_EHT_DATA0_DISREGARD_S);
1202 eht->data[0] = cpu_to_le32(data);
1203
1204 data = __le32_to_cpu(eht->data[7]);
1205 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1206 HAL_RX_EHT_SIG_NDP_CMN_INFO0_NSS,
1207 IEEE80211_RADIOTAP_EHT_DATA7_NSS_S);
1208
1209 data |= ATH12K_LE32_DEC_ENC(eht_sig_ndp->info0,
1210 HAL_RX_EHT_SIG_NDP_CMN_INFO0_BEAMFORMED,
1211 IEEE80211_RADIOTAP_EHT_DATA7_BEAMFORMED_S);
1212 eht->data[7] = cpu_to_le32(data);
1213 }
1214
1215 static void
ath12k_wifi7_dp_mon_hal_rx_parse_usig_overflow(const struct hal_eht_sig_usig_overflow * ovflow,struct hal_rx_mon_ppdu_info * ppdu_info)1216 ath12k_wifi7_dp_mon_hal_rx_parse_usig_overflow(const struct hal_eht_sig_usig_overflow *ovflow,
1217 struct hal_rx_mon_ppdu_info *ppdu_info)
1218 {
1219 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
1220 u32 known, data;
1221
1222 known = __le32_to_cpu(eht->known);
1223 known |= IEEE80211_RADIOTAP_EHT_KNOWN_SPATIAL_REUSE |
1224 IEEE80211_RADIOTAP_EHT_KNOWN_EHT_LTF |
1225 IEEE80211_RADIOTAP_EHT_KNOWN_LDPC_EXTRA_SYM_OM |
1226 IEEE80211_RADIOTAP_EHT_KNOWN_PRE_PADD_FACOR_OM |
1227 IEEE80211_RADIOTAP_EHT_KNOWN_PE_DISAMBIGUITY_OM |
1228 IEEE80211_RADIOTAP_EHT_KNOWN_DISREGARD_O;
1229 eht->known = cpu_to_le32(known);
1230
1231 data = __le32_to_cpu(eht->data[0]);
1232 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1233 HAL_RX_EHT_SIG_OVERFLOW_INFO0_SPATIAL_REUSE,
1234 IEEE80211_RADIOTAP_EHT_DATA0_SPATIAL_REUSE);
1235
1236 /* GI and LTF size are separately indicated in radiotap header
1237 * and hence will be parsed from other TLV
1238 */
1239 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1240 HAL_RX_EHT_SIG_OVERFLOW_INFO0_NUM_LTF_SYM,
1241 IEEE80211_RADIOTAP_EHT_DATA0_EHT_LTF);
1242
1243 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1244 HAL_RX_EHT_SIG_OVERFLOW_INFO0_LDPC_EXTA_SYM,
1245 IEEE80211_RADIOTAP_EHT_DATA0_LDPC_EXTRA_SYM_OM);
1246
1247 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1248 HAL_RX_EHT_SIG_OVERFLOW_INFO0_PRE_FEC_PAD_FACTOR,
1249 IEEE80211_RADIOTAP_EHT_DATA0_PRE_PADD_FACOR_OM);
1250
1251 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1252 HAL_RX_EHT_SIG_OVERFLOW_INFO0_DISAMBIGUITY,
1253 IEEE80211_RADIOTAP_EHT_DATA0_PE_DISAMBIGUITY_OM);
1254
1255 data |= ATH12K_LE32_DEC_ENC(ovflow->info0,
1256 HAL_RX_EHT_SIG_OVERFLOW_INFO0_DISREGARD,
1257 IEEE80211_RADIOTAP_EHT_DATA0_DISREGARD_O);
1258 eht->data[0] = cpu_to_le32(data);
1259 }
1260
1261 static void
ath12k_wifi7_dp_mon_hal_rx_parse_non_ofdma_users(const struct hal_eht_sig_non_ofdma_cmn_eb * eb,struct hal_rx_mon_ppdu_info * ppdu_info)1262 ath12k_wifi7_dp_mon_hal_rx_parse_non_ofdma_users(const struct hal_eht_sig_non_ofdma_cmn_eb *eb,
1263 struct hal_rx_mon_ppdu_info *ppdu_info)
1264 {
1265 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
1266 u32 known, data;
1267
1268 known = __le32_to_cpu(eht->known);
1269 known |= IEEE80211_RADIOTAP_EHT_KNOWN_NR_NON_OFDMA_USERS_M;
1270 eht->known = cpu_to_le32(known);
1271
1272 data = __le32_to_cpu(eht->data[7]);
1273 data |= ATH12K_LE32_DEC_ENC(eb->info0,
1274 HAL_RX_EHT_SIG_NON_OFDMA_INFO0_NUM_USERS,
1275 IEEE80211_RADIOTAP_EHT_DATA7_NUM_OF_NON_OFDMA_USERS);
1276 eht->data[7] = cpu_to_le32(data);
1277 }
1278
1279 static void
ath12k_wifi7_dp_mon_hal_rx_parse_eht_mumimo_user(const struct hal_eht_sig_mu_mimo * user,struct hal_rx_mon_ppdu_info * ppdu_info)1280 ath12k_wifi7_dp_mon_hal_rx_parse_eht_mumimo_user(const struct hal_eht_sig_mu_mimo *user,
1281 struct hal_rx_mon_ppdu_info *ppdu_info)
1282 {
1283 struct hal_rx_eht_info *eht_info = &ppdu_info->eht_info;
1284 u32 user_idx;
1285
1286 if (eht_info->num_user_info >= ARRAY_SIZE(eht_info->user_info))
1287 return;
1288
1289 user_idx = eht_info->num_user_info++;
1290
1291 eht_info->user_info[user_idx] |=
1292 IEEE80211_RADIOTAP_EHT_USER_INFO_STA_ID_KNOWN |
1293 IEEE80211_RADIOTAP_EHT_USER_INFO_MCS_KNOWN |
1294 IEEE80211_RADIOTAP_EHT_USER_INFO_CODING_KNOWN |
1295 IEEE80211_RADIOTAP_EHT_USER_INFO_SPATIAL_CONFIG_KNOWN_M |
1296 ATH12K_LE32_DEC_ENC(user->info0,
1297 HAL_RX_EHT_SIG_MUMIMO_USER_INFO0_STA_ID,
1298 IEEE80211_RADIOTAP_EHT_USER_INFO_STA_ID) |
1299 ATH12K_LE32_DEC_ENC(user->info0,
1300 HAL_RX_EHT_SIG_MUMIMO_USER_INFO0_CODING,
1301 IEEE80211_RADIOTAP_EHT_USER_INFO_CODING) |
1302 ATH12K_LE32_DEC_ENC(user->info0,
1303 HAL_RX_EHT_SIG_MUMIMO_USER_INFO0_MCS,
1304 IEEE80211_RADIOTAP_EHT_USER_INFO_MCS) |
1305 ATH12K_LE32_DEC_ENC(user->info0,
1306 HAL_RX_EHT_SIG_MUMIMO_USER_INFO0_SPATIAL_CODING,
1307 IEEE80211_RADIOTAP_EHT_USER_INFO_SPATIAL_CONFIG_M);
1308
1309 ppdu_info->mcs = le32_get_bits(user->info0,
1310 HAL_RX_EHT_SIG_MUMIMO_USER_INFO0_MCS);
1311 }
1312
1313 static void
ath12k_wifi7_dp_mon_hal_rx_parse_eht_non_mumimo_user(const struct hal_eht_sig_non_mu_mimo * user,struct hal_rx_mon_ppdu_info * ppdu_info)1314 ath12k_wifi7_dp_mon_hal_rx_parse_eht_non_mumimo_user(const struct hal_eht_sig_non_mu_mimo *user,
1315 struct hal_rx_mon_ppdu_info *ppdu_info)
1316 {
1317 struct hal_rx_eht_info *eht_info = &ppdu_info->eht_info;
1318 u32 user_idx;
1319
1320 if (eht_info->num_user_info >= ARRAY_SIZE(eht_info->user_info))
1321 return;
1322
1323 user_idx = eht_info->num_user_info++;
1324
1325 eht_info->user_info[user_idx] |=
1326 IEEE80211_RADIOTAP_EHT_USER_INFO_STA_ID_KNOWN |
1327 IEEE80211_RADIOTAP_EHT_USER_INFO_MCS_KNOWN |
1328 IEEE80211_RADIOTAP_EHT_USER_INFO_CODING_KNOWN |
1329 IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_KNOWN_O |
1330 IEEE80211_RADIOTAP_EHT_USER_INFO_BEAMFORMING_KNOWN_O |
1331 ATH12K_LE32_DEC_ENC(user->info0,
1332 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_STA_ID,
1333 IEEE80211_RADIOTAP_EHT_USER_INFO_STA_ID) |
1334 ATH12K_LE32_DEC_ENC(user->info0,
1335 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_CODING,
1336 IEEE80211_RADIOTAP_EHT_USER_INFO_CODING) |
1337 ATH12K_LE32_DEC_ENC(user->info0,
1338 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_MCS,
1339 IEEE80211_RADIOTAP_EHT_USER_INFO_MCS) |
1340 ATH12K_LE32_DEC_ENC(user->info0,
1341 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_NSS,
1342 IEEE80211_RADIOTAP_EHT_USER_INFO_NSS_O) |
1343 ATH12K_LE32_DEC_ENC(user->info0,
1344 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_BEAMFORMED,
1345 IEEE80211_RADIOTAP_EHT_USER_INFO_BEAMFORMING_O);
1346
1347 ppdu_info->mcs = le32_get_bits(user->info0,
1348 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_MCS);
1349
1350 ppdu_info->nss = le32_get_bits(user->info0,
1351 HAL_RX_EHT_SIG_NON_MUMIMO_USER_INFO0_NSS) + 1;
1352 }
1353
1354 static inline bool
ath12k_wifi7_dp_mon_hal_rx_is_mu_mimo_user(const struct hal_rx_u_sig_info * usig_info)1355 ath12k_wifi7_dp_mon_hal_rx_is_mu_mimo_user(const struct hal_rx_u_sig_info *usig_info)
1356 {
1357 if (usig_info->ppdu_type_comp_mode == HAL_RX_RECEPTION_TYPE_SU &&
1358 usig_info->ul_dl == 1)
1359 return true;
1360
1361 return false;
1362 }
1363
1364 static void
ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_non_ofdma(const void * tlv,struct hal_rx_mon_ppdu_info * ppdu_info)1365 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_non_ofdma(const void *tlv,
1366 struct hal_rx_mon_ppdu_info *ppdu_info)
1367 {
1368 const struct hal_eht_sig_non_ofdma_cmn_eb *eb = tlv;
1369
1370 ath12k_wifi7_dp_mon_hal_rx_parse_usig_overflow(tlv, ppdu_info);
1371 ath12k_wifi7_dp_mon_hal_rx_parse_non_ofdma_users(eb, ppdu_info);
1372
1373 if (ath12k_wifi7_dp_mon_hal_rx_is_mu_mimo_user(&ppdu_info->u_sig_info))
1374 ath12k_wifi7_dp_mon_hal_rx_parse_eht_mumimo_user(&eb->user_field.mu_mimo,
1375 ppdu_info);
1376 else
1377 ath12k_wifi7_dp_mon_hal_rx_parse_eht_non_mumimo_user(&eb->user_field.n_mu_mimo,
1378 ppdu_info);
1379 }
1380
1381 static void
ath12k_wifi7_dp_mon_hal_rx_parse_ru_allocation(const struct hal_eht_sig_ofdma_cmn_eb * eb,struct hal_rx_mon_ppdu_info * ppdu_info)1382 ath12k_wifi7_dp_mon_hal_rx_parse_ru_allocation(const struct hal_eht_sig_ofdma_cmn_eb *eb,
1383 struct hal_rx_mon_ppdu_info *ppdu_info)
1384 {
1385 const struct hal_eht_sig_ofdma_cmn_eb1 *ofdma_cmn_eb1 = &eb->eb1;
1386 const struct hal_eht_sig_ofdma_cmn_eb2 *ofdma_cmn_eb2 = &eb->eb2;
1387 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
1388 enum ieee80211_radiotap_eht_data ru_123, ru_124, ru_125, ru_126;
1389 enum ieee80211_radiotap_eht_data ru_121, ru_122, ru_112, ru_111;
1390 u32 data;
1391
1392 ru_123 = IEEE80211_RADIOTAP_EHT_DATA4_RU_ALLOC_CC_1_2_3;
1393 ru_124 = IEEE80211_RADIOTAP_EHT_DATA5_RU_ALLOC_CC_1_2_4;
1394 ru_125 = IEEE80211_RADIOTAP_EHT_DATA5_RU_ALLOC_CC_1_2_5;
1395 ru_126 = IEEE80211_RADIOTAP_EHT_DATA6_RU_ALLOC_CC_1_2_6;
1396 ru_121 = IEEE80211_RADIOTAP_EHT_DATA3_RU_ALLOC_CC_1_2_1;
1397 ru_122 = IEEE80211_RADIOTAP_EHT_DATA3_RU_ALLOC_CC_1_2_2;
1398 ru_112 = IEEE80211_RADIOTAP_EHT_DATA2_RU_ALLOC_CC_1_1_2;
1399 ru_111 = IEEE80211_RADIOTAP_EHT_DATA1_RU_ALLOC_CC_1_1_1;
1400
1401 switch (ppdu_info->u_sig_info.bw) {
1402 case HAL_EHT_BW_320_2:
1403 case HAL_EHT_BW_320_1:
1404 data = __le32_to_cpu(eht->data[4]);
1405 /* CC1 2::3 */
1406 data |= IEEE80211_RADIOTAP_EHT_DATA4_RU_ALLOC_CC_1_2_3_KNOWN |
1407 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1408 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_3,
1409 ru_123);
1410 eht->data[4] = cpu_to_le32(data);
1411
1412 data = __le32_to_cpu(eht->data[5]);
1413 /* CC1 2::4 */
1414 data |= IEEE80211_RADIOTAP_EHT_DATA5_RU_ALLOC_CC_1_2_4_KNOWN |
1415 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1416 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_4,
1417 ru_124);
1418
1419 /* CC1 2::5 */
1420 data |= IEEE80211_RADIOTAP_EHT_DATA5_RU_ALLOC_CC_1_2_5_KNOWN |
1421 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1422 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_5,
1423 ru_125);
1424 eht->data[5] = cpu_to_le32(data);
1425
1426 data = __le32_to_cpu(eht->data[6]);
1427 /* CC1 2::6 */
1428 data |= IEEE80211_RADIOTAP_EHT_DATA6_RU_ALLOC_CC_1_2_6_KNOWN |
1429 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1430 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_6,
1431 ru_126);
1432 eht->data[6] = cpu_to_le32(data);
1433
1434 fallthrough;
1435 case HAL_EHT_BW_160:
1436 data = __le32_to_cpu(eht->data[3]);
1437 /* CC1 2::1 */
1438 data |= IEEE80211_RADIOTAP_EHT_DATA3_RU_ALLOC_CC_1_2_1_KNOWN |
1439 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1440 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_1,
1441 ru_121);
1442 /* CC1 2::2 */
1443 data |= IEEE80211_RADIOTAP_EHT_DATA3_RU_ALLOC_CC_1_2_2_KNOWN |
1444 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb2->info0,
1445 HAL_RX_EHT_SIG_OFDMA_EB2_RU_ALLOC_2_2,
1446 ru_122);
1447 eht->data[3] = cpu_to_le32(data);
1448
1449 fallthrough;
1450 case HAL_EHT_BW_80:
1451 data = __le32_to_cpu(eht->data[2]);
1452 /* CC1 1::2 */
1453 data |= IEEE80211_RADIOTAP_EHT_DATA2_RU_ALLOC_CC_1_1_2_KNOWN |
1454 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb1->info0,
1455 HAL_RX_EHT_SIG_OFDMA_EB1_RU_ALLOC_1_2,
1456 ru_112);
1457 eht->data[2] = cpu_to_le32(data);
1458
1459 fallthrough;
1460 case HAL_EHT_BW_40:
1461 fallthrough;
1462 case HAL_EHT_BW_20:
1463 data = __le32_to_cpu(eht->data[1]);
1464 /* CC1 1::1 */
1465 data |= IEEE80211_RADIOTAP_EHT_DATA1_RU_ALLOC_CC_1_1_1_KNOWN |
1466 ATH12K_LE64_DEC_ENC(ofdma_cmn_eb1->info0,
1467 HAL_RX_EHT_SIG_OFDMA_EB1_RU_ALLOC_1_1,
1468 ru_111);
1469 eht->data[1] = cpu_to_le32(data);
1470 break;
1471 default:
1472 break;
1473 }
1474 }
1475
1476 static void
ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ofdma(const void * tlv,struct hal_rx_mon_ppdu_info * ppdu_info)1477 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ofdma(const void *tlv,
1478 struct hal_rx_mon_ppdu_info *ppdu_info)
1479 {
1480 const struct hal_eht_sig_ofdma_cmn_eb *ofdma = tlv;
1481
1482 ath12k_wifi7_dp_mon_hal_rx_parse_usig_overflow(tlv, ppdu_info);
1483 ath12k_wifi7_dp_mon_hal_rx_parse_ru_allocation(ofdma, ppdu_info);
1484
1485 ath12k_wifi7_dp_mon_hal_rx_parse_eht_non_mumimo_user(&ofdma->user_field.n_mu_mimo,
1486 ppdu_info);
1487 }
1488
1489 static void
ath12k_wifi7_dp_mon_parse_eht_sig_hdr(struct hal_rx_mon_ppdu_info * ppdu_info,const void * tlv_data)1490 ath12k_wifi7_dp_mon_parse_eht_sig_hdr(struct hal_rx_mon_ppdu_info *ppdu_info,
1491 const void *tlv_data)
1492 {
1493 ppdu_info->is_eht = true;
1494
1495 if (ath12k_wifi7_dp_mon_hal_rx_is_frame_type_ndp(&ppdu_info->u_sig_info))
1496 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ndp(tlv_data, ppdu_info);
1497 else if (ath12k_wifi7_dp_mon_hal_rx_is_non_ofdma(&ppdu_info->u_sig_info))
1498 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_non_ofdma(tlv_data, ppdu_info);
1499 else if (ath12k_wifi7_dp_mon_hal_rx_is_ofdma(&ppdu_info->u_sig_info))
1500 ath12k_wifi7_dp_mon_hal_rx_parse_eht_sig_ofdma(tlv_data, ppdu_info);
1501 }
1502
ath12k_wifi7_dp_mon_parse_rx_msdu_end_err(u32 info,u32 * errmap)1503 static void ath12k_wifi7_dp_mon_parse_rx_msdu_end_err(u32 info, u32 *errmap)
1504 {
1505 if (info & RX_MSDU_END_INFO13_FCS_ERR)
1506 *errmap |= HAL_RX_MPDU_ERR_FCS;
1507
1508 if (info & RX_MSDU_END_INFO13_DECRYPT_ERR)
1509 *errmap |= HAL_RX_MPDU_ERR_DECRYPT;
1510
1511 if (info & RX_MSDU_END_INFO13_TKIP_MIC_ERR)
1512 *errmap |= HAL_RX_MPDU_ERR_TKIP_MIC;
1513
1514 if (info & RX_MSDU_END_INFO13_A_MSDU_ERROR)
1515 *errmap |= HAL_RX_MPDU_ERR_AMSDU_ERR;
1516
1517 if (info & RX_MSDU_END_INFO13_OVERFLOW_ERR)
1518 *errmap |= HAL_RX_MPDU_ERR_OVERFLOW;
1519
1520 if (info & RX_MSDU_END_INFO13_MSDU_LEN_ERR)
1521 *errmap |= HAL_RX_MPDU_ERR_MSDU_LEN;
1522
1523 if (info & RX_MSDU_END_INFO13_MPDU_LEN_ERR)
1524 *errmap |= HAL_RX_MPDU_ERR_MPDU_LEN;
1525 }
1526
1527 static void
ath12k_wifi7_parse_cmn_usr_info(const struct hal_phyrx_common_user_info * cmn_usr_info,struct hal_rx_mon_ppdu_info * ppdu_info)1528 ath12k_wifi7_parse_cmn_usr_info(const struct hal_phyrx_common_user_info *cmn_usr_info,
1529 struct hal_rx_mon_ppdu_info *ppdu_info)
1530 {
1531 struct hal_rx_radiotap_eht *eht = &ppdu_info->eht_info.eht;
1532 u32 known, data, cp_setting, ltf_size;
1533
1534 known = __le32_to_cpu(eht->known);
1535 known |= IEEE80211_RADIOTAP_EHT_KNOWN_GI |
1536 IEEE80211_RADIOTAP_EHT_KNOWN_EHT_LTF;
1537 eht->known = cpu_to_le32(known);
1538
1539 cp_setting = le32_get_bits(cmn_usr_info->info0,
1540 HAL_RX_CMN_USR_INFO0_CP_SETTING);
1541 ltf_size = le32_get_bits(cmn_usr_info->info0,
1542 HAL_RX_CMN_USR_INFO0_LTF_SIZE);
1543
1544 data = __le32_to_cpu(eht->data[0]);
1545 data |= u32_encode_bits(cp_setting, IEEE80211_RADIOTAP_EHT_DATA0_GI);
1546 data |= u32_encode_bits(ltf_size, IEEE80211_RADIOTAP_EHT_DATA0_LTF);
1547 eht->data[0] = cpu_to_le32(data);
1548
1549 if (!ppdu_info->ltf_size)
1550 ppdu_info->ltf_size = ltf_size;
1551 if (!ppdu_info->gi)
1552 ppdu_info->gi = cp_setting;
1553 }
1554
1555 static void
ath12k_wifi7_dp_mon_parse_status_msdu_end(struct ath12k_mon_data * pmon,const struct hal_rx_msdu_end * msdu_end)1556 ath12k_wifi7_dp_mon_parse_status_msdu_end(struct ath12k_mon_data *pmon,
1557 const struct hal_rx_msdu_end *msdu_end)
1558 {
1559 ath12k_wifi7_dp_mon_parse_rx_msdu_end_err(__le32_to_cpu(msdu_end->info2),
1560 &pmon->err_bitmap);
1561 pmon->decap_format = le32_get_bits(msdu_end->info1,
1562 RX_MSDU_END_INFO11_DECAP_FORMAT);
1563 }
1564
1565 static enum hal_rx_mon_status
ath12k_wifi7_dp_mon_rx_parse_status_tlv(struct ath12k_pdev_dp * dp_pdev,struct ath12k_mon_data * pmon,const void * tlv)1566 ath12k_wifi7_dp_mon_rx_parse_status_tlv(struct ath12k_pdev_dp *dp_pdev,
1567 struct ath12k_mon_data *pmon,
1568 const void *tlv)
1569 {
1570 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;
1571 struct ath12k *ar = ath12k_pdev_dp_to_ar(dp_pdev);
1572 struct ath12k_hal *hal = &ar->ab->hal;
1573 u16 tlv_tag, tlv_len, userid;
1574 void *tlv_data;
1575 u32 info[7];
1576
1577 tlv_data = hal->ops->mon_rx_status_dec_tlv_hdr((void *)tlv, &tlv_tag,
1578 &tlv_len, &userid);
1579
1580 if (ppdu_info->tlv_aggr.in_progress && ppdu_info->tlv_aggr.tlv_tag != tlv_tag) {
1581 ath12k_wifi7_dp_mon_parse_eht_sig_hdr(ppdu_info,
1582 ppdu_info->tlv_aggr.buf);
1583
1584 ppdu_info->tlv_aggr.in_progress = false;
1585 ppdu_info->tlv_aggr.cur_len = 0;
1586 }
1587
1588 switch (tlv_tag) {
1589 case HAL_RX_PPDU_START: {
1590 const struct hal_rx_ppdu_start *ppdu_start = tlv_data;
1591
1592 u64 ppdu_ts = ath12k_le32hilo_to_u64(ppdu_start->ppdu_start_ts_63_32,
1593 ppdu_start->ppdu_start_ts_31_0);
1594
1595 info[0] = __le32_to_cpu(ppdu_start->info0);
1596
1597 ppdu_info->ppdu_id = u32_get_bits(info[0],
1598 HAL_RX_PPDU_START_INFO0_PPDU_ID);
1599
1600 info[1] = __le32_to_cpu(ppdu_start->info1);
1601 ppdu_info->chan_num = u32_get_bits(info[1],
1602 HAL_RX_PPDU_START_INFO1_CHAN_NUM);
1603 ppdu_info->freq = u32_get_bits(info[1],
1604 HAL_RX_PPDU_START_INFO1_CHAN_FREQ);
1605 ppdu_info->ppdu_ts = ppdu_ts;
1606
1607 if (ppdu_info->ppdu_id != ppdu_info->last_ppdu_id) {
1608 ppdu_info->last_ppdu_id = ppdu_info->ppdu_id;
1609 ppdu_info->num_users = 0;
1610 memset(&ppdu_info->mpdu_fcs_ok_bitmap, 0,
1611 HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
1612 sizeof(ppdu_info->mpdu_fcs_ok_bitmap[0]));
1613 }
1614 break;
1615 }
1616 case HAL_RX_PPDU_END_USER_STATS: {
1617 const struct hal_rx_ppdu_end_user_stats *eu_stats = tlv_data;
1618 u32 tid_bitmap;
1619
1620 info[0] = __le32_to_cpu(eu_stats->info0);
1621 info[1] = __le32_to_cpu(eu_stats->info1);
1622 info[2] = __le32_to_cpu(eu_stats->info2);
1623 info[4] = __le32_to_cpu(eu_stats->info4);
1624 info[5] = __le32_to_cpu(eu_stats->info5);
1625 info[6] = __le32_to_cpu(eu_stats->info6);
1626
1627 ppdu_info->ast_index =
1628 u32_get_bits(info[2], HAL_RX_PPDU_END_USER_STATS_INFO2_AST_INDEX);
1629 ppdu_info->fc_valid =
1630 u32_get_bits(info[1], HAL_RX_PPDU_END_USER_STATS_INFO1_FC_VALID);
1631 tid_bitmap = u32_get_bits(info[6],
1632 HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP);
1633 ppdu_info->tid = ffs(tid_bitmap) - 1;
1634 ppdu_info->tcp_msdu_count =
1635 u32_get_bits(info[4],
1636 HAL_RX_PPDU_END_USER_STATS_INFO4_TCP_MSDU_CNT);
1637 ppdu_info->udp_msdu_count =
1638 u32_get_bits(info[4],
1639 HAL_RX_PPDU_END_USER_STATS_INFO4_UDP_MSDU_CNT);
1640 ppdu_info->other_msdu_count =
1641 u32_get_bits(info[5],
1642 HAL_RX_PPDU_END_USER_STATS_INFO5_OTHER_MSDU_CNT);
1643 ppdu_info->tcp_ack_msdu_count =
1644 u32_get_bits(info[5],
1645 HAL_RX_PPDU_END_USER_STATS_INFO5_TCP_ACK_MSDU_CNT);
1646 ppdu_info->preamble_type =
1647 u32_get_bits(info[1],
1648 HAL_RX_PPDU_END_USER_STATS_INFO1_PKT_TYPE);
1649 ppdu_info->num_mpdu_fcs_ok =
1650 u32_get_bits(info[1],
1651 HAL_RX_PPDU_END_USER_STATS_INFO1_MPDU_CNT_FCS_OK);
1652 ppdu_info->num_mpdu_fcs_err =
1653 u32_get_bits(info[0],
1654 HAL_RX_PPDU_END_USER_STATS_INFO0_MPDU_CNT_FCS_ERR);
1655 ppdu_info->peer_id =
1656 u32_get_bits(info[0], HAL_RX_PPDU_END_USER_STATS_INFO0_PEER_ID);
1657
1658 switch (ppdu_info->preamble_type) {
1659 case HAL_RX_PREAMBLE_11N:
1660 ppdu_info->ht_flags = 1;
1661 break;
1662 case HAL_RX_PREAMBLE_11AC:
1663 ppdu_info->vht_flags = 1;
1664 break;
1665 case HAL_RX_PREAMBLE_11AX:
1666 ppdu_info->he_flags = 1;
1667 break;
1668 case HAL_RX_PREAMBLE_11BE:
1669 ppdu_info->is_eht = true;
1670 break;
1671 default:
1672 break;
1673 }
1674
1675 if (userid < HAL_MAX_UL_MU_USERS) {
1676 struct hal_rx_user_status *rxuser_stats =
1677 &ppdu_info->userstats[userid];
1678
1679 if (ppdu_info->num_mpdu_fcs_ok > 1 ||
1680 ppdu_info->num_mpdu_fcs_err > 1)
1681 ppdu_info->userstats[userid].ampdu_present = true;
1682
1683 ppdu_info->num_users += 1;
1684
1685 ath12k_wifi7_dp_mon_rx_handle_ofdma_info(eu_stats, rxuser_stats);
1686 ath12k_wifi7_dp_mon_rx_populate_mu_user_info(eu_stats, ppdu_info,
1687 rxuser_stats);
1688 }
1689 ppdu_info->mpdu_fcs_ok_bitmap[0] = __le32_to_cpu(eu_stats->rsvd1[0]);
1690 ppdu_info->mpdu_fcs_ok_bitmap[1] = __le32_to_cpu(eu_stats->rsvd1[1]);
1691 break;
1692 }
1693 case HAL_RX_PPDU_END_USER_STATS_EXT: {
1694 const struct hal_rx_ppdu_end_user_stats_ext *eu_stats = tlv_data;
1695
1696 ppdu_info->mpdu_fcs_ok_bitmap[2] = __le32_to_cpu(eu_stats->info1);
1697 ppdu_info->mpdu_fcs_ok_bitmap[3] = __le32_to_cpu(eu_stats->info2);
1698 ppdu_info->mpdu_fcs_ok_bitmap[4] = __le32_to_cpu(eu_stats->info3);
1699 ppdu_info->mpdu_fcs_ok_bitmap[5] = __le32_to_cpu(eu_stats->info4);
1700 ppdu_info->mpdu_fcs_ok_bitmap[6] = __le32_to_cpu(eu_stats->info5);
1701 ppdu_info->mpdu_fcs_ok_bitmap[7] = __le32_to_cpu(eu_stats->info6);
1702 break;
1703 }
1704 case HAL_PHYRX_HT_SIG:
1705 ath12k_wifi7_dp_mon_parse_ht_sig(tlv_data, ppdu_info);
1706 break;
1707
1708 case HAL_PHYRX_L_SIG_B:
1709 ath12k_wifi7_dp_mon_parse_l_sig_b(tlv_data, ppdu_info);
1710 break;
1711
1712 case HAL_PHYRX_L_SIG_A:
1713 ath12k_wifi7_dp_mon_parse_l_sig_a(tlv_data, ppdu_info);
1714 break;
1715
1716 case HAL_PHYRX_VHT_SIG_A:
1717 ath12k_wifi7_dp_mon_parse_vht_sig_a(tlv_data, ppdu_info);
1718 break;
1719
1720 case HAL_PHYRX_HE_SIG_A_SU:
1721 ath12k_wifi7_dp_mon_parse_he_sig_su(tlv_data, ppdu_info);
1722 break;
1723
1724 case HAL_PHYRX_HE_SIG_A_MU_DL:
1725 ath12k_wifi7_dp_mon_parse_he_sig_mu(tlv_data, ppdu_info);
1726 break;
1727
1728 case HAL_PHYRX_HE_SIG_B1_MU:
1729 ath12k_wifi7_dp_mon_parse_he_sig_b1_mu(tlv_data, ppdu_info);
1730 break;
1731
1732 case HAL_PHYRX_HE_SIG_B2_MU:
1733 ath12k_wifi7_dp_mon_parse_he_sig_b2_mu(tlv_data, ppdu_info);
1734 break;
1735
1736 case HAL_PHYRX_HE_SIG_B2_OFDMA:
1737 ath12k_wifi7_dp_mon_parse_he_sig_b2_ofdma(tlv_data, ppdu_info);
1738 break;
1739
1740 case HAL_PHYRX_RSSI_LEGACY: {
1741 const struct hal_rx_phyrx_rssi_legacy_info *rssi = tlv_data;
1742
1743 info[0] = __le32_to_cpu(rssi->info0);
1744 info[2] = __le32_to_cpu(rssi->info2);
1745
1746 /* TODO: Please note that the combined rssi will not be accurate
1747 * in MU case. Rssi in MU needs to be retrieved from
1748 * PHYRX_OTHER_RECEIVE_INFO TLV.
1749 */
1750 ppdu_info->rssi_comb =
1751 u32_get_bits(info[2],
1752 HAL_RX_RSSI_LEGACY_INFO_INFO2_RSSI_COMB_PPDU);
1753
1754 ppdu_info->bw = u32_get_bits(info[0],
1755 HAL_RX_RSSI_LEGACY_INFO_INFO0_RX_BW);
1756 break;
1757 }
1758 case HAL_PHYRX_COMMON_USER_INFO: {
1759 ath12k_wifi7_parse_cmn_usr_info(tlv_data, ppdu_info);
1760 break;
1761 }
1762 case HAL_RX_PPDU_START_USER_INFO:
1763 ath12k_wifi7_dp_mon_hal_rx_parse_user_info(tlv_data, userid, ppdu_info);
1764 break;
1765
1766 case HAL_RXPCU_PPDU_END_INFO: {
1767 const struct hal_rx_ppdu_end_duration *ppdu_rx_duration = tlv_data;
1768
1769 info[0] = __le32_to_cpu(ppdu_rx_duration->info0);
1770 ppdu_info->rx_duration =
1771 u32_get_bits(info[0], HAL_RX_PPDU_END_DURATION);
1772 ppdu_info->tsft = __le32_to_cpu(ppdu_rx_duration->rsvd0[1]);
1773 ppdu_info->tsft = (ppdu_info->tsft << 32) |
1774 __le32_to_cpu(ppdu_rx_duration->rsvd0[0]);
1775 break;
1776 }
1777 case HAL_RX_MPDU_START: {
1778 const struct hal_rx_mpdu_start *mpdu_start = tlv_data;
1779 u16 peer_id;
1780
1781 info[1] = __le32_to_cpu(mpdu_start->info1);
1782 peer_id = u32_get_bits(info[1], HAL_RX_MPDU_START_INFO1_PEERID);
1783 ppdu_info->peer_id = peer_id;
1784
1785 ppdu_info->mpdu_len += u32_get_bits(info[1],
1786 HAL_RX_MPDU_START_INFO2_MPDU_LEN);
1787 if (userid < HAL_MAX_UL_MU_USERS) {
1788 info[0] = __le32_to_cpu(mpdu_start->info0);
1789 ppdu_info->userid = userid;
1790 ppdu_info->userstats[userid].ampdu_id =
1791 u32_get_bits(info[0], HAL_RX_MPDU_START_INFO0_PPDU_ID);
1792 }
1793
1794 return HAL_RX_MON_STATUS_MPDU_START;
1795 }
1796 case HAL_RX_MSDU_START:
1797 /* TODO: add msdu start parsing logic */
1798 break;
1799 case HAL_MON_BUF_ADDR:
1800 return HAL_RX_MON_STATUS_BUF_ADDR;
1801 case HAL_RX_MSDU_END:
1802 ath12k_wifi7_dp_mon_parse_status_msdu_end(pmon, tlv_data);
1803 return HAL_RX_MON_STATUS_MSDU_END;
1804 case HAL_RX_MPDU_END:
1805 return HAL_RX_MON_STATUS_MPDU_END;
1806 case HAL_PHYRX_GENERIC_U_SIG:
1807 ath12k_wifi7_dp_mon_hal_rx_parse_u_sig_hdr(tlv_data, ppdu_info);
1808 break;
1809 case HAL_PHYRX_GENERIC_EHT_SIG:
1810 /* Handle the case where aggregation is in progress
1811 * or the current TLV is one of the TLVs which should be
1812 * aggregated
1813 */
1814 if (!ppdu_info->tlv_aggr.in_progress) {
1815 ppdu_info->tlv_aggr.in_progress = true;
1816 ppdu_info->tlv_aggr.tlv_tag = tlv_tag;
1817 ppdu_info->tlv_aggr.cur_len = 0;
1818 }
1819
1820 ppdu_info->is_eht = true;
1821
1822 ath12k_wifi7_dp_mon_hal_aggr_tlv(ppdu_info, tlv_len, tlv_data);
1823 break;
1824 case HAL_DUMMY:
1825 return HAL_RX_MON_STATUS_BUF_DONE;
1826 case HAL_RX_PPDU_END_STATUS_DONE:
1827 case 0:
1828 return HAL_RX_MON_STATUS_PPDU_DONE;
1829 default:
1830 break;
1831 }
1832
1833 return HAL_RX_MON_STATUS_PPDU_NOT_DONE;
1834 }
1835
1836 static int
ath12k_wifi7_dp_mon_parse_rx_dest_tlv(struct ath12k_pdev_dp * dp_pdev,struct ath12k_mon_data * pmon,enum hal_rx_mon_status hal_status,const void * tlv_data)1837 ath12k_wifi7_dp_mon_parse_rx_dest_tlv(struct ath12k_pdev_dp *dp_pdev,
1838 struct ath12k_mon_data *pmon,
1839 enum hal_rx_mon_status hal_status,
1840 const void *tlv_data)
1841 {
1842 switch (hal_status) {
1843 case HAL_RX_MON_STATUS_MPDU_START:
1844 if (WARN_ON_ONCE(pmon->mon_mpdu))
1845 break;
1846
1847 pmon->mon_mpdu = kzalloc_obj(*pmon->mon_mpdu, GFP_ATOMIC);
1848 if (!pmon->mon_mpdu)
1849 return -ENOMEM;
1850 break;
1851 case HAL_RX_MON_STATUS_BUF_ADDR:
1852 return ath12k_dp_mon_parse_status_buf(dp_pdev, pmon, tlv_data);
1853 case HAL_RX_MON_STATUS_MPDU_END:
1854 /* If no MSDU then free empty MPDU */
1855 if (pmon->mon_mpdu->tail) {
1856 pmon->mon_mpdu->tail->next = NULL;
1857 list_add_tail(&pmon->mon_mpdu->list, &pmon->dp_rx_mon_mpdu_list);
1858 } else {
1859 kfree(pmon->mon_mpdu);
1860 }
1861 pmon->mon_mpdu = NULL;
1862 break;
1863 case HAL_RX_MON_STATUS_MSDU_END:
1864 pmon->mon_mpdu->decap_format = pmon->decap_format;
1865 pmon->mon_mpdu->err_bitmap = pmon->err_bitmap;
1866 break;
1867 default:
1868 break;
1869 }
1870
1871 return 0;
1872 }
1873
1874 static struct dp_mon_tx_ppdu_info *
ath12k_wifi7_dp_mon_tx_get_ppdu_info(struct ath12k_mon_data * pmon,unsigned int ppdu_id,enum dp_mon_tx_ppdu_info_type type)1875 ath12k_wifi7_dp_mon_tx_get_ppdu_info(struct ath12k_mon_data *pmon,
1876 unsigned int ppdu_id,
1877 enum dp_mon_tx_ppdu_info_type type)
1878 {
1879 struct dp_mon_tx_ppdu_info *tx_ppdu_info;
1880
1881 if (type == DP_MON_TX_PROT_PPDU_INFO) {
1882 tx_ppdu_info = pmon->tx_prot_ppdu_info;
1883
1884 if (tx_ppdu_info && !tx_ppdu_info->is_used)
1885 return tx_ppdu_info;
1886 kfree(tx_ppdu_info);
1887 } else {
1888 tx_ppdu_info = pmon->tx_data_ppdu_info;
1889
1890 if (tx_ppdu_info && !tx_ppdu_info->is_used)
1891 return tx_ppdu_info;
1892 kfree(tx_ppdu_info);
1893 }
1894
1895 /* allocate new tx_ppdu_info */
1896 tx_ppdu_info = kzalloc_obj(*tx_ppdu_info, GFP_ATOMIC);
1897 if (!tx_ppdu_info)
1898 return NULL;
1899
1900 tx_ppdu_info->is_used = 0;
1901 tx_ppdu_info->ppdu_id = ppdu_id;
1902
1903 if (type == DP_MON_TX_PROT_PPDU_INFO)
1904 pmon->tx_prot_ppdu_info = tx_ppdu_info;
1905 else
1906 pmon->tx_data_ppdu_info = tx_ppdu_info;
1907
1908 return tx_ppdu_info;
1909 }
1910
1911 static struct dp_mon_tx_ppdu_info *
ath12k_wifi7_dp_mon_hal_tx_ppdu_info(struct ath12k_mon_data * pmon,u16 tlv_tag)1912 ath12k_wifi7_dp_mon_hal_tx_ppdu_info(struct ath12k_mon_data *pmon,
1913 u16 tlv_tag)
1914 {
1915 switch (tlv_tag) {
1916 case HAL_TX_FES_SETUP:
1917 case HAL_TX_FLUSH:
1918 case HAL_PCU_PPDU_SETUP_INIT:
1919 case HAL_TX_PEER_ENTRY:
1920 case HAL_TX_QUEUE_EXTENSION:
1921 case HAL_TX_MPDU_START:
1922 case HAL_TX_MSDU_START:
1923 case HAL_TX_DATA:
1924 case HAL_MON_BUF_ADDR:
1925 case HAL_TX_MPDU_END:
1926 case HAL_TX_LAST_MPDU_FETCHED:
1927 case HAL_TX_LAST_MPDU_END:
1928 case HAL_COEX_TX_REQ:
1929 case HAL_TX_RAW_OR_NATIVE_FRAME_SETUP:
1930 case HAL_SCH_CRITICAL_TLV_REFERENCE:
1931 case HAL_TX_FES_SETUP_COMPLETE:
1932 case HAL_TQM_MPDU_GLOBAL_START:
1933 case HAL_SCHEDULER_END:
1934 case HAL_TX_FES_STATUS_USER_PPDU:
1935 break;
1936 case HAL_TX_FES_STATUS_PROT: {
1937 if (!pmon->tx_prot_ppdu_info->is_used)
1938 pmon->tx_prot_ppdu_info->is_used = true;
1939
1940 return pmon->tx_prot_ppdu_info;
1941 }
1942 }
1943
1944 if (!pmon->tx_data_ppdu_info->is_used)
1945 pmon->tx_data_ppdu_info->is_used = true;
1946
1947 return pmon->tx_data_ppdu_info;
1948 }
1949
1950 #define MAX_MONITOR_HEADER 512
1951 #define MAX_DUMMY_FRM_BODY 128
1952
1953 static struct
ath12k_wifi7_dp_mon_tx_alloc_skb(void)1954 sk_buff *ath12k_wifi7_dp_mon_tx_alloc_skb(void)
1955 {
1956 struct sk_buff *skb;
1957
1958 skb = dev_alloc_skb(MAX_MONITOR_HEADER + MAX_DUMMY_FRM_BODY);
1959 if (!skb)
1960 return NULL;
1961
1962 skb_reserve(skb, MAX_MONITOR_HEADER);
1963
1964 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1965 skb_pull(skb, PTR_ALIGN(skb->data, 4) - skb->data);
1966
1967 return skb;
1968 }
1969
1970 static int
ath12k_wifi7_dp_mon_tx_gen_cts2self_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)1971 ath12k_wifi7_dp_mon_tx_gen_cts2self_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
1972 {
1973 struct sk_buff *skb;
1974 struct ieee80211_cts *cts;
1975
1976 skb = ath12k_wifi7_dp_mon_tx_alloc_skb();
1977 if (!skb)
1978 return -ENOMEM;
1979
1980 cts = (struct ieee80211_cts *)skb->data;
1981 memset(cts, 0, MAX_DUMMY_FRM_BODY);
1982 cts->frame_control =
1983 cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_CTS);
1984 cts->duration = cpu_to_le16(tx_ppdu_info->rx_status.rx_duration);
1985 memcpy(cts->ra, tx_ppdu_info->rx_status.addr1, sizeof(cts->ra));
1986
1987 skb_put(skb, sizeof(*cts));
1988 tx_ppdu_info->tx_mon_mpdu->head = skb;
1989 tx_ppdu_info->tx_mon_mpdu->tail = NULL;
1990 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
1991 &tx_ppdu_info->dp_tx_mon_mpdu_list);
1992
1993 return 0;
1994 }
1995
1996 static int
ath12k_wifi7_dp_mon_tx_gen_rts_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)1997 ath12k_wifi7_dp_mon_tx_gen_rts_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
1998 {
1999 struct sk_buff *skb;
2000 struct ieee80211_rts *rts;
2001
2002 skb = ath12k_wifi7_dp_mon_tx_alloc_skb();
2003 if (!skb)
2004 return -ENOMEM;
2005
2006 rts = (struct ieee80211_rts *)skb->data;
2007 memset(rts, 0, MAX_DUMMY_FRM_BODY);
2008 rts->frame_control =
2009 cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_RTS);
2010 rts->duration = cpu_to_le16(tx_ppdu_info->rx_status.rx_duration);
2011 memcpy(rts->ra, tx_ppdu_info->rx_status.addr1, sizeof(rts->ra));
2012 memcpy(rts->ta, tx_ppdu_info->rx_status.addr2, sizeof(rts->ta));
2013
2014 skb_put(skb, sizeof(*rts));
2015 tx_ppdu_info->tx_mon_mpdu->head = skb;
2016 tx_ppdu_info->tx_mon_mpdu->tail = NULL;
2017 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
2018 &tx_ppdu_info->dp_tx_mon_mpdu_list);
2019
2020 return 0;
2021 }
2022
2023 static int
ath12k_wifi7_dp_mon_tx_gen_3addr_qos_null_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)2024 ath12k_wifi7_dp_mon_tx_gen_3addr_qos_null_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
2025 {
2026 struct sk_buff *skb;
2027 struct ieee80211_qos_hdr *qhdr;
2028
2029 skb = ath12k_wifi7_dp_mon_tx_alloc_skb();
2030 if (!skb)
2031 return -ENOMEM;
2032
2033 qhdr = (struct ieee80211_qos_hdr *)skb->data;
2034 memset(qhdr, 0, MAX_DUMMY_FRM_BODY);
2035 qhdr->frame_control =
2036 cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC);
2037 qhdr->duration_id = cpu_to_le16(tx_ppdu_info->rx_status.rx_duration);
2038 memcpy(qhdr->addr1, tx_ppdu_info->rx_status.addr1, ETH_ALEN);
2039 memcpy(qhdr->addr2, tx_ppdu_info->rx_status.addr2, ETH_ALEN);
2040 memcpy(qhdr->addr3, tx_ppdu_info->rx_status.addr3, ETH_ALEN);
2041
2042 skb_put(skb, sizeof(*qhdr));
2043 tx_ppdu_info->tx_mon_mpdu->head = skb;
2044 tx_ppdu_info->tx_mon_mpdu->tail = NULL;
2045 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
2046 &tx_ppdu_info->dp_tx_mon_mpdu_list);
2047
2048 return 0;
2049 }
2050
2051 static int
ath12k_wifi7_dp_mon_tx_gen_4addr_qos_null_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)2052 ath12k_wifi7_dp_mon_tx_gen_4addr_qos_null_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
2053 {
2054 struct sk_buff *skb;
2055 struct dp_mon_qosframe_addr4 *qhdr;
2056
2057 skb = ath12k_wifi7_dp_mon_tx_alloc_skb();
2058 if (!skb)
2059 return -ENOMEM;
2060
2061 qhdr = (struct dp_mon_qosframe_addr4 *)skb->data;
2062 memset(qhdr, 0, MAX_DUMMY_FRM_BODY);
2063 qhdr->frame_control =
2064 cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC);
2065 qhdr->duration = cpu_to_le16(tx_ppdu_info->rx_status.rx_duration);
2066 memcpy(qhdr->addr1, tx_ppdu_info->rx_status.addr1, ETH_ALEN);
2067 memcpy(qhdr->addr2, tx_ppdu_info->rx_status.addr2, ETH_ALEN);
2068 memcpy(qhdr->addr3, tx_ppdu_info->rx_status.addr3, ETH_ALEN);
2069 memcpy(qhdr->addr4, tx_ppdu_info->rx_status.addr4, ETH_ALEN);
2070
2071 skb_put(skb, sizeof(*qhdr));
2072 tx_ppdu_info->tx_mon_mpdu->head = skb;
2073 tx_ppdu_info->tx_mon_mpdu->tail = NULL;
2074 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
2075 &tx_ppdu_info->dp_tx_mon_mpdu_list);
2076
2077 return 0;
2078 }
2079
2080 static int
ath12k_wifi7_dp_mon_tx_gen_ack_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)2081 ath12k_wifi7_dp_mon_tx_gen_ack_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
2082 {
2083 struct sk_buff *skb;
2084 struct dp_mon_frame_min_one *fbmhdr;
2085
2086 skb = ath12k_wifi7_dp_mon_tx_alloc_skb();
2087 if (!skb)
2088 return -ENOMEM;
2089
2090 fbmhdr = (struct dp_mon_frame_min_one *)skb->data;
2091 memset(fbmhdr, 0, MAX_DUMMY_FRM_BODY);
2092 fbmhdr->frame_control =
2093 cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_CFACK);
2094 memcpy(fbmhdr->addr1, tx_ppdu_info->rx_status.addr1, ETH_ALEN);
2095
2096 /* set duration zero for ack frame */
2097 fbmhdr->duration = 0;
2098
2099 skb_put(skb, sizeof(*fbmhdr));
2100 tx_ppdu_info->tx_mon_mpdu->head = skb;
2101 tx_ppdu_info->tx_mon_mpdu->tail = NULL;
2102 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
2103 &tx_ppdu_info->dp_tx_mon_mpdu_list);
2104
2105 return 0;
2106 }
2107
2108 static int
ath12k_wifi7_dp_mon_tx_gen_prot_frame(struct dp_mon_tx_ppdu_info * tx_ppdu_info)2109 ath12k_wifi7_dp_mon_tx_gen_prot_frame(struct dp_mon_tx_ppdu_info *tx_ppdu_info)
2110 {
2111 int ret = 0;
2112
2113 switch (tx_ppdu_info->rx_status.medium_prot_type) {
2114 case DP_MON_TX_MEDIUM_RTS_LEGACY:
2115 case DP_MON_TX_MEDIUM_RTS_11AC_STATIC_BW:
2116 case DP_MON_TX_MEDIUM_RTS_11AC_DYNAMIC_BW:
2117 ret = ath12k_wifi7_dp_mon_tx_gen_rts_frame(tx_ppdu_info);
2118 break;
2119 case DP_MON_TX_MEDIUM_CTS2SELF:
2120 ret = ath12k_wifi7_dp_mon_tx_gen_cts2self_frame(tx_ppdu_info);
2121 break;
2122 case DP_MON_TX_MEDIUM_QOS_NULL_NO_ACK_3ADDR:
2123 ret = ath12k_wifi7_dp_mon_tx_gen_3addr_qos_null_frame(tx_ppdu_info);
2124 break;
2125 case DP_MON_TX_MEDIUM_QOS_NULL_NO_ACK_4ADDR:
2126 ret = ath12k_wifi7_dp_mon_tx_gen_4addr_qos_null_frame(tx_ppdu_info);
2127 break;
2128 }
2129
2130 return ret;
2131 }
2132
2133 static enum dp_mon_tx_tlv_status
ath12k_wifi7_dp_mon_tx_parse_status_tlv(struct ath12k_base * ab,struct ath12k_mon_data * pmon,u16 tlv_tag,const void * tlv_data,u32 userid)2134 ath12k_wifi7_dp_mon_tx_parse_status_tlv(struct ath12k_base *ab,
2135 struct ath12k_mon_data *pmon,
2136 u16 tlv_tag, const void *tlv_data,
2137 u32 userid)
2138 {
2139 struct dp_mon_tx_ppdu_info *tx_ppdu_info;
2140 enum dp_mon_tx_tlv_status status = DP_MON_TX_STATUS_PPDU_NOT_DONE;
2141 u32 info[7];
2142
2143 tx_ppdu_info = ath12k_wifi7_dp_mon_hal_tx_ppdu_info(pmon, tlv_tag);
2144
2145 switch (tlv_tag) {
2146 case HAL_TX_FES_SETUP: {
2147 const struct hal_tx_fes_setup *tx_fes_setup = tlv_data;
2148
2149 info[0] = __le32_to_cpu(tx_fes_setup->info0);
2150 tx_ppdu_info->ppdu_id = __le32_to_cpu(tx_fes_setup->schedule_id);
2151 tx_ppdu_info->num_users =
2152 u32_get_bits(info[0], HAL_TX_FES_SETUP_INFO0_NUM_OF_USERS);
2153 status = DP_MON_TX_FES_SETUP;
2154 break;
2155 }
2156
2157 case HAL_TX_FES_STATUS_END: {
2158 const struct hal_tx_fes_status_end *tx_fes_status_end = tlv_data;
2159 u32 tst_15_0, tst_31_16;
2160
2161 info[0] = __le32_to_cpu(tx_fes_status_end->info0);
2162 tst_15_0 =
2163 u32_get_bits(info[0],
2164 HAL_TX_FES_STATUS_END_INFO0_START_TIMESTAMP_15_0);
2165 tst_31_16 =
2166 u32_get_bits(info[0],
2167 HAL_TX_FES_STATUS_END_INFO0_START_TIMESTAMP_31_16);
2168
2169 tx_ppdu_info->rx_status.ppdu_ts = (tst_15_0 | (tst_31_16 << 16));
2170 status = DP_MON_TX_FES_STATUS_END;
2171 break;
2172 }
2173
2174 case HAL_RX_RESPONSE_REQUIRED_INFO: {
2175 const struct hal_rx_resp_req_info *rx_resp_req_info = tlv_data;
2176 u32 addr_32;
2177 u16 addr_16;
2178
2179 info[0] = __le32_to_cpu(rx_resp_req_info->info0);
2180 info[1] = __le32_to_cpu(rx_resp_req_info->info1);
2181 info[2] = __le32_to_cpu(rx_resp_req_info->info2);
2182 info[3] = __le32_to_cpu(rx_resp_req_info->info3);
2183 info[4] = __le32_to_cpu(rx_resp_req_info->info4);
2184 info[5] = __le32_to_cpu(rx_resp_req_info->info5);
2185
2186 tx_ppdu_info->rx_status.ppdu_id =
2187 u32_get_bits(info[0], HAL_RX_RESP_REQ_INFO0_PPDU_ID);
2188 tx_ppdu_info->rx_status.reception_type =
2189 u32_get_bits(info[0], HAL_RX_RESP_REQ_INFO0_RECEPTION_TYPE);
2190 tx_ppdu_info->rx_status.rx_duration =
2191 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_DURATION);
2192 tx_ppdu_info->rx_status.mcs =
2193 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_RATE_MCS);
2194 tx_ppdu_info->rx_status.sgi =
2195 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_SGI);
2196 tx_ppdu_info->rx_status.is_stbc =
2197 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_STBC);
2198 tx_ppdu_info->rx_status.ldpc =
2199 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_LDPC);
2200 tx_ppdu_info->rx_status.is_ampdu =
2201 u32_get_bits(info[1], HAL_RX_RESP_REQ_INFO1_IS_AMPDU);
2202 tx_ppdu_info->rx_status.num_users =
2203 u32_get_bits(info[2], HAL_RX_RESP_REQ_INFO2_NUM_USER);
2204
2205 addr_32 = u32_get_bits(info[3], HAL_RX_RESP_REQ_INFO3_ADDR1_31_0);
2206 addr_16 = u32_get_bits(info[3], HAL_RX_RESP_REQ_INFO4_ADDR1_47_32);
2207 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr1);
2208
2209 addr_16 = u32_get_bits(info[4], HAL_RX_RESP_REQ_INFO4_ADDR1_15_0);
2210 addr_32 = u32_get_bits(info[5], HAL_RX_RESP_REQ_INFO5_ADDR1_47_16);
2211 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr2);
2212
2213 if (tx_ppdu_info->rx_status.reception_type == 0)
2214 ath12k_wifi7_dp_mon_tx_gen_cts2self_frame(tx_ppdu_info);
2215 status = DP_MON_RX_RESPONSE_REQUIRED_INFO;
2216 break;
2217 }
2218
2219 case HAL_PCU_PPDU_SETUP_INIT: {
2220 const struct hal_tx_pcu_ppdu_setup_init *ppdu_setup = tlv_data;
2221 u32 addr_32;
2222 u16 addr_16;
2223
2224 info[0] = __le32_to_cpu(ppdu_setup->info0);
2225 info[1] = __le32_to_cpu(ppdu_setup->info1);
2226 info[2] = __le32_to_cpu(ppdu_setup->info2);
2227 info[3] = __le32_to_cpu(ppdu_setup->info3);
2228 info[4] = __le32_to_cpu(ppdu_setup->info4);
2229 info[5] = __le32_to_cpu(ppdu_setup->info5);
2230 info[6] = __le32_to_cpu(ppdu_setup->info6);
2231
2232 /* protection frame address 1 */
2233 addr_32 = u32_get_bits(info[1],
2234 HAL_TX_PPDU_SETUP_INFO1_PROT_FRAME_ADDR1_31_0);
2235 addr_16 = u32_get_bits(info[2],
2236 HAL_TX_PPDU_SETUP_INFO2_PROT_FRAME_ADDR1_47_32);
2237 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr1);
2238
2239 /* protection frame address 2 */
2240 addr_16 = u32_get_bits(info[2],
2241 HAL_TX_PPDU_SETUP_INFO2_PROT_FRAME_ADDR2_15_0);
2242 addr_32 = u32_get_bits(info[3],
2243 HAL_TX_PPDU_SETUP_INFO3_PROT_FRAME_ADDR2_47_16);
2244 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr2);
2245
2246 /* protection frame address 3 */
2247 addr_32 = u32_get_bits(info[4],
2248 HAL_TX_PPDU_SETUP_INFO4_PROT_FRAME_ADDR3_31_0);
2249 addr_16 = u32_get_bits(info[5],
2250 HAL_TX_PPDU_SETUP_INFO5_PROT_FRAME_ADDR3_47_32);
2251 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr3);
2252
2253 /* protection frame address 4 */
2254 addr_16 = u32_get_bits(info[5],
2255 HAL_TX_PPDU_SETUP_INFO5_PROT_FRAME_ADDR4_15_0);
2256 addr_32 = u32_get_bits(info[6],
2257 HAL_TX_PPDU_SETUP_INFO6_PROT_FRAME_ADDR4_47_16);
2258 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr4);
2259
2260 status = u32_get_bits(info[0],
2261 HAL_TX_PPDU_SETUP_INFO0_MEDIUM_PROT_TYPE);
2262 break;
2263 }
2264
2265 case HAL_TX_QUEUE_EXTENSION: {
2266 const struct hal_tx_queue_exten *tx_q_exten = tlv_data;
2267
2268 info[0] = __le32_to_cpu(tx_q_exten->info0);
2269
2270 tx_ppdu_info->rx_status.frame_control =
2271 u32_get_bits(info[0],
2272 HAL_TX_Q_EXT_INFO0_FRAME_CTRL);
2273 tx_ppdu_info->rx_status.fc_valid = true;
2274 break;
2275 }
2276
2277 case HAL_TX_FES_STATUS_START: {
2278 const struct hal_tx_fes_status_start *tx_fes_start = tlv_data;
2279
2280 info[0] = __le32_to_cpu(tx_fes_start->info0);
2281
2282 tx_ppdu_info->rx_status.medium_prot_type =
2283 u32_get_bits(info[0],
2284 HAL_TX_FES_STATUS_START_INFO0_MEDIUM_PROT_TYPE);
2285 break;
2286 }
2287
2288 case HAL_TX_FES_STATUS_PROT: {
2289 const struct hal_tx_fes_status_prot *tx_fes_status = tlv_data;
2290 u32 start_timestamp;
2291 u32 end_timestamp;
2292
2293 info[0] = __le32_to_cpu(tx_fes_status->info0);
2294 info[1] = __le32_to_cpu(tx_fes_status->info1);
2295
2296 start_timestamp =
2297 u32_get_bits(info[0],
2298 HAL_TX_FES_STAT_PROT_INFO0_STRT_FRM_TS_15_0);
2299 start_timestamp |=
2300 u32_get_bits(info[0],
2301 HAL_TX_FES_STAT_PROT_INFO0_STRT_FRM_TS_31_16) << 15;
2302 end_timestamp =
2303 u32_get_bits(info[1],
2304 HAL_TX_FES_STAT_PROT_INFO1_END_FRM_TS_15_0);
2305 end_timestamp |=
2306 u32_get_bits(info[1],
2307 HAL_TX_FES_STAT_PROT_INFO1_END_FRM_TS_31_16) << 15;
2308 tx_ppdu_info->rx_status.rx_duration = end_timestamp - start_timestamp;
2309
2310 ath12k_wifi7_dp_mon_tx_gen_prot_frame(tx_ppdu_info);
2311 break;
2312 }
2313
2314 case HAL_TX_FES_STATUS_START_PPDU:
2315 case HAL_TX_FES_STATUS_START_PROT: {
2316 const struct hal_tx_fes_status_start_prot *tx_fes_stat_start = tlv_data;
2317 u64 ppdu_ts;
2318
2319 info[0] = __le32_to_cpu(tx_fes_stat_start->info0);
2320
2321 tx_ppdu_info->rx_status.ppdu_ts =
2322 u32_get_bits(info[0],
2323 HAL_TX_FES_STAT_STRT_INFO0_PROT_TS_LOWER_32);
2324 ppdu_ts = (u32_get_bits(info[1],
2325 HAL_TX_FES_STAT_STRT_INFO1_PROT_TS_UPPER_32));
2326 tx_ppdu_info->rx_status.ppdu_ts |= ppdu_ts << 32;
2327 break;
2328 }
2329
2330 case HAL_TX_FES_STATUS_USER_PPDU: {
2331 const struct hal_tx_fes_status_user_ppdu *tx_fes_usr_ppdu = tlv_data;
2332
2333 info[0] = __le32_to_cpu(tx_fes_usr_ppdu->info0);
2334
2335 tx_ppdu_info->rx_status.rx_duration =
2336 u32_get_bits(info[0],
2337 HAL_TX_FES_STAT_USR_PPDU_INFO0_DURATION);
2338 break;
2339 }
2340
2341 case HAL_MACTX_HE_SIG_A_SU:
2342 ath12k_wifi7_dp_mon_parse_he_sig_su(tlv_data,
2343 &tx_ppdu_info->rx_status);
2344 break;
2345
2346 case HAL_MACTX_HE_SIG_A_MU_DL:
2347 ath12k_wifi7_dp_mon_parse_he_sig_mu(tlv_data, &tx_ppdu_info->rx_status);
2348 break;
2349
2350 case HAL_MACTX_HE_SIG_B1_MU:
2351 ath12k_wifi7_dp_mon_parse_he_sig_b1_mu(tlv_data,
2352 &tx_ppdu_info->rx_status);
2353 break;
2354
2355 case HAL_MACTX_HE_SIG_B2_MU:
2356 ath12k_wifi7_dp_mon_parse_he_sig_b2_mu(tlv_data,
2357 &tx_ppdu_info->rx_status);
2358 break;
2359
2360 case HAL_MACTX_HE_SIG_B2_OFDMA:
2361 ath12k_wifi7_dp_mon_parse_he_sig_b2_ofdma(tlv_data,
2362 &tx_ppdu_info->rx_status);
2363 break;
2364
2365 case HAL_MACTX_VHT_SIG_A:
2366 ath12k_wifi7_dp_mon_parse_vht_sig_a(tlv_data, &tx_ppdu_info->rx_status);
2367 break;
2368
2369 case HAL_MACTX_L_SIG_A:
2370 ath12k_wifi7_dp_mon_parse_l_sig_a(tlv_data, &tx_ppdu_info->rx_status);
2371 break;
2372
2373 case HAL_MACTX_L_SIG_B:
2374 ath12k_wifi7_dp_mon_parse_l_sig_b(tlv_data, &tx_ppdu_info->rx_status);
2375 break;
2376
2377 case HAL_RX_FRAME_BITMAP_ACK: {
2378 const struct hal_rx_frame_bitmap_ack *fbm_ack = tlv_data;
2379 u32 addr_32;
2380 u16 addr_16;
2381
2382 info[0] = __le32_to_cpu(fbm_ack->info0);
2383 info[1] = __le32_to_cpu(fbm_ack->info1);
2384
2385 addr_32 = u32_get_bits(info[0],
2386 HAL_RX_FBM_ACK_INFO0_ADDR1_31_0);
2387 addr_16 = u32_get_bits(info[1],
2388 HAL_RX_FBM_ACK_INFO1_ADDR1_47_32);
2389 ath12k_dp_get_mac_addr(addr_32, addr_16, tx_ppdu_info->rx_status.addr1);
2390
2391 ath12k_wifi7_dp_mon_tx_gen_ack_frame(tx_ppdu_info);
2392 break;
2393 }
2394
2395 case HAL_MACTX_PHY_DESC: {
2396 const struct hal_tx_phy_desc *tx_phy_desc = tlv_data;
2397
2398 info[0] = __le32_to_cpu(tx_phy_desc->info0);
2399 info[1] = __le32_to_cpu(tx_phy_desc->info1);
2400 info[2] = __le32_to_cpu(tx_phy_desc->info2);
2401 info[3] = __le32_to_cpu(tx_phy_desc->info3);
2402
2403 tx_ppdu_info->rx_status.beamformed =
2404 u32_get_bits(info[0],
2405 HAL_TX_PHY_DESC_INFO0_BF_TYPE);
2406 tx_ppdu_info->rx_status.preamble_type =
2407 u32_get_bits(info[0],
2408 HAL_TX_PHY_DESC_INFO0_PREAMBLE_11B);
2409 tx_ppdu_info->rx_status.mcs =
2410 u32_get_bits(info[1],
2411 HAL_TX_PHY_DESC_INFO1_MCS);
2412 tx_ppdu_info->rx_status.ltf_size =
2413 u32_get_bits(info[3],
2414 HAL_TX_PHY_DESC_INFO3_LTF_SIZE);
2415 tx_ppdu_info->rx_status.nss =
2416 u32_get_bits(info[2],
2417 HAL_TX_PHY_DESC_INFO2_NSS);
2418 tx_ppdu_info->rx_status.chan_num =
2419 u32_get_bits(info[3],
2420 HAL_TX_PHY_DESC_INFO3_ACTIVE_CHANNEL);
2421 tx_ppdu_info->rx_status.bw =
2422 u32_get_bits(info[0],
2423 HAL_TX_PHY_DESC_INFO0_BANDWIDTH);
2424 break;
2425 }
2426
2427 case HAL_TX_MPDU_START: {
2428 struct dp_mon_mpdu *mon_mpdu = tx_ppdu_info->tx_mon_mpdu;
2429
2430 mon_mpdu = kzalloc_obj(*mon_mpdu, GFP_ATOMIC);
2431 if (!mon_mpdu)
2432 return DP_MON_TX_STATUS_PPDU_NOT_DONE;
2433 status = DP_MON_TX_MPDU_START;
2434 break;
2435 }
2436
2437 case HAL_TX_MPDU_END:
2438 list_add_tail(&tx_ppdu_info->tx_mon_mpdu->list,
2439 &tx_ppdu_info->dp_tx_mon_mpdu_list);
2440 break;
2441 }
2442
2443 return status;
2444 }
2445
2446 static enum dp_mon_tx_tlv_status
ath12k_wifi7_dp_mon_tx_status_get_num_user(u16 tlv_tag,struct hal_tlv_hdr * tx_tlv,u8 * num_users)2447 ath12k_wifi7_dp_mon_tx_status_get_num_user(u16 tlv_tag,
2448 struct hal_tlv_hdr *tx_tlv,
2449 u8 *num_users)
2450 {
2451 u32 tlv_status = DP_MON_TX_STATUS_PPDU_NOT_DONE;
2452 u32 info0;
2453
2454 switch (tlv_tag) {
2455 case HAL_TX_FES_SETUP: {
2456 struct hal_tx_fes_setup *tx_fes_setup =
2457 (struct hal_tx_fes_setup *)tx_tlv;
2458
2459 info0 = __le32_to_cpu(tx_fes_setup->info0);
2460
2461 *num_users = u32_get_bits(info0, HAL_TX_FES_SETUP_INFO0_NUM_OF_USERS);
2462 tlv_status = DP_MON_TX_FES_SETUP;
2463 break;
2464 }
2465
2466 case HAL_RX_RESPONSE_REQUIRED_INFO: {
2467 /* TODO: need to update *num_users */
2468 tlv_status = DP_MON_RX_RESPONSE_REQUIRED_INFO;
2469 break;
2470 }
2471 }
2472
2473 return tlv_status;
2474 }
2475
2476 static int
ath12k_wifi7_dp_mon_rx_deliver(struct ath12k_pdev_dp * dp_pdev,struct dp_mon_mpdu * mon_mpdu,struct hal_rx_mon_ppdu_info * ppduinfo,struct napi_struct * napi)2477 ath12k_wifi7_dp_mon_rx_deliver(struct ath12k_pdev_dp *dp_pdev,
2478 struct dp_mon_mpdu *mon_mpdu,
2479 struct hal_rx_mon_ppdu_info *ppduinfo,
2480 struct napi_struct *napi)
2481 {
2482 struct sk_buff *mon_skb, *skb_next, *header;
2483 struct ieee80211_rx_status *rxs = &dp_pdev->rx_status;
2484
2485 mon_skb = ath12k_dp_mon_rx_merg_msdus(dp_pdev, mon_mpdu, ppduinfo, rxs);
2486 if (!mon_skb)
2487 goto mon_deliver_fail;
2488
2489 header = mon_skb;
2490 rxs->flag = 0;
2491
2492 if (mon_mpdu->err_bitmap & HAL_RX_MPDU_ERR_FCS)
2493 rxs->flag = RX_FLAG_FAILED_FCS_CRC;
2494
2495 do {
2496 skb_next = mon_skb->next;
2497 if (!skb_next)
2498 rxs->flag &= ~RX_FLAG_AMSDU_MORE;
2499 else
2500 rxs->flag |= RX_FLAG_AMSDU_MORE;
2501
2502 if (mon_skb == header) {
2503 header = NULL;
2504 rxs->flag &= ~RX_FLAG_ALLOW_SAME_PN;
2505 } else {
2506 rxs->flag |= RX_FLAG_ALLOW_SAME_PN;
2507 }
2508 rxs->flag |= RX_FLAG_ONLY_MONITOR;
2509
2510 ath12k_dp_mon_update_radiotap(dp_pdev, ppduinfo, mon_skb, rxs);
2511 ath12k_dp_mon_rx_deliver_msdu(dp_pdev, napi, mon_skb, rxs);
2512 mon_skb = skb_next;
2513 } while (mon_skb);
2514 rxs->flag = 0;
2515
2516 return 0;
2517
2518 mon_deliver_fail:
2519 mon_skb = mon_mpdu->head;
2520 while (mon_skb) {
2521 skb_next = mon_skb->next;
2522 dev_kfree_skb_any(mon_skb);
2523 mon_skb = skb_next;
2524 }
2525 return -EINVAL;
2526 }
2527
2528 static void
ath12k_wifi7_dp_mon_tx_process_ppdu_info(struct ath12k_pdev_dp * dp_pdev,struct napi_struct * napi,struct dp_mon_tx_ppdu_info * tx_ppdu_info)2529 ath12k_wifi7_dp_mon_tx_process_ppdu_info(struct ath12k_pdev_dp *dp_pdev,
2530 struct napi_struct *napi,
2531 struct dp_mon_tx_ppdu_info *tx_ppdu_info)
2532 {
2533 struct dp_mon_mpdu *tmp, *mon_mpdu;
2534
2535 list_for_each_entry_safe(mon_mpdu, tmp,
2536 &tx_ppdu_info->dp_tx_mon_mpdu_list, list) {
2537 list_del(&mon_mpdu->list);
2538
2539 if (mon_mpdu->head)
2540 ath12k_wifi7_dp_mon_rx_deliver(dp_pdev, mon_mpdu,
2541 &tx_ppdu_info->rx_status, napi);
2542
2543 kfree(mon_mpdu);
2544 }
2545 }
2546
2547 enum hal_rx_mon_status
ath12k_wifi7_dp_mon_tx_parse_mon_status(struct ath12k_pdev_dp * dp_pdev,struct ath12k_mon_data * pmon,struct sk_buff * skb,struct napi_struct * napi,u32 ppdu_id)2548 ath12k_wifi7_dp_mon_tx_parse_mon_status(struct ath12k_pdev_dp *dp_pdev,
2549 struct ath12k_mon_data *pmon,
2550 struct sk_buff *skb,
2551 struct napi_struct *napi,
2552 u32 ppdu_id)
2553 {
2554 struct ath12k_dp *dp = dp_pdev->dp;
2555 struct ath12k_base *ab = dp->ab;
2556 struct dp_mon_tx_ppdu_info *tx_prot_ppdu_info, *tx_data_ppdu_info;
2557 struct hal_tlv_hdr *tlv;
2558 u8 *ptr = skb->data;
2559 u16 tlv_tag;
2560 u16 tlv_len;
2561 u32 tlv_userid = 0;
2562 u8 num_user;
2563 u32 tlv_status = DP_MON_TX_STATUS_PPDU_NOT_DONE;
2564
2565 tx_prot_ppdu_info =
2566 ath12k_wifi7_dp_mon_tx_get_ppdu_info(pmon, ppdu_id,
2567 DP_MON_TX_PROT_PPDU_INFO);
2568 if (!tx_prot_ppdu_info)
2569 return -ENOMEM;
2570
2571 tlv = (struct hal_tlv_hdr *)ptr;
2572 tlv_tag = le32_get_bits(tlv->tl, HAL_TLV_HDR_TAG);
2573
2574 tlv_status = ath12k_wifi7_dp_mon_tx_status_get_num_user(tlv_tag, tlv,
2575 &num_user);
2576 if (tlv_status == DP_MON_TX_STATUS_PPDU_NOT_DONE || !num_user)
2577 return -EINVAL;
2578
2579 tx_data_ppdu_info =
2580 ath12k_wifi7_dp_mon_tx_get_ppdu_info(pmon, ppdu_id,
2581 DP_MON_TX_DATA_PPDU_INFO);
2582 if (!tx_data_ppdu_info)
2583 return -ENOMEM;
2584
2585 do {
2586 tlv = (struct hal_tlv_hdr *)ptr;
2587 tlv_tag = le32_get_bits(tlv->tl, HAL_TLV_HDR_TAG);
2588 tlv_len = le32_get_bits(tlv->tl, HAL_TLV_HDR_LEN);
2589 tlv_userid = le32_get_bits(tlv->tl, HAL_TLV_USR_ID);
2590
2591 tlv_status = ath12k_wifi7_dp_mon_tx_parse_status_tlv(ab, pmon,
2592 tlv_tag, ptr,
2593 tlv_userid);
2594 ptr += tlv_len;
2595 ptr = PTR_ALIGN(ptr, HAL_TLV_ALIGN);
2596 if ((ptr - skb->data) >= DP_TX_MONITOR_BUF_SIZE)
2597 break;
2598 } while (tlv_status != DP_MON_TX_FES_STATUS_END);
2599
2600 ath12k_wifi7_dp_mon_tx_process_ppdu_info(dp_pdev, napi, tx_data_ppdu_info);
2601 ath12k_wifi7_dp_mon_tx_process_ppdu_info(dp_pdev, napi, tx_prot_ppdu_info);
2602
2603 return tlv_status;
2604 }
2605
2606 static void
ath12k_wifi7_dp_mon_next_link_desc_get(struct ath12k_base * ab,struct hal_rx_msdu_link * msdu_link,dma_addr_t * paddr,u32 * sw_cookie,u8 * rbm,struct ath12k_buffer_addr ** pp_buf_addr_info)2607 ath12k_wifi7_dp_mon_next_link_desc_get(struct ath12k_base *ab,
2608 struct hal_rx_msdu_link *msdu_link,
2609 dma_addr_t *paddr, u32 *sw_cookie, u8 *rbm,
2610 struct ath12k_buffer_addr **pp_buf_addr_info)
2611 {
2612 struct ath12k_buffer_addr *buf_addr_info;
2613
2614 buf_addr_info = &msdu_link->buf_addr_info;
2615
2616 ath12k_wifi7_hal_rx_buf_addr_info_get(buf_addr_info, paddr, sw_cookie, rbm);
2617
2618 *pp_buf_addr_info = buf_addr_info;
2619 }
2620
2621 static u32
ath12k_wifi7_dp_rx_mon_mpdu_pop(struct ath12k * ar,int mac_id,void * ring_entry,struct sk_buff ** head_msdu,struct sk_buff ** tail_msdu,struct list_head * used_list,u32 * npackets,u32 * ppdu_id)2622 ath12k_wifi7_dp_rx_mon_mpdu_pop(struct ath12k *ar, int mac_id,
2623 void *ring_entry, struct sk_buff **head_msdu,
2624 struct sk_buff **tail_msdu,
2625 struct list_head *used_list,
2626 u32 *npackets, u32 *ppdu_id)
2627 {
2628 struct ath12k_mon_data *pmon = (struct ath12k_mon_data *)&ar->dp.mon_data;
2629 struct ath12k_base *ab = ar->ab;
2630 struct ath12k_dp *dp = ath12k_ab_to_dp(ab);
2631 struct ath12k_buffer_addr *p_buf_addr_info, *p_last_buf_addr_info;
2632 u32 msdu_ppdu_id = 0, msdu_cnt = 0, total_len = 0, frag_len = 0;
2633 u32 rx_buf_size, rx_pkt_offset, sw_cookie;
2634 bool is_frag, is_first_msdu, drop_mpdu = false;
2635 struct hal_reo_entrance_ring *ent_desc =
2636 (struct hal_reo_entrance_ring *)ring_entry;
2637 u32 rx_bufs_used = 0, i = 0, desc_bank = 0;
2638 struct hal_rx_desc *rx_desc, *tail_rx_desc;
2639 struct hal_rx_msdu_link *msdu_link_desc;
2640 struct sk_buff *msdu = NULL, *last = NULL;
2641 struct ath12k_rx_desc_info *desc_info;
2642 struct ath12k_buffer_addr buf_info;
2643 struct hal_rx_msdu_list msdu_list;
2644 struct ath12k_skb_rxcb *rxcb;
2645 u16 num_msdus = 0;
2646 dma_addr_t paddr;
2647 u8 rbm;
2648
2649 ath12k_wifi7_hal_rx_reo_ent_buf_paddr_get(ring_entry, &paddr,
2650 &sw_cookie,
2651 &p_last_buf_addr_info,
2652 &rbm,
2653 &msdu_cnt);
2654
2655 spin_lock_bh(&pmon->mon_lock);
2656
2657 if (le32_get_bits(ent_desc->info1,
2658 HAL_REO_ENTR_RING_INFO1_RXDMA_PUSH_REASON) ==
2659 HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {
2660 u8 rxdma_err = le32_get_bits(ent_desc->info1,
2661 HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE);
2662 if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||
2663 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||
2664 rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {
2665 drop_mpdu = true;
2666 pmon->rx_mon_stats.dest_mpdu_drop++;
2667 }
2668 }
2669
2670 is_frag = false;
2671 is_first_msdu = true;
2672 rx_pkt_offset = sizeof(struct hal_rx_desc);
2673
2674 do {
2675 if (pmon->mon_last_linkdesc_paddr == paddr) {
2676 pmon->rx_mon_stats.dup_mon_linkdesc_cnt++;
2677 spin_unlock_bh(&pmon->mon_lock);
2678 return rx_bufs_used;
2679 }
2680
2681 desc_bank = u32_get_bits(sw_cookie, DP_LINK_DESC_BANK_MASK);
2682 msdu_link_desc =
2683 dp->link_desc_banks[desc_bank].vaddr +
2684 (paddr - dp->link_desc_banks[desc_bank].paddr);
2685
2686 ath12k_wifi7_hal_rx_msdu_list_get(ar, msdu_link_desc, &msdu_list,
2687 &num_msdus);
2688 desc_info = ath12k_dp_get_rx_desc(ar->ab->dp,
2689 msdu_list.sw_cookie[num_msdus - 1]);
2690 tail_rx_desc = (struct hal_rx_desc *)(desc_info->skb)->data;
2691
2692 for (i = 0; i < num_msdus; i++) {
2693 u32 l2_hdr_offset;
2694
2695 if (pmon->mon_last_buf_cookie == msdu_list.sw_cookie[i]) {
2696 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2697 "i %d last_cookie %d is same\n",
2698 i, pmon->mon_last_buf_cookie);
2699 drop_mpdu = true;
2700 pmon->rx_mon_stats.dup_mon_buf_cnt++;
2701 continue;
2702 }
2703
2704 desc_info =
2705 ath12k_dp_get_rx_desc(ar->ab->dp, msdu_list.sw_cookie[i]);
2706 msdu = desc_info->skb;
2707
2708 if (!msdu) {
2709 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2710 "msdu_pop: invalid msdu (%d/%d)\n",
2711 i + 1, num_msdus);
2712 goto next_msdu;
2713 }
2714 rxcb = ATH12K_SKB_RXCB(msdu);
2715 if (rxcb->paddr != msdu_list.paddr[i]) {
2716 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2717 "i %d paddr %lx != %lx\n",
2718 i, (unsigned long)rxcb->paddr,
2719 (unsigned long)msdu_list.paddr[i]);
2720 drop_mpdu = true;
2721 continue;
2722 }
2723 if (!rxcb->unmapped) {
2724 dma_unmap_single(ar->ab->dev, rxcb->paddr,
2725 msdu->len +
2726 skb_tailroom(msdu),
2727 DMA_FROM_DEVICE);
2728 rxcb->unmapped = 1;
2729 }
2730 if (drop_mpdu) {
2731 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2732 "i %d drop msdu %p *ppdu_id %x\n",
2733 i, msdu, *ppdu_id);
2734 dev_kfree_skb_any(msdu);
2735 msdu = NULL;
2736 goto next_msdu;
2737 }
2738
2739 rx_desc = (struct hal_rx_desc *)msdu->data;
2740 l2_hdr_offset = ath12k_dp_rx_h_l3pad(ar->ab, tail_rx_desc);
2741 if (is_first_msdu) {
2742 if (!ath12k_wifi7_dp_rxdesc_mpdu_valid(ar->ab,
2743 rx_desc)) {
2744 drop_mpdu = true;
2745 dev_kfree_skb_any(msdu);
2746 msdu = NULL;
2747 pmon->mon_last_linkdesc_paddr = paddr;
2748 goto next_msdu;
2749 }
2750 msdu_ppdu_id =
2751 ath12k_dp_rxdesc_get_ppduid(ar->ab, rx_desc);
2752
2753 if (ath12k_dp_mon_comp_ppduid(msdu_ppdu_id,
2754 ppdu_id)) {
2755 spin_unlock_bh(&pmon->mon_lock);
2756 return rx_bufs_used;
2757 }
2758 pmon->mon_last_linkdesc_paddr = paddr;
2759 is_first_msdu = false;
2760 }
2761 ath12k_wifi7_dp_mon_get_buf_len(&msdu_list.msdu_info[i],
2762 &is_frag, &total_len,
2763 &frag_len, &msdu_cnt);
2764 rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;
2765
2766 if (ath12k_dp_pkt_set_pktlen(msdu, rx_buf_size)) {
2767 dev_kfree_skb_any(msdu);
2768 goto next_msdu;
2769 }
2770
2771 if (!(*head_msdu))
2772 *head_msdu = msdu;
2773 else if (last)
2774 last->next = msdu;
2775
2776 last = msdu;
2777 next_msdu:
2778 pmon->mon_last_buf_cookie = msdu_list.sw_cookie[i];
2779 rx_bufs_used++;
2780 desc_info->skb = NULL;
2781 list_add_tail(&desc_info->list, used_list);
2782 }
2783
2784 ath12k_wifi7_hal_rx_buf_addr_info_set(&buf_info, paddr,
2785 sw_cookie, rbm);
2786
2787 ath12k_wifi7_dp_mon_next_link_desc_get(ab,
2788 msdu_link_desc, &paddr,
2789 &sw_cookie, &rbm,
2790 &p_buf_addr_info);
2791
2792 ath12k_dp_arch_rx_link_desc_return(ar->ab->dp, &buf_info,
2793 HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);
2794
2795 p_last_buf_addr_info = p_buf_addr_info;
2796
2797 } while (paddr && msdu_cnt);
2798
2799 spin_unlock_bh(&pmon->mon_lock);
2800
2801 if (last)
2802 last->next = NULL;
2803
2804 *tail_msdu = msdu;
2805
2806 if (msdu_cnt == 0)
2807 *npackets = 1;
2808
2809 return rx_bufs_used;
2810 }
2811
2812 /* The destination ring processing is stuck if the destination is not
2813 * moving while status ring moves 16 PPDU. The destination ring processing
2814 * skips this destination ring PPDU as a workaround.
2815 */
2816 #define MON_DEST_RING_STUCK_MAX_CNT 16
2817
2818 static void
ath12k_wifi7_dp_rx_mon_dest_process(struct ath12k * ar,int mac_id,u32 quota,struct napi_struct * napi)2819 ath12k_wifi7_dp_rx_mon_dest_process(struct ath12k *ar, int mac_id,
2820 u32 quota, struct napi_struct *napi)
2821 {
2822 struct ath12k_mon_data *pmon = (struct ath12k_mon_data *)&ar->dp.mon_data;
2823 struct ath12k_pdev_mon_stats *rx_mon_stats;
2824 u32 ppdu_id, rx_bufs_used = 0, ring_id;
2825 u32 mpdu_rx_bufs_used, npackets = 0;
2826 struct ath12k_base *ab = ar->ab;
2827 struct ath12k_dp *dp = ath12k_ab_to_dp(ab);
2828 void *ring_entry, *mon_dst_srng;
2829 struct dp_mon_mpdu *tmp_mpdu;
2830 LIST_HEAD(rx_desc_used_list);
2831 struct hal_srng *srng;
2832
2833 ring_id = dp->rxdma_err_dst_ring[mac_id].ring_id;
2834 srng = &ab->hal.srng_list[ring_id];
2835
2836 mon_dst_srng = &ab->hal.srng_list[ring_id];
2837
2838 spin_lock_bh(&srng->lock);
2839
2840 ath12k_hal_srng_access_begin(ab, mon_dst_srng);
2841
2842 ppdu_id = pmon->mon_ppdu_info.ppdu_id;
2843 rx_mon_stats = &pmon->rx_mon_stats;
2844
2845 while ((ring_entry = ath12k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {
2846 struct sk_buff *head_msdu, *tail_msdu;
2847
2848 head_msdu = NULL;
2849 tail_msdu = NULL;
2850
2851 mpdu_rx_bufs_used = ath12k_wifi7_dp_rx_mon_mpdu_pop(ar, mac_id,
2852 ring_entry,
2853 &head_msdu,
2854 &tail_msdu,
2855 &rx_desc_used_list,
2856 &npackets,
2857 &ppdu_id);
2858
2859 rx_bufs_used += mpdu_rx_bufs_used;
2860
2861 if (mpdu_rx_bufs_used) {
2862 dp->mon_dest_ring_stuck_cnt = 0;
2863 } else {
2864 dp->mon_dest_ring_stuck_cnt++;
2865 rx_mon_stats->dest_mon_not_reaped++;
2866 }
2867
2868 if (dp->mon_dest_ring_stuck_cnt > MON_DEST_RING_STUCK_MAX_CNT) {
2869 rx_mon_stats->dest_mon_stuck++;
2870 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2871 "status ring ppdu_id=%d dest ring ppdu_id=%d mon_dest_ring_stuck_cnt=%d dest_mon_not_reaped=%u dest_mon_stuck=%u\n",
2872 pmon->mon_ppdu_info.ppdu_id, ppdu_id,
2873 dp->mon_dest_ring_stuck_cnt,
2874 rx_mon_stats->dest_mon_not_reaped,
2875 rx_mon_stats->dest_mon_stuck);
2876 spin_lock_bh(&pmon->mon_lock);
2877 pmon->mon_ppdu_info.ppdu_id = ppdu_id;
2878 spin_unlock_bh(&pmon->mon_lock);
2879 continue;
2880 }
2881
2882 if (ppdu_id != pmon->mon_ppdu_info.ppdu_id) {
2883 spin_lock_bh(&pmon->mon_lock);
2884 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
2885 spin_unlock_bh(&pmon->mon_lock);
2886 ath12k_dbg(ar->ab, ATH12K_DBG_DATA,
2887 "dest_rx: new ppdu_id %x != status ppdu_id %x dest_mon_not_reaped = %u dest_mon_stuck = %u\n",
2888 ppdu_id, pmon->mon_ppdu_info.ppdu_id,
2889 rx_mon_stats->dest_mon_not_reaped,
2890 rx_mon_stats->dest_mon_stuck);
2891 break;
2892 }
2893
2894 if (head_msdu && tail_msdu) {
2895 tmp_mpdu = kzalloc_obj(*tmp_mpdu, GFP_ATOMIC);
2896 if (!tmp_mpdu)
2897 break;
2898
2899 tmp_mpdu->head = head_msdu;
2900 tmp_mpdu->tail = tail_msdu;
2901 tmp_mpdu->err_bitmap = pmon->err_bitmap;
2902 tmp_mpdu->decap_format = pmon->decap_format;
2903 ath12k_wifi7_dp_mon_rx_deliver(&ar->dp, tmp_mpdu,
2904 &pmon->mon_ppdu_info, napi);
2905 rx_mon_stats->dest_mpdu_done++;
2906 kfree(tmp_mpdu);
2907 }
2908
2909 ring_entry = ath12k_hal_srng_dst_get_next_entry(ar->ab,
2910 mon_dst_srng);
2911 }
2912 ath12k_hal_srng_access_end(ar->ab, mon_dst_srng);
2913
2914 spin_unlock_bh(&srng->lock);
2915
2916 if (rx_bufs_used) {
2917 rx_mon_stats->dest_ppdu_done++;
2918 ath12k_dp_rx_bufs_replenish(ar->ab->dp,
2919 &dp->rx_refill_buf_ring,
2920 &rx_desc_used_list,
2921 rx_bufs_used);
2922 }
2923 }
2924
2925 static enum dp_mon_status_buf_state
ath12k_wifi7_dp_rx_mon_buf_done(struct ath12k_base * ab,struct hal_srng * srng,struct dp_rxdma_mon_ring * rx_ring)2926 ath12k_wifi7_dp_rx_mon_buf_done(struct ath12k_base *ab, struct hal_srng *srng,
2927 struct dp_rxdma_mon_ring *rx_ring)
2928 {
2929 struct ath12k_hal *hal = &ab->hal;
2930 struct ath12k_skb_rxcb *rxcb;
2931 struct sk_buff *skb;
2932 void *status_desc;
2933 dma_addr_t paddr;
2934 u16 tlv_tag;
2935 u32 cookie;
2936 int buf_id;
2937 u8 rbm;
2938
2939 status_desc = ath12k_hal_srng_src_next_peek(ab, srng);
2940 if (!status_desc)
2941 return DP_MON_STATUS_NO_DMA;
2942
2943 ath12k_wifi7_hal_rx_buf_addr_info_get(status_desc, &paddr, &cookie, &rbm);
2944
2945 buf_id = u32_get_bits(cookie, DP_RXDMA_BUF_COOKIE_BUF_ID);
2946
2947 spin_lock_bh(&rx_ring->idr_lock);
2948 skb = idr_find(&rx_ring->bufs_idr, buf_id);
2949 spin_unlock_bh(&rx_ring->idr_lock);
2950
2951 if (!skb)
2952 return DP_MON_STATUS_NO_DMA;
2953
2954 rxcb = ATH12K_SKB_RXCB(skb);
2955 dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
2956 skb->len + skb_tailroom(skb),
2957 DMA_FROM_DEVICE);
2958
2959 hal->ops->mon_rx_status_dec_tlv_hdr(skb->data, &tlv_tag, NULL, NULL);
2960 if (tlv_tag != HAL_RX_STATUS_BUFFER_DONE)
2961 return DP_MON_STATUS_NO_DMA;
2962
2963 return DP_MON_STATUS_REPLINISH;
2964 }
2965
2966 static enum hal_rx_mon_status
ath12k_wifi7_dp_mon_parse_rx_dest(struct ath12k_pdev_dp * dp_pdev,struct ath12k_mon_data * pmon,struct sk_buff * skb)2967 ath12k_wifi7_dp_mon_parse_rx_dest(struct ath12k_pdev_dp *dp_pdev,
2968 struct ath12k_mon_data *pmon,
2969 struct sk_buff *skb)
2970 {
2971 struct ath12k *ar = ath12k_pdev_dp_to_ar(dp_pdev);
2972 struct ath12k_hal *hal = &ar->ab->hal;
2973 u8 *tlv_value, *tlv = skb->data;
2974 struct ath12k_skb_rxcb *rxcb;
2975 enum hal_rx_mon_status hal_status;
2976 u16 tlv_tag, tlv_len;
2977 u32 tlv_hdr_len;
2978
2979 tlv_hdr_len = hal->ops->get_tlv_hdr_align();
2980
2981 do {
2982 tlv_value = hal->ops->mon_rx_status_dec_tlv_hdr(tlv, &tlv_tag,
2983 &tlv_len, NULL);
2984
2985 /* The actual length of PPDU_END is the combined length of many PHY
2986 * TLVs that follow. Skip the TLV header and
2987 * rx_rxpcu_classification_overview that follows the header to get to
2988 * next TLV.
2989 */
2990 if (tlv_tag == HAL_RX_PPDU_END)
2991 tlv_len = sizeof(struct hal_rx_rxpcu_classification_overview);
2992
2993 hal_status = ath12k_wifi7_dp_mon_rx_parse_status_tlv(dp_pdev, pmon,
2994 tlv);
2995
2996 if (ar->monitor_started && ar->ab->hw_params->rxdma1_enable &&
2997 ath12k_wifi7_dp_mon_parse_rx_dest_tlv(dp_pdev, pmon, hal_status,
2998 tlv_value))
2999 return HAL_RX_MON_STATUS_PPDU_DONE;
3000
3001 tlv = PTR_ALIGN(tlv + tlv_len + tlv_hdr_len, tlv_hdr_len);
3002
3003 if (unlikely(tlv - skb->data > skb->len ||
3004 skb->len - (tlv - skb->data) < tlv_hdr_len))
3005 break;
3006 } while ((hal_status == HAL_RX_MON_STATUS_PPDU_NOT_DONE) ||
3007 (hal_status == HAL_RX_MON_STATUS_BUF_ADDR) ||
3008 (hal_status == HAL_RX_MON_STATUS_MPDU_START) ||
3009 (hal_status == HAL_RX_MON_STATUS_MPDU_END) ||
3010 (hal_status == HAL_RX_MON_STATUS_MSDU_END));
3011
3012 rxcb = ATH12K_SKB_RXCB(skb);
3013 if (rxcb->is_end_of_ppdu)
3014 hal_status = HAL_RX_MON_STATUS_PPDU_DONE;
3015
3016 return hal_status;
3017 }
3018
3019 static enum hal_rx_mon_status
ath12k_wifi7_dp_mon_rx_parse_mon_status(struct ath12k_pdev_dp * dp_pdev,struct ath12k_mon_data * pmon,struct sk_buff * skb,struct napi_struct * napi)3020 ath12k_wifi7_dp_mon_rx_parse_mon_status(struct ath12k_pdev_dp *dp_pdev,
3021 struct ath12k_mon_data *pmon,
3022 struct sk_buff *skb,
3023 struct napi_struct *napi)
3024 {
3025 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;
3026 struct dp_mon_mpdu *tmp;
3027 struct dp_mon_mpdu *mon_mpdu = pmon->mon_mpdu;
3028 enum hal_rx_mon_status hal_status;
3029
3030 hal_status = ath12k_wifi7_dp_mon_parse_rx_dest(dp_pdev, pmon, skb);
3031 if (hal_status != HAL_RX_MON_STATUS_PPDU_DONE)
3032 return hal_status;
3033
3034 list_for_each_entry_safe(mon_mpdu, tmp, &pmon->dp_rx_mon_mpdu_list, list) {
3035 list_del(&mon_mpdu->list);
3036
3037 if (mon_mpdu->head && mon_mpdu->tail)
3038 ath12k_wifi7_dp_mon_rx_deliver(dp_pdev, mon_mpdu,
3039 ppdu_info, napi);
3040
3041 kfree(mon_mpdu);
3042 }
3043
3044 return hal_status;
3045 }
3046
3047 static int
ath12k_wifi7_dp_rx_reap_mon_status_ring(struct ath12k_base * ab,int mac_id,int * budget,struct sk_buff_head * skb_list)3048 ath12k_wifi7_dp_rx_reap_mon_status_ring(struct ath12k_base *ab, int mac_id,
3049 int *budget, struct sk_buff_head *skb_list)
3050 {
3051 const struct ath12k_hw_hal_params *hal_params;
3052 int buf_id, srng_id, num_buffs_reaped = 0;
3053 enum dp_mon_status_buf_state reap_status;
3054 struct dp_rxdma_mon_ring *rx_ring;
3055 struct ath12k_hal *hal = &ab->hal;
3056 struct ath12k_mon_data *pmon;
3057 struct ath12k_skb_rxcb *rxcb;
3058 void *rx_mon_status_desc;
3059 struct hal_srng *srng;
3060 struct ath12k_dp *dp;
3061 struct sk_buff *skb;
3062 struct ath12k *ar;
3063 dma_addr_t paddr;
3064 u16 tlv_tag;
3065 u32 cookie;
3066 u8 rbm;
3067
3068 ar = ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar;
3069 dp = ath12k_ab_to_dp(ab);
3070 pmon = &ar->dp.mon_data;
3071 srng_id = ath12k_hw_mac_id_to_srng_id(ab->hw_params, mac_id);
3072 rx_ring = &dp->rx_mon_status_refill_ring[srng_id];
3073
3074 srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];
3075
3076 spin_lock_bh(&srng->lock);
3077
3078 ath12k_hal_srng_access_begin(ab, srng);
3079
3080 while (*budget) {
3081 *budget -= 1;
3082 rx_mon_status_desc = ath12k_hal_srng_src_peek(ab, srng);
3083 if (!rx_mon_status_desc) {
3084 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3085 break;
3086 }
3087 ath12k_wifi7_hal_rx_buf_addr_info_get(rx_mon_status_desc, &paddr,
3088 &cookie, &rbm);
3089 if (paddr) {
3090 buf_id = u32_get_bits(cookie, DP_RXDMA_BUF_COOKIE_BUF_ID);
3091
3092 spin_lock_bh(&rx_ring->idr_lock);
3093 skb = idr_find(&rx_ring->bufs_idr, buf_id);
3094 spin_unlock_bh(&rx_ring->idr_lock);
3095
3096 if (!skb) {
3097 ath12k_warn(ab, "rx monitor status with invalid buf_id %d\n",
3098 buf_id);
3099 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3100 goto move_next;
3101 }
3102
3103 rxcb = ATH12K_SKB_RXCB(skb);
3104
3105 dma_sync_single_for_cpu(ab->dev, rxcb->paddr,
3106 skb->len + skb_tailroom(skb),
3107 DMA_FROM_DEVICE);
3108
3109 hal->ops->mon_rx_status_dec_tlv_hdr(skb->data, &tlv_tag,
3110 NULL, NULL);
3111 if (tlv_tag != HAL_RX_STATUS_BUFFER_DONE) {
3112 pmon->buf_state = DP_MON_STATUS_NO_DMA;
3113 ath12k_warn(ab,
3114 "mon status DONE not set %x, buf_id %d\n",
3115 tlv_tag, buf_id);
3116 /* RxDMA status done bit might not be set even
3117 * though tp is moved by HW.
3118 */
3119
3120 /* If done status is missing:
3121 * 1. As per MAC team's suggestion,
3122 * when HP + 1 entry is peeked and if DMA
3123 * is not done and if HP + 2 entry's DMA done
3124 * is set. skip HP + 1 entry and
3125 * start processing in next interrupt.
3126 * 2. If HP + 2 entry's DMA done is not set,
3127 * poll onto HP + 1 entry DMA done to be set.
3128 * Check status for same buffer for next time
3129 * dp_rx_mon_status_srng_process
3130 */
3131 reap_status = ath12k_wifi7_dp_rx_mon_buf_done(ab, srng,
3132 rx_ring);
3133 if (reap_status == DP_MON_STATUS_NO_DMA)
3134 continue;
3135
3136 spin_lock_bh(&rx_ring->idr_lock);
3137 idr_remove(&rx_ring->bufs_idr, buf_id);
3138 spin_unlock_bh(&rx_ring->idr_lock);
3139
3140 dma_unmap_single(ab->dev, rxcb->paddr,
3141 skb->len + skb_tailroom(skb),
3142 DMA_FROM_DEVICE);
3143
3144 dev_kfree_skb_any(skb);
3145 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3146 goto move_next;
3147 }
3148
3149 spin_lock_bh(&rx_ring->idr_lock);
3150 idr_remove(&rx_ring->bufs_idr, buf_id);
3151 spin_unlock_bh(&rx_ring->idr_lock);
3152
3153 dma_unmap_single(ab->dev, rxcb->paddr,
3154 skb->len + skb_tailroom(skb),
3155 DMA_FROM_DEVICE);
3156
3157 if (ath12k_dp_pkt_set_pktlen(skb, RX_MON_STATUS_BUF_SIZE)) {
3158 dev_kfree_skb_any(skb);
3159 goto move_next;
3160 }
3161 __skb_queue_tail(skb_list, skb);
3162 } else {
3163 pmon->buf_state = DP_MON_STATUS_REPLINISH;
3164 }
3165 move_next:
3166 skb = ath12k_dp_rx_alloc_mon_status_buf(ab, rx_ring,
3167 &buf_id);
3168 hal_params = ab->hal.hal_params;
3169
3170 if (!skb) {
3171 ath12k_warn(ab, "failed to alloc buffer for status ring\n");
3172 ath12k_wifi7_hal_rx_buf_addr_info_set(rx_mon_status_desc,
3173 0, 0,
3174 hal_params->rx_buf_rbm);
3175 num_buffs_reaped++;
3176 break;
3177 }
3178 rxcb = ATH12K_SKB_RXCB(skb);
3179
3180 cookie = u32_encode_bits(mac_id, DP_RXDMA_BUF_COOKIE_PDEV_ID) |
3181 u32_encode_bits(buf_id, DP_RXDMA_BUF_COOKIE_BUF_ID);
3182
3183 ath12k_wifi7_hal_rx_buf_addr_info_set(rx_mon_status_desc, rxcb->paddr,
3184 cookie, hal_params->rx_buf_rbm);
3185 ath12k_hal_srng_src_get_next_entry(ab, srng);
3186 num_buffs_reaped++;
3187 }
3188 ath12k_hal_srng_access_end(ab, srng);
3189 spin_unlock_bh(&srng->lock);
3190
3191 return num_buffs_reaped;
3192 }
3193
3194 static int
__ath12k_wifi7_dp_mon_process_ring(struct ath12k * ar,int mac_id,struct napi_struct * napi,int * budget)3195 __ath12k_wifi7_dp_mon_process_ring(struct ath12k *ar, int mac_id,
3196 struct napi_struct *napi, int *budget)
3197 {
3198 struct ath12k_mon_data *pmon = (struct ath12k_mon_data *)&ar->dp.mon_data;
3199 struct ath12k_pdev_mon_stats *rx_mon_stats = &pmon->rx_mon_stats;
3200 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;
3201 enum hal_rx_mon_status hal_status;
3202 struct sk_buff_head skb_list;
3203 int num_buffs_reaped;
3204 struct sk_buff *skb;
3205
3206 __skb_queue_head_init(&skb_list);
3207
3208 num_buffs_reaped = ath12k_wifi7_dp_rx_reap_mon_status_ring(ar->ab, mac_id,
3209 budget, &skb_list);
3210 if (!num_buffs_reaped)
3211 goto exit;
3212
3213 while ((skb = __skb_dequeue(&skb_list))) {
3214 memset(ppdu_info, 0, sizeof(*ppdu_info));
3215 ppdu_info->peer_id = HAL_INVALID_PEERID;
3216
3217 hal_status = ath12k_wifi7_dp_mon_parse_rx_dest(&ar->dp, pmon, skb);
3218
3219 if (ar->monitor_started &&
3220 pmon->mon_ppdu_status == DP_PPDU_STATUS_START &&
3221 hal_status == HAL_TLV_STATUS_PPDU_DONE) {
3222 rx_mon_stats->status_ppdu_done++;
3223 pmon->mon_ppdu_status = DP_PPDU_STATUS_DONE;
3224 ath12k_wifi7_dp_rx_mon_dest_process(ar, mac_id, *budget, napi);
3225 pmon->mon_ppdu_status = DP_PPDU_STATUS_START;
3226 }
3227
3228 dev_kfree_skb_any(skb);
3229 }
3230
3231 exit:
3232 return num_buffs_reaped;
3233 }
3234
3235 static int
ath12k_wifi7_dp_mon_srng_process(struct ath12k_pdev_dp * pdev_dp,int * budget,struct napi_struct * napi)3236 ath12k_wifi7_dp_mon_srng_process(struct ath12k_pdev_dp *pdev_dp, int *budget,
3237 struct napi_struct *napi)
3238 {
3239 struct ath12k_dp *dp = pdev_dp->dp;
3240 struct ath12k_base *ab = dp->ab;
3241 struct ath12k_mon_data *pmon = (struct ath12k_mon_data *)&pdev_dp->mon_data;
3242 struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;
3243 struct hal_mon_dest_desc *mon_dst_desc;
3244 struct sk_buff *skb;
3245 struct ath12k_skb_rxcb *rxcb;
3246 struct dp_srng *mon_dst_ring;
3247 struct hal_srng *srng;
3248 struct dp_rxdma_mon_ring *buf_ring;
3249 struct ath12k_dp_link_peer *peer;
3250 struct sk_buff_head skb_list;
3251 u64 cookie;
3252 int num_buffs_reaped = 0, srng_id, buf_id;
3253 u32 hal_status, end_offset, info0, end_reason;
3254 u8 pdev_idx = ath12k_hw_mac_id_to_pdev_id(ab->hw_params, pdev_dp->mac_id);
3255
3256 __skb_queue_head_init(&skb_list);
3257 srng_id = ath12k_hw_mac_id_to_srng_id(ab->hw_params, pdev_idx);
3258 mon_dst_ring = &pdev_dp->rxdma_mon_dst_ring[srng_id];
3259 buf_ring = &dp->rxdma_mon_buf_ring;
3260
3261 srng = &ab->hal.srng_list[mon_dst_ring->ring_id];
3262 spin_lock_bh(&srng->lock);
3263 ath12k_hal_srng_access_begin(ab, srng);
3264
3265 while (likely(*budget)) {
3266 mon_dst_desc = ath12k_hal_srng_dst_peek(ab, srng);
3267 if (unlikely(!mon_dst_desc))
3268 break;
3269
3270 /* In case of empty descriptor, the cookie in the ring descriptor
3271 * is invalid. Therefore, this entry is skipped, and ring processing
3272 * continues.
3273 */
3274 info0 = le32_to_cpu(mon_dst_desc->info0);
3275 if (u32_get_bits(info0, HAL_MON_DEST_INFO0_EMPTY_DESC))
3276 goto move_next;
3277
3278 cookie = le32_to_cpu(mon_dst_desc->cookie);
3279 buf_id = u32_get_bits(cookie, DP_RXDMA_BUF_COOKIE_BUF_ID);
3280
3281 spin_lock_bh(&buf_ring->idr_lock);
3282 skb = idr_remove(&buf_ring->bufs_idr, buf_id);
3283 spin_unlock_bh(&buf_ring->idr_lock);
3284
3285 if (unlikely(!skb)) {
3286 ath12k_warn(ab, "monitor destination with invalid buf_id %d\n",
3287 buf_id);
3288 goto move_next;
3289 }
3290
3291 rxcb = ATH12K_SKB_RXCB(skb);
3292 dma_unmap_single(ab->dev, rxcb->paddr,
3293 skb->len + skb_tailroom(skb),
3294 DMA_FROM_DEVICE);
3295
3296 end_reason = u32_get_bits(info0, HAL_MON_DEST_INFO0_END_REASON);
3297
3298 /* HAL_MON_FLUSH_DETECTED implies that an rx flush received at the end of
3299 * rx PPDU and HAL_MON_PPDU_TRUNCATED implies that the PPDU got
3300 * truncated due to a system level error. In both the cases, buffer data
3301 * can be discarded
3302 */
3303 if ((end_reason == HAL_MON_FLUSH_DETECTED) ||
3304 (end_reason == HAL_MON_PPDU_TRUNCATED)) {
3305 ath12k_dbg(ab, ATH12K_DBG_DATA,
3306 "Monitor dest descriptor end reason %d", end_reason);
3307 dev_kfree_skb_any(skb);
3308 goto move_next;
3309 }
3310
3311 /* Calculate the budget when the ring descriptor with the
3312 * HAL_MON_END_OF_PPDU to ensure that one PPDU worth of data is always
3313 * reaped. This helps to efficiently utilize the NAPI budget.
3314 */
3315 if (end_reason == HAL_MON_END_OF_PPDU) {
3316 *budget -= 1;
3317 rxcb->is_end_of_ppdu = true;
3318 }
3319
3320 end_offset = u32_get_bits(info0, HAL_MON_DEST_INFO0_END_OFFSET);
3321 if (likely(end_offset <= DP_RX_BUFFER_SIZE)) {
3322 skb_put(skb, end_offset);
3323 } else {
3324 ath12k_warn(ab,
3325 "invalid offset on mon stats destination %u\n",
3326 end_offset);
3327 skb_put(skb, DP_RX_BUFFER_SIZE);
3328 }
3329
3330 __skb_queue_tail(&skb_list, skb);
3331
3332 move_next:
3333 ath12k_dp_mon_buf_replenish(ab, buf_ring, 1);
3334 ath12k_hal_srng_dst_get_next_entry(ab, srng);
3335 num_buffs_reaped++;
3336 }
3337
3338 ath12k_hal_srng_access_end(ab, srng);
3339 spin_unlock_bh(&srng->lock);
3340
3341 if (!num_buffs_reaped)
3342 return 0;
3343
3344 /* In some cases, one PPDU worth of data can be spread across multiple NAPI
3345 * schedules, To avoid losing existing parsed ppdu_info information, skip
3346 * the memset of the ppdu_info structure and continue processing it.
3347 */
3348 if (!ppdu_info->ppdu_continuation)
3349 ath12k_wifi7_dp_mon_rx_memset_ppdu_info(ppdu_info);
3350
3351 while ((skb = __skb_dequeue(&skb_list))) {
3352 hal_status = ath12k_wifi7_dp_mon_rx_parse_mon_status(pdev_dp, pmon,
3353 skb, napi);
3354 if (hal_status != HAL_RX_MON_STATUS_PPDU_DONE) {
3355 ppdu_info->ppdu_continuation = true;
3356 dev_kfree_skb_any(skb);
3357 continue;
3358 }
3359
3360 if (ppdu_info->peer_id == HAL_INVALID_PEERID)
3361 goto free_skb;
3362
3363 rcu_read_lock();
3364 peer = ath12k_dp_link_peer_find_by_peerid(pdev_dp, ppdu_info->peer_id);
3365 if (!peer || !peer->sta) {
3366 ath12k_dbg(ab, ATH12K_DBG_DATA,
3367 "failed to find the peer with monitor peer_id %d\n",
3368 ppdu_info->peer_id);
3369 goto next_skb;
3370 }
3371
3372 if (ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_SU) {
3373 ath12k_dp_mon_rx_update_peer_su_stats(peer, ppdu_info);
3374 } else if ((ppdu_info->fc_valid) &&
3375 (ppdu_info->ast_index != HAL_AST_IDX_INVALID)) {
3376 ath12k_dp_mon_rx_process_ulofdma(ppdu_info);
3377 ath12k_dp_mon_rx_update_peer_mu_stats(ab, ppdu_info);
3378 }
3379
3380 next_skb:
3381 rcu_read_unlock();
3382 free_skb:
3383 dev_kfree_skb_any(skb);
3384 ath12k_wifi7_dp_mon_rx_memset_ppdu_info(ppdu_info);
3385 }
3386
3387 return num_buffs_reaped;
3388 }
3389
ath12k_wifi7_dp_mon_process_ring(struct ath12k_dp * dp,int mac_id,struct napi_struct * napi,int budget,enum dp_monitor_mode monitor_mode)3390 int ath12k_wifi7_dp_mon_process_ring(struct ath12k_dp *dp, int mac_id,
3391 struct napi_struct *napi, int budget,
3392 enum dp_monitor_mode monitor_mode)
3393 {
3394 u8 pdev_idx = ath12k_hw_mac_id_to_pdev_id(dp->hw_params, mac_id);
3395 struct ath12k_pdev_dp *dp_pdev;
3396 struct ath12k *ar;
3397 int num_buffs_reaped = 0;
3398
3399 rcu_read_lock();
3400
3401 dp_pdev = ath12k_dp_to_pdev_dp(dp, pdev_idx);
3402 if (!dp_pdev) {
3403 rcu_read_unlock();
3404 return 0;
3405 }
3406
3407 if (dp->hw_params->rxdma1_enable) {
3408 if (monitor_mode == ATH12K_DP_RX_MONITOR_MODE)
3409 num_buffs_reaped = ath12k_wifi7_dp_mon_srng_process(dp_pdev,
3410 &budget,
3411 napi);
3412 } else {
3413 ar = ath12k_pdev_dp_to_ar(dp_pdev);
3414
3415 if (ar->monitor_started)
3416 num_buffs_reaped =
3417 __ath12k_wifi7_dp_mon_process_ring(ar, mac_id, napi,
3418 &budget);
3419 }
3420
3421 rcu_read_unlock();
3422
3423 return num_buffs_reaped;
3424 }
3425