1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Support for Variscite MX6 Carrier-board 4 * 5 * Copyright 2016 Variscite, Ltd. All Rights Reserved 6 * Copyright 2022 Bootlin 7 */ 8 9/dts-v1/; 10 11#include "imx6q.dtsi" 12#include "imx6qdl-var-som.dtsi" 13#include <dt-bindings/pwm/pwm.h> 14 15/ { 16 model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; 17 compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q"; 18 19 panel0: lvds-panel0 { 20 compatible = "panel-lvds"; 21 backlight = <&backlight_lvds>; 22 width-mm = <152>; 23 height-mm = <91>; 24 label = "etm070001adh6"; 25 data-mapping = "jeida-18"; 26 27 panel-timing { 28 clock-frequency = <32000000>; 29 hactive = <800>; 30 vactive = <480>; 31 hback-porch = <39>; 32 hfront-porch = <39>; 33 vback-porch = <29>; 34 vfront-porch = <13>; 35 hsync-len = <47>; 36 vsync-len = <2>; 37 }; 38 39 port { 40 panel_in_lvds0: endpoint { 41 remote-endpoint = <&lvds0_out>; 42 }; 43 }; 44 }; 45 46 panel1: lvds-panel1 { 47 compatible = "panel-lvds"; 48 width-mm = <152>; 49 height-mm = <91>; 50 data-mapping = "jeida-18"; 51 52 panel-timing { 53 clock-frequency = <38251000>; 54 hactive = <800>; 55 vactive = <600>; 56 hback-porch = <112>; 57 hfront-porch = <32>; 58 vback-porch = <3>; 59 vfront-porch = <17>; 60 hsync-len = <80>; 61 vsync-len = <4>; 62 }; 63 64 port { 65 panel_in_lvds1: endpoint { 66 remote-endpoint = <&lvds1_out>; 67 }; 68 }; 69 }; 70 71 backlight_lvds: backlight-lvds { 72 compatible = "pwm-backlight"; 73 pwms = <&pwm2 0 50000 0>; 74 brightness-levels = <0 4 8 16 32 64 128 248>; 75 default-brightness-level = <7>; 76 power-supply = <®_3p3v>; 77 }; 78}; 79 80&i2c3 { 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_i2c3>; 83 status = "okay"; 84 85 touchscreen@24 { 86 compatible = "cypress,tt21000"; 87 reg = <0x24>; 88 interrupt-parent = <&gpio3>; 89 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 90 reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 91 vdd-supply = <®_3p3v>; 92 touchscreen-size-x = <880>; 93 touchscreen-size-y = <1280>; 94 }; 95 96 touchscreen@38 { 97 compatible = "edt,edt-ft5306"; 98 reg = <0x38>; 99 interrupt-parent = <&gpio3>; 100 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 101 touchscreen-size-x = <1800>; 102 touchscreen-size-y = <1000>; 103 }; 104}; 105 106&iomuxc { 107 pinctrl_camera: cameragrp { 108 fsl,pins = < 109 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 110 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 111 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 112 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 113 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 114 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 115 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 116 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 117 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0 118 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 119 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 120 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 121 >; 122 }; 123 124 pinctrl_flexcan1: flexcan1grp { 125 fsl,pins = < 126 MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 127 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 128 >; 129 }; 130 131 pinctrl_ipu1: ipu1grp { 132 fsl,pins = < 133 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 134 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 135 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 136 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 137 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 138 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 139 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 140 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 141 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 142 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 143 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 144 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 145 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 146 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 147 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 148 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 149 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 150 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 151 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 152 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 153 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 154 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 155 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 156 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 157 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 158 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 159 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 160 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 161 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 162 >; 163 }; 164 165 pinctrl_uart3: uart3grp { 166 fsl,pins = < 167 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 168 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 169 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 170 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 171 >; 172 }; 173 174 pinctrl_usbotg_var: usbotggrp { 175 fsl,pins = < 176 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 177 >; 178 }; 179 180 pinctrl_usdhc1: usdhc1grp { 181 fsl,pins = < 182 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 183 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 184 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 185 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 186 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 187 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 188 >; 189 }; 190 191 pinctrl_usdhc2: usdhc2grp { 192 fsl,pins = < 193 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 194 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 195 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 196 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 197 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 198 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 199 >; 200 }; 201}; 202 203&ldb { 204 status = "okay"; 205 206 lvds-channel@0 { 207 fsl,data-mapping = "spwg"; 208 fsl,data-width = <24>; 209 status = "okay"; 210 211 port@4 { 212 reg = <4>; 213 214 lvds0_out: endpoint { 215 remote-endpoint = <&panel_in_lvds0>; 216 }; 217 }; 218 }; 219 220 lvds-channel@1 { 221 fsl,data-mapping = "spwg"; 222 fsl,data-width = <24>; 223 status = "okay"; 224 225 port@4 { 226 reg = <4>; 227 228 lvds1_out: endpoint { 229 remote-endpoint = <&panel_in_lvds1>; 230 }; 231 }; 232 }; 233}; 234 235&uart3 { 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_uart3>; 238 uart-has-rtscts; 239 status = "okay"; 240}; 241 242&usdhc2 { 243 pinctrl-names = "default"; 244 pinctrl-0 = <&pinctrl_usdhc2>; 245 cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; 246 wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; 247 status = "okay"; 248}; 249