| /linux/drivers/net/wireless/quantenna/qtnfmac/pcie/ |
| H A D | pearl_pcie_regs.h | 8 #define PCIE_HDP_CTRL(base) ((base) + 0x2c00) argument
9 #define PCIE_HDP_AXI_CTRL(base) ((base) + 0x2c04) argument
10 #define PCIE_HDP_HOST_WR_DESC0(base) ((base) + 0x2c10) argument
11 #define PCIE_HDP_HOST_WR_DESC0_H(base) ((base) + 0x2c14) argument
12 #define PCIE_HDP_HOST_WR_DESC1(base) ((base) + 0x2c18) argument
13 #define PCIE_HDP_HOST_WR_DESC1_H(base) ((base) + 0x2c1c) argument
14 #define PCIE_HDP_HOST_WR_DESC2(base) ((base) + 0x2c20) argument
15 #define PCIE_HDP_HOST_WR_DESC2_H(base) ((base) + 0x2c24) argument
16 #define PCIE_HDP_HOST_WR_DESC3(base) ((base) + 0x2c28) argument
17 #define PCIE_HDP_HOST_WR_DESC4_H(base) ((base) + 0x2c2c) argument
[all …]
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| H A D | topaz_pcie_regs.h | 8 #define PCIE_DMA_WR_INTR_STATUS(base) ((base) + 0x9bc) argument
9 #define PCIE_DMA_WR_INTR_MASK(base) ((base) + 0x9c4) argument
10 #define PCIE_DMA_WR_INTR_CLR(base) ((base) + 0x9c8) argument
11 #define PCIE_DMA_WR_ERR_STATUS(base) ((base) + 0x9cc) argument
12 #define PCIE_DMA_WR_DONE_IMWR_ADDR_LOW(base) ((base) + 0x9D0) argument
13 #define PCIE_DMA_WR_DONE_IMWR_ADDR_HIGH(base) ((base) + 0x9d4) argument
15 #define PCIE_DMA_RD_INTR_STATUS(base) ((base) + 0x310) argument
16 #define PCIE_DMA_RD_INTR_MASK(base) ((base) + 0x319) argument
17 #define PCIE_DMA_RD_INTR_CLR(base) ((base) + 0x31c) argument
18 #define PCIE_DMA_RD_ERR_STATUS_LOW(base) ((base) + 0x324) argument
[all …]
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| /linux/drivers/gpu/drm/xe/regs/ |
| H A D | xe_engine_regs.h | 46 #define ENGINE_ID(base) XE_REG((base) + 0x8c) argument
50 #define RING_TAIL(base) XE_REG((base) + 0x30) argument
53 #define RING_HEAD(base) XE_REG((base) + 0x34) argument
56 #define RING_START(base) XE_REG((base) + 0x38) argument
58 #define RING_CTL(base) XE_REG((base) argument
61 RING_START_UDW(base) global() argument
63 RING_PSMI_CTL(base) global() argument
68 RING_PWRCTX_MAXCNT(base) global() argument
71 RING_ACTHD_UDW(base) global() argument
72 RING_DMA_FADD_UDW(base) global() argument
73 RING_IPEHR(base) global() argument
74 RING_INSTDONE(base) global() argument
75 RING_ACTHD(base) global() argument
76 RING_DMA_FADD(base) global() argument
77 RING_HWS_PGA(base) global() argument
78 RING_HWSTAM(base) global() argument
79 RING_MI_MODE(base) global() argument
80 RING_NOPID(base) global() argument
82 FF_THREAD_MODE(base) global() argument
85 RING_INT_SRC_RPT_PTR(base) global() argument
86 RING_IMR(base) global() argument
87 RING_INT_STATUS_RPT_PTR(base) global() argument
89 CS_INT_VEC(base) global() argument
91 RING_EIR(base) global() argument
92 RING_EMR(base) global() argument
93 RING_ESR(base) global() argument
95 INSTPM(base) global() argument
98 RING_CMD_CCTL(base) global() argument
100 CS_MMIO_GROUP_INSTANCE_SELECT(base) global() argument
115 CSFE_CHICKEN1(base) global() argument
120 CS_DEBUG_MODE2(base) global() argument
123 FF_SLICE_CS_CHICKEN1(base) global() argument
126 CS_DEBUG_MODE1(base) global() argument
130 INDIRECT_RING_STATE(base) global() argument
132 RING_BBADDR(base) global() argument
133 RING_BBADDR_UDW(base) global() argument
135 PR_CTR_CTRL(base) global() argument
141 PR_CTR_THRSH(base) global() argument
143 BCS_SWCTRL(base) global() argument
147 BLIT_CCTL(base) global() argument
151 RING_EXECLIST_STATUS_LO(base) global() argument
152 RING_EXECLIST_STATUS_HI(base) global() argument
154 RING_IDLEDLY(base) global() argument
158 RING_CURRENT_LRCA(base) global() argument
160 RING_CONTEXT_CONTROL(base) global() argument
168 RING_MODE(base) global() argument
172 RING_CSMQDEBUG(base) global() argument
174 RING_TIMESTAMP(base) global() argument
176 RING_TIMESTAMP_UDW(base) global() argument
181 RING_CTX_TIMESTAMP(base) global() argument
182 RING_CTX_TIMESTAMP_UDW(base) global() argument
183 CSBE_DEBUG_STATUS(base) global() argument
185 RING_FORCE_TO_NONPRIV(base,i) global() argument
203 RING_EXECLIST_SQ_CONTENTS_LO(base) global() argument
204 RING_EXECLIST_SQ_CONTENTS_HI(base) global() argument
206 RING_EXECLIST_CONTROL(base) global() argument
209 CS_CHICKEN1(base) global() argument
217 CS_GPR_DATA(base,n) global() argument
218 CS_GPR_REG(base,n) global() argument
219 CS_GPR_REG_UDW(base,n) global() argument
221 VDBOX_CGCTL3F08(base) global() argument
224 VDBOX_CGCTL3F10(base) global() argument
228 VDBOX_CGCTL3F18(base) global() argument
231 VDBOX_CGCTL3F1C(base) global() argument
[all...] |
| /linux/drivers/scsi/ |
| H A D | nsp32_io.h | 12 static inline void nsp32_write1(unsigned int base, in nsp32_write1()
19 static inline unsigned char nsp32_read1(unsigned int base, in nsp32_read1()
25 static inline void nsp32_write2(unsigned int base, in nsp32_write2()
32 static inline unsigned short nsp32_read2(unsigned int base, in nsp32_read2()
38 static inline void nsp32_write4(unsigned int base, in nsp32_write4()
45 static inline unsigned long nsp32_read4(unsigned int base, in nsp32_read4()
53 static inline void nsp32_mmio_write1(unsigned long base, in nsp32_mmio_write1()
64 static inline unsigned char nsp32_mmio_read1(unsigned long base, in nsp32_mmio_read1()
74 static inline void nsp32_mmio_write2(unsigned long base, in nsp32_mmio_write2()
85 static inline unsigned short nsp32_mmio_read2(unsigned long base, in nsp32_mmio_read2()
[all …]
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| H A D | aha1740.h | 19 #define HID0(base) (base + 0x0) argument
20 #define HID1(base) (base + 0x1) argument
21 #define HID2(base) (base + 0x2) argument
22 #define HID3(base) (base + 0x3) argument
23 #define EBCNTRL(base) (base + 0x4) argument
24 #define PORTADR(base) (base + 0x40) argument
25 #define BIOSADR(base) (base + 0x41) argument
26 #define INTDEF(base) (base + 0x42) argument
27 #define SCSIDEF(base) (base + 0x43) argument
28 #define BUSDEF(base) (base + 0x44) argument
[all …]
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| H A D | myrb.c | 164 void __iomem *base = cb->io_base; in myrb_qcmd() local
807 void __iomem *base = cb->io_base; in myrb_enable_mmio() local
2515 static inline void DAC960_LA_hw_mbox_new_cmd(void __iomem *base) in DAC960_LA_hw_mbox_new_cmd()
2520 static inline void DAC960_LA_ack_hw_mbox_status(void __iomem *base) in DAC960_LA_ack_hw_mbox_status()
2525 static inline void DAC960_LA_reset_ctrl(void __iomem *base) in DAC960_LA_reset_ctrl()
2530 static inline void DAC960_LA_mem_mbox_new_cmd(void __iomem *base) in DAC960_LA_mem_mbox_new_cmd()
2535 static inline bool DAC960_LA_hw_mbox_is_full(void __iomem *base) in DAC960_LA_hw_mbox_is_full()
2542 static inline bool DAC960_LA_init_in_progress(void __iomem *base) in DAC960_LA_init_in_progress()
2549 static inline void DAC960_LA_ack_hw_mbox_intr(void __iomem *base) in DAC960_LA_ack_hw_mbox_intr()
2554 static inline void DAC960_LA_ack_intr(void __iomem *base) in DAC960_LA_ack_intr()
[all …]
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| H A D | myrs.c | 106 void __iomem *base = cs->io_base; in myrs_qcmd() local
484 void __iomem *base = cs->io_base; in myrs_enable_mmio_mbox() local
2398 static inline void DAC960_GEM_hw_mbox_new_cmd(void __iomem *base) in DAC960_GEM_hw_mbox_new_cmd()
2405 static inline void DAC960_GEM_ack_hw_mbox_status(void __iomem *base) in DAC960_GEM_ack_hw_mbox_status()
2412 static inline void DAC960_GEM_reset_ctrl(void __iomem *base) in DAC960_GEM_reset_ctrl()
2419 static inline void DAC960_GEM_mem_mbox_new_cmd(void __iomem *base) in DAC960_GEM_mem_mbox_new_cmd()
2426 static inline bool DAC960_GEM_hw_mbox_is_full(void __iomem *base) in DAC960_GEM_hw_mbox_is_full()
2434 static inline bool DAC960_GEM_init_in_progress(void __iomem *base) in DAC960_GEM_init_in_progress()
2442 static inline void DAC960_GEM_ack_hw_mbox_intr(void __iomem *base) in DAC960_GEM_ack_hw_mbox_intr()
2449 static inline void DAC960_GEM_ack_intr(void __iomem *base) in DAC960_GEM_ack_intr()
[all …]
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| /linux/arch/arm/mm/ |
| H A D | cache-l2x0.c | 66 static void l2c_write_sec(unsigned long val, void __iomem *base, unsigned reg) in l2c_write_sec()
81 static inline void l2c_set_debug(void __iomem *base, unsigned long val) in l2c_set_debug()
92 static inline void l2c_unlock(void __iomem *base, unsigned num) in l2c_unlock()
104 static void l2c_configure(void __iomem *base) in l2c_configure()
113 static void l2c_enable(void __iomem *base, unsigned num_lock) in l2c_enable()
135 void __iomem *base = l2x0_base; in l2c_disable() local
144 static void l2c_save(void __iomem *base) in l2c_save()
151 void __iomem *base = l2x0_base; in l2c_resume() local
174 static void __l2c210_cache_sync(void __iomem *base) in __l2c210_cache_sync()
190 void __iomem *base = l2x0_base; in l2c210_inv_range() local
[all …]
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| /linux/drivers/scsi/pcmcia/ |
| H A D | nsp_io.h | 30 static inline void nsp_write(unsigned int base, in nsp_write()
37 static inline unsigned char nsp_read(unsigned int base, in nsp_read()
75 static inline void nsp_fifo8_read(unsigned int base, in nsp_fifo8_read()
94 static inline void nsp_fifo16_read(unsigned int base, in nsp_fifo16_read()
113 static inline void nsp_fifo32_read(unsigned int base, in nsp_fifo32_read()
132 static inline void nsp_fifo8_write(unsigned int base, in nsp_fifo8_write()
150 static inline void nsp_fifo16_write(unsigned int base, in nsp_fifo16_write()
168 static inline void nsp_fifo32_write(unsigned int base, in nsp_fifo32_write()
178 static inline void nsp_mmio_write(unsigned long base, in nsp_mmio_write()
187 static inline unsigned char nsp_mmio_read(unsigned long base, in nsp_mmio_read()
[all …]
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| /linux/arch/powerpc/kernel/ |
| H A D | fpu.S | 26 #define __REST_1FPVSR(n,c,base) \ argument
35 #define __REST_32FPVSRS(n,c,base) \ argument
44 #define __SAVE_32FPVSRS(n,c,base) \ argument
53 #define __REST_1FPVSR(n,b,base) REST_FPR(n, base) argument
54 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) argument
55 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) argument
57 #define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base) argument
58 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base) argument
59 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base) argument
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| H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ argument
28 #define __REST_32FPRS_VSRS(n,c,base) \ argument
37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) argument
38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) argument
40 #define SAVE_32FPRS_VSRS(n,c,base) \ argument
42 #define REST_32FPRS_VSRS(n,c,base) \ argument
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| /linux/drivers/s390/block/ |
| H A D | dasd_ioctl.c | 41 struct dasd_device *base; in dasd_ioctl_enable() local
62 struct dasd_device *base; in dasd_ioctl_disable() local
94 struct dasd_device *base; in dasd_ioctl_quiesce() local
115 struct dasd_device *base; in dasd_ioctl_resume() local
138 struct dasd_device *base; in dasd_ioctl_abortio() local
173 struct dasd_device *base; in dasd_ioctl_allowio() local
194 struct dasd_device *base; in dasd_format() local
232 struct dasd_device *base; in dasd_check_format() local
252 struct dasd_device *base; in dasd_ioctl_format() local
290 struct dasd_device *base; in dasd_ioctl_check_format() local
[all …]
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| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | 98 static inline void __au1300_usb_phyctl(void __iomem *base, int enable) in __au1300_usb_phyctl()
123 static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) in __au1300_ohci_control()
163 static inline void __au1300_ehci_control(void __iomem *base, int enable) in __au1300_ehci_control()
204 static inline void __au1300_udc_control(void __iomem *base, int enable) in __au1300_udc_control()
235 static inline void __au1300_otg_control(void __iomem *base, int enable) in __au1300_otg_control()
267 void __iomem *base = in au1300_usb_control() local
295 void __iomem *base = in au1300_usb_init() local
316 static inline void __au1200_ohci_control(void __iomem *base, int enable) in __au1200_ohci_control()
330 static inline void __au1200_ehci_control(void __iomem *base, int enable) in __au1200_ehci_control()
346 static inline void __au1200_udc_control(void __iomem *base, int enable) in __au1200_udc_control()
[all …]
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| H A D | irq.c | 291 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_unmask() local
301 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_unmask() local
311 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_mask() local
321 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_mask() local
331 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_ack() local
345 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_ack() local
359 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC0_PHYS_ADDR); in au1x_ic0_maskack() local
371 void __iomem *base = (void __iomem *)KSEG1ADDR(AU1000_IC1_PHYS_ADDR); in au1x_ic1_maskack() local
432 void __iomem *base; in au1x_ic_settype() local
715 static inline void ic_init(void __iomem *base) in ic_init()
[all …]
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bar/ |
| H A D | nv50.c | 32 nv50_bar_flush(struct nvkm_bar *base) in nv50_bar_flush()
47 nv50_bar_bar1_vmm(struct nvkm_bar *base) in nv50_bar_bar1_vmm()
53 nv50_bar_bar1_wait(struct nvkm_bar *base) in nv50_bar_bar1_wait()
65 nv50_bar_bar1_init(struct nvkm_bar *base) in nv50_bar_bar1_init()
73 nv50_bar_bar2_vmm(struct nvkm_bar *base) in nv50_bar_bar2_vmm()
85 nv50_bar_bar2_init(struct nvkm_bar *base) in nv50_bar_bar2_init()
95 nv50_bar_init(struct nvkm_bar *base) in nv50_bar_init()
106 nv50_bar_oneinit(struct nvkm_bar *base) in nv50_bar_oneinit()
204 nv50_bar_dtor(struct nvkm_bar *base) in nv50_bar_dtor()
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| /linux/arch/arm/plat-orion/ |
| H A D | pcie.c | 55 u32 orion_pcie_dev_id(void __iomem *base) in orion_pcie_dev_id()
60 u32 orion_pcie_rev(void __iomem *base) in orion_pcie_rev()
65 int orion_pcie_link_up(void __iomem *base) in orion_pcie_link_up()
70 int __init orion_pcie_x4_mode(void __iomem *base) in orion_pcie_x4_mode()
75 int orion_pcie_get_local_bus_nr(void __iomem *base) in orion_pcie_get_local_bus_nr()
82 void __init orion_pcie_set_local_bus_nr(void __iomem *base, int nr) in orion_pcie_set_local_bus_nr()
92 void __init orion_pcie_reset(void __iomem *base) in orion_pcie_reset()
123 static void __init orion_pcie_setup_wins(void __iomem *base) in orion_pcie_setup_wins()
181 void __init orion_pcie_setup(void __iomem *base) in orion_pcie_setup()
208 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, in orion_pcie_rd_conf()
[all …]
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| /linux/drivers/block/ |
| H A D | swim.c | 63 #define swim_write(base, reg, v) out_8(&(base)->write_##reg, (v)) argument
64 #define swim_read(base, reg) in_8(&(base)->read_##reg) argument
87 #define iwm_write(base, reg, v) out_8(&(base)->reg, (v)) argument
88 #define iwm_read(base, reg) in_8(&(base)->reg) argument
211 struct swim __iomem *base; member
223 static inline void set_swim_mode(struct swim __iomem *base, int enable) in set_swim_mode()
248 static inline int get_swim_mode(struct swim __iomem *base) in get_swim_mode()
270 static inline void swim_select(struct swim __iomem *base, int sel) in swim_select()
279 static inline void swim_action(struct swim __iomem *base, int action) in swim_action()
295 static inline int swim_readbit(struct swim __iomem *base, int bit) in swim_readbit()
[all …]
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| /linux/drivers/clocksource/ |
| H A D | timer-rtl-otto.c | 57 static inline unsigned int rttm_get_counter(void __iomem *base) in rttm_get_counter() argument
62 static inline void rttm_set_period(void __iomem *base, unsigned int period) in rttm_set_period() argument
67 static inline void rttm_disable_timer(void __iomem *base) in rttm_disable_timer() argument
72 static inline void rttm_enable_timer(void __iomem *base, u32 mode, u32 divisor) in rttm_enable_timer() argument
77 static inline void rttm_ack_irq(void __iomem *base) in rttm_ack_irq() argument
82 rttm_enable_irq(void __iomem * base) rttm_enable_irq() argument
87 rttm_disable_irq(void __iomem * base) rttm_disable_irq() argument
93 RTTM_DEBUG(base) global() argument
109 rttm_bounce_timer(void __iomem * base,u32 mode) rttm_bounce_timer() argument
125 rttm_stop_timer(void __iomem * base) rttm_stop_timer() argument
185 rttm_setup_timer(void __iomem * base) rttm_setup_timer() argument
[all...] |
| H A D | timer-gx6605s.c | 28 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_interrupt() local
40 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_oneshot() local
55 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_set_next_event() local
69 void __iomem *base = timer_of_base(to_timer_of(ce)); in gx6605s_timer_shutdown() local
96 void __iomem *base; in gx6605s_sched_clock_read() local
103 static void gx6605s_clkevt_init(void __iomem *base) in gx6605s_clkevt_init()
112 static int gx6605s_clksrc_init(void __iomem *base) in gx6605s_clksrc_init()
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| H A D | timer-goldfish.c | 16 void __iomem *base; member
32 void __iomem *base = timerdrv->base; in goldfish_timer_read() local
51 void __iomem *base = timerdrv->base; in goldfish_timer_set_oneshot() local
63 void __iomem *base = timerdrv->base; in goldfish_timer_shutdown() local
74 void __iomem *base = timerdrv->base; in goldfish_timer_next_event() local
91 void __iomem *base = timerdrv->base; in goldfish_timer_irq() local
100 int __init goldfish_timer_init(int irq, void __iomem *base) in goldfish_timer_init()
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| /linux/kernel/time/ |
| H A D | hrtimer.c | 122 static inline bool hrtimer_base_is_online(struct hrtimer_cpu_base *base) in hrtimer_base_is_online() argument
188 struct hrtimer_clock_base *base = READ_ONCE(timer->base); lock_hrtimer_base() local
242 get_target_base(struct hrtimer_cpu_base * base,bool pinned) get_target_base() argument
270 switch_hrtimer_base(struct hrtimer * timer,struct hrtimer_clock_base * base,bool pinned) switch_hrtimer_base() argument
321 struct hrtimer_clock_base *base = timer->base; lock_hrtimer_base() local
532 for_each_active_base(base,cpu_base,active) global() argument
548 struct hrtimer_clock_base *base; hrtimer_bases_next_event_without() local
579 clock_base_next_timer(struct hrtimer_clock_base * base) clock_base_next_timer() argument
590 struct hrtimer_clock_base *base; hrtimer_bases_first() local
677 hrtimer_update_base(struct hrtimer_cpu_base * base) hrtimer_update_base() argument
773 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); hrtimer_switch_to_hres() local
810 struct hrtimer_cpu_base *base = this_cpu_ptr(&hrtimer_bases); retrigger_next_event() local
847 struct hrtimer_clock_base *base = timer->base; hrtimer_reprogram() local
904 struct hrtimer_clock_base *base; update_needs_ipi() local
1104 enqueue_hrtimer(struct hrtimer * timer,struct hrtimer_clock_base * base,enum hrtimer_mode mode,bool was_armed) enqueue_hrtimer() argument
1124 base_update_next_timer(struct hrtimer_clock_base * base) base_update_next_timer() argument
1139 __remove_hrtimer(struct hrtimer * timer,struct hrtimer_clock_base * base,bool newstate,bool reprogram) __remove_hrtimer() argument
1182 remove_hrtimer(struct hrtimer * timer,struct hrtimer_clock_base * base,bool newstate) remove_hrtimer() argument
1216 hrtimer_can_update_in_place(struct hrtimer * timer,struct hrtimer_clock_base * base,ktime_t expires) hrtimer_can_update_in_place() argument
1234 remove_and_enqueue_same_base(struct hrtimer * timer,struct hrtimer_clock_base * base,const enum hrtimer_mode mode,ktime_t expires,u64 delta_ns) remove_and_enqueue_same_base() argument
1356 __hrtimer_start_range_ns(struct hrtimer * timer,ktime_t tim,u64 delta_ns,const enum hrtimer_mode mode,struct hrtimer_clock_base * base) __hrtimer_start_range_ns() argument
1474 struct hrtimer_clock_base *base; hrtimer_start_range_ns() local
1511 struct hrtimer_clock_base *base; hrtimer_try_to_cancel() local
1540 hrtimer_cpu_base_init_expiry_lock(struct hrtimer_cpu_base * base) hrtimer_cpu_base_init_expiry_lock() argument
1545 hrtimer_cpu_base_lock_expiry(struct hrtimer_cpu_base * base) hrtimer_cpu_base_lock_expiry() argument
1551 hrtimer_cpu_base_unlock_expiry(struct hrtimer_cpu_base * base) hrtimer_cpu_base_unlock_expiry() argument
1575 is_migration_base(struct hrtimer_clock_base * base) is_migration_base() argument
1580 is_migration_base(struct hrtimer_clock_base * base) is_migration_base() argument
1605 struct hrtimer_clock_base *base = READ_ONCE(timer->base); hrtimer_cancel_wait_running() local
1629 hrtimer_cpu_base_init_expiry_lock(struct hrtimer_cpu_base * base) hrtimer_cpu_base_init_expiry_lock() argument
1630 hrtimer_cpu_base_lock_expiry(struct hrtimer_cpu_base * base) hrtimer_cpu_base_lock_expiry() argument
1631 hrtimer_cpu_base_unlock_expiry(struct hrtimer_cpu_base * base) hrtimer_cpu_base_unlock_expiry() argument
1632 hrtimer_sync_wait_running(struct hrtimer_cpu_base * base,unsigned long fl) hrtimer_sync_wait_running() argument
1769 int base; __hrtimer_setup() local
1855 struct hrtimer_clock_base *base; hrtimer_active() local
1888 __run_hrtimer(struct hrtimer_cpu_base * cpu_base,struct hrtimer_clock_base * base,struct hrtimer * timer,ktime_t now,unsigned long flags) __run_hrtimer() argument
1961 clock_base_next_timer_safe(struct hrtimer_clock_base * base) clock_base_next_timer_safe() argument
1972 struct hrtimer_clock_base *base; __hrtimer_run_queues() local
[all...] |
| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_perf_oa_regs.h | 100 #define GEN12_OACTXCONTROL(base) _MMIO((base) + 0x360) argument
172 #define GEN12_OAM_MMIO_TRG(base) \ argument
175 #define GEN12_OAM_HEAD_POINTER(base) \ argument
177 #define GEN12_OAM_TAIL_POINTER(base) \ argument
179 #define GEN12_OAM_BUFFER(base) \ argument
181 #define GEN12_OAM_CONTEXT_CONTROL(base) \ argument
183 #define GEN12_OAM_CONTROL(base) \ argument
185 #define GEN12_OAM_DEBUG(base) \ argument
187 #define GEN12_OAM_STATUS(base) \ argument
192 #define GEN12_OAM_CEC0_0(base) \ argument
[all …]
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| /linux/drivers/gpio/ |
| H A D | gpio-winbond.c | 131 unsigned long base; member
142 static int winbond_sio_enter(unsigned long base) in winbond_sio_enter()
157 static void winbond_sio_select_logical(unsigned long base, u8 dev) in winbond_sio_select_logical()
163 static void winbond_sio_leave(unsigned long base) in winbond_sio_leave()
170 static void winbond_sio_reg_write(unsigned long base, u8 reg, u8 data) in winbond_sio_reg_write()
176 static u8 winbond_sio_reg_read(unsigned long base, u8 reg) in winbond_sio_reg_read()
182 static void winbond_sio_reg_bset(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bset()
191 static void winbond_sio_reg_bclear(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_bclear()
200 static bool winbond_sio_reg_btest(unsigned long base, u8 reg, u8 bit) in winbond_sio_reg_btest()
385 unsigned long *base = gpiochip_get_data(gc); in winbond_gpio_get() local
[all …]
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| /linux/drivers/mtd/chips/ |
| H A D | cfi_probe.c | 39 #define xip_allowed(base, map) \ argument
46 #define xip_enable(base, map, cfi) \ argument
52 #define xip_disable_qry(base, map, cfi) \ argument
61 #define xip_allowed(base, map) do { } while (0) argument
62 #define xip_enable(base, map, cfi) do { } while (0) argument
63 #define xip_disable_qry(base, map, cfi) do { } while (0) argument
96 static int __xipram cfi_probe_chip(struct map_info *map, __u32 base, in cfi_probe_chip()
199 __u32 base = 0; in cfi_chip_setup() local
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| /linux/arch/loongarch/kernel/ |
| H A D | fpu.S | 29 .macro sc_save_fp base argument
64 .macro sc_restore_fp base argument
200 .macro sc_save_lsx base argument
237 .macro sc_restore_lsx base argument
274 .macro sc_save_lasx base argument
311 .macro sc_restore_lasx base argument
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