1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_CPU_FINALIZE_INIT 9 select ARCH_HAS_CURRENT_STACK_POINTER 10 select ARCH_HAS_GIGANTIC_PAGE 11 select ARCH_HAS_GCOV_PROFILE_ALL 12 select ARCH_HAS_PTE_SPECIAL 13 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 14 select ARCH_HIBERNATION_POSSIBLE if MMU 15 select ARCH_MIGHT_HAVE_PC_PARPORT 16 select ARCH_WANT_IPC_PARSE_VERSION 17 select ARCH_NEED_CMPXCHG_1_EMU 18 select CPU_NO_EFFICIENT_FFS 19 select DMA_DECLARE_COHERENT 20 select GENERIC_ATOMIC64 21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 22 select GENERIC_IDLE_POLL_SETUP 23 select GENERIC_IRQ_SHOW 24 select GENERIC_LIB_ASHLDI3 25 select GENERIC_LIB_ASHRDI3 26 select GENERIC_LIB_LSHRDI3 27 select GENERIC_PCI_IOMAP if PCI 28 select GENERIC_SCHED_CLOCK 29 select GENERIC_SMP_IDLE_THREAD 30 select GUP_GET_PXX_LOW_HIGH if X2TLB 31 select HAS_IOPORT if HAS_IOPORT_MAP 32 select GENERIC_IOREMAP if MMU 33 select HAVE_ARCH_AUDITSYSCALL 34 select HAVE_ARCH_KGDB 35 select HAVE_ARCH_SECCOMP_FILTER 36 select HAVE_ARCH_TRACEHOOK 37 select HAVE_DEBUG_BUGVERBOSE 38 select HAVE_DEBUG_KMEMLEAK 39 select HAVE_DYNAMIC_FTRACE 40 select HAVE_GUP_FAST if MMU 41 select HAVE_FUNCTION_GRAPH_TRACER 42 select HAVE_FUNCTION_TRACER 43 select HAVE_HW_BREAKPOINT 44 select HAVE_IOREMAP_PROT if MMU && !X2TLB 45 select HAVE_KERNEL_BZIP2 46 select HAVE_KERNEL_GZIP 47 select HAVE_KERNEL_LZMA 48 select HAVE_KERNEL_LZO 49 select HAVE_KERNEL_XZ 50 select HAVE_KPROBES 51 select HAVE_KRETPROBES 52 select HAVE_MIXED_BREAKPOINTS_REGS 53 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 54 select HAVE_NMI 55 select HAVE_PATA_PLATFORM 56 select HAVE_PERF_EVENTS 57 select HAVE_REGS_AND_STACK_ACCESS_API 58 select HAVE_UID16 59 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 60 select HAVE_STACKPROTECTOR 61 select HAVE_SYSCALL_TRACEPOINTS 62 select IRQ_FORCED_THREADING 63 select LOCK_MM_AND_FIND_VMA 64 select MODULES_USE_ELF_RELA 65 select NEED_SG_DMA_LENGTH 66 select NO_DMA if !MMU && !DMA_COHERENT 67 select NO_GENERIC_PCI_IOPORT_MAP if PCI 68 select OLD_SIGACTION 69 select OLD_SIGSUSPEND 70 select PCI_DOMAINS if PCI 71 select PERF_EVENTS 72 select PERF_USE_VMALLOC 73 select RTC_LIB 74 select SPARSE_IRQ 75 select TRACE_IRQFLAGS_SUPPORT 76 help 77 The SuperH is a RISC processor targeted for use in embedded systems 78 and consumer electronics; it was also used in the Sega Dreamcast 79 gaming console. The SuperH port has a home page at 80 <http://www.linux-sh.org/>. 81 82config GENERIC_BUG 83 def_bool y 84 depends on BUG 85 86config GENERIC_HWEIGHT 87 def_bool y 88 89config GENERIC_CALIBRATE_DELAY 90 bool 91 92config GENERIC_LOCKBREAK 93 def_bool y 94 depends on SMP && PREEMPTION 95 96config ARCH_SUSPEND_POSSIBLE 97 def_bool n 98 99config ARCH_HIBERNATION_POSSIBLE 100 def_bool n 101 102config SYS_SUPPORTS_APM_EMULATION 103 bool 104 select ARCH_SUSPEND_POSSIBLE 105 106config SYS_SUPPORTS_SMP 107 bool 108 109config SYS_SUPPORTS_NUMA 110 bool 111 112config STACKTRACE_SUPPORT 113 def_bool y 114 115config LOCKDEP_SUPPORT 116 def_bool y 117 118config ARCH_HAS_ILOG2_U32 119 def_bool n 120 121config ARCH_HAS_ILOG2_U64 122 def_bool n 123 124config NO_IOPORT_MAP 125 def_bool !PCI 126 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \ 127 !SH_DREAMCAST 128 129config IO_TRAPPED 130 bool 131 132config SWAP_IO_SPACE 133 bool 134 135config DMA_COHERENT 136 bool 137 138config DMA_NONCOHERENT 139 def_bool !NO_DMA && !DMA_COHERENT 140 select ARCH_HAS_DMA_PREP_COHERENT 141 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 142 select DMA_DIRECT_REMAP 143 144config PGTABLE_LEVELS 145 default 3 if X2TLB 146 default 2 147 148menu "System type" 149 150# 151# Processor families 152# 153config CPU_SH2 154 bool 155 select SH_INTC 156 157config CPU_SH2A 158 bool 159 select CPU_SH2 160 select UNCACHED_MAPPING 161 162config CPU_J2 163 bool 164 select CPU_SH2 165 select OF 166 select OF_EARLY_FLATTREE 167 168config CPU_SH3 169 bool 170 select CPU_HAS_INTEVT 171 select CPU_HAS_SR_RB 172 select SH_INTC 173 select SYS_SUPPORTS_SH_TMU 174 175config CPU_SH4 176 bool 177 select ARCH_SUPPORTS_HUGETLBFS if MMU 178 select CPU_HAS_INTEVT 179 select CPU_HAS_SR_RB 180 select CPU_HAS_FPU if !CPU_SH4AL_DSP 181 select SH_INTC 182 select SYS_SUPPORTS_SH_TMU 183 184config CPU_SH4A 185 bool 186 select CPU_SH4 187 188config CPU_SH4AL_DSP 189 bool 190 select CPU_SH4A 191 select CPU_HAS_DSP 192 193config CPU_SHX2 194 bool 195 196config CPU_SHX3 197 bool 198 select DMA_COHERENT 199 select SYS_SUPPORTS_SMP 200 select SYS_SUPPORTS_NUMA 201 202config ARCH_SHMOBILE 203 bool 204 select ARCH_SUSPEND_POSSIBLE 205 select PM 206 207config CPU_HAS_PMU 208 depends on CPU_SH4 || CPU_SH4A 209 default y 210 bool 211 212choice 213 prompt "Processor sub-type selection" 214 215# 216# Processor subtypes 217# 218 219# SH-2 Processor Support 220 221config CPU_SUBTYPE_SH7619 222 bool "Support SH7619 processor" 223 select CPU_SH2 224 select SYS_SUPPORTS_SH_CMT 225 226config CPU_SUBTYPE_J2 227 bool "Support J2 processor" 228 select CPU_J2 229 select SYS_SUPPORTS_SMP 230 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 231 232# SH-2A Processor Support 233 234config CPU_SUBTYPE_SH7201 235 bool "Support SH7201 processor" 236 select CPU_SH2A 237 select CPU_HAS_FPU 238 select SYS_SUPPORTS_SH_MTU2 239 240config CPU_SUBTYPE_SH7203 241 bool "Support SH7203 processor" 242 select CPU_SH2A 243 select CPU_HAS_FPU 244 select SYS_SUPPORTS_SH_CMT 245 select SYS_SUPPORTS_SH_MTU2 246 select PINCTRL 247 248config CPU_SUBTYPE_SH7206 249 bool "Support SH7206 processor" 250 select CPU_SH2A 251 select SYS_SUPPORTS_SH_CMT 252 select SYS_SUPPORTS_SH_MTU2 253 254config CPU_SUBTYPE_SH7263 255 bool "Support SH7263 processor" 256 select CPU_SH2A 257 select CPU_HAS_FPU 258 select SYS_SUPPORTS_SH_CMT 259 select SYS_SUPPORTS_SH_MTU2 260 261config CPU_SUBTYPE_SH7264 262 bool "Support SH7264 processor" 263 select CPU_SH2A 264 select CPU_HAS_FPU 265 select SYS_SUPPORTS_SH_CMT 266 select SYS_SUPPORTS_SH_MTU2 267 select PINCTRL 268 269config CPU_SUBTYPE_SH7269 270 bool "Support SH7269 processor" 271 select CPU_SH2A 272 select CPU_HAS_FPU 273 select SYS_SUPPORTS_SH_CMT 274 select SYS_SUPPORTS_SH_MTU2 275 select PINCTRL 276 277config CPU_SUBTYPE_MXG 278 bool "Support MX-G processor" 279 select CPU_SH2A 280 select SYS_SUPPORTS_SH_MTU2 281 help 282 Select MX-G if running on an R8A03022BG part. 283 284# SH-3 Processor Support 285 286config CPU_SUBTYPE_SH7705 287 bool "Support SH7705 processor" 288 select CPU_SH3 289 290config CPU_SUBTYPE_SH7706 291 bool "Support SH7706 processor" 292 select CPU_SH3 293 help 294 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 295 296config CPU_SUBTYPE_SH7707 297 bool "Support SH7707 processor" 298 select CPU_SH3 299 help 300 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 301 302config CPU_SUBTYPE_SH7708 303 bool "Support SH7708 processor" 304 select CPU_SH3 305 help 306 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 307 if you have a 100 Mhz SH-3 HD6417708R CPU. 308 309config CPU_SUBTYPE_SH7709 310 bool "Support SH7709 processor" 311 select CPU_SH3 312 help 313 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 314 315config CPU_SUBTYPE_SH7710 316 bool "Support SH7710 processor" 317 select CPU_SH3 318 select CPU_HAS_DSP 319 help 320 Select SH7710 if you have a SH3-DSP SH7710 CPU. 321 322config CPU_SUBTYPE_SH7712 323 bool "Support SH7712 processor" 324 select CPU_SH3 325 select CPU_HAS_DSP 326 help 327 Select SH7712 if you have a SH3-DSP SH7712 CPU. 328 329config CPU_SUBTYPE_SH7720 330 bool "Support SH7720 processor" 331 select CPU_SH3 332 select CPU_HAS_DSP 333 select SYS_SUPPORTS_SH_CMT 334 select USB_OHCI_SH if USB_OHCI_HCD 335 select PINCTRL 336 help 337 Select SH7720 if you have a SH3-DSP SH7720 CPU. 338 339config CPU_SUBTYPE_SH7721 340 bool "Support SH7721 processor" 341 select CPU_SH3 342 select CPU_HAS_DSP 343 select SYS_SUPPORTS_SH_CMT 344 select USB_OHCI_SH if USB_OHCI_HCD 345 help 346 Select SH7721 if you have a SH3-DSP SH7721 CPU. 347 348# SH-4 Processor Support 349 350config CPU_SUBTYPE_SH7750 351 bool "Support SH7750 processor" 352 select CPU_SH4 353 help 354 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 355 356config CPU_SUBTYPE_SH7091 357 bool "Support SH7091 processor" 358 select CPU_SH4 359 help 360 Select SH7091 if you have an SH-4 based Sega device (such as 361 the Dreamcast, Naomi, and Naomi 2). 362 363config CPU_SUBTYPE_SH7750R 364 bool "Support SH7750R processor" 365 select CPU_SH4 366 367config CPU_SUBTYPE_SH7750S 368 bool "Support SH7750S processor" 369 select CPU_SH4 370 371config CPU_SUBTYPE_SH7751 372 bool "Support SH7751 processor" 373 select CPU_SH4 374 help 375 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 376 or if you have a HD6417751R CPU. 377 378config CPU_SUBTYPE_SH7751R 379 bool "Support SH7751R processor" 380 select CPU_SH4 381 382config CPU_SUBTYPE_SH7760 383 bool "Support SH7760 processor" 384 select CPU_SH4 385 386# SH-4A Processor Support 387 388config CPU_SUBTYPE_SH7723 389 bool "Support SH7723 processor" 390 select CPU_SH4A 391 select CPU_SHX2 392 select ARCH_SHMOBILE 393 select ARCH_SPARSEMEM_ENABLE 394 select SYS_SUPPORTS_SH_CMT 395 select PINCTRL 396 help 397 Select SH7723 if you have an SH-MobileR2 CPU. 398 399config CPU_SUBTYPE_SH7724 400 bool "Support SH7724 processor" 401 select CPU_SH4A 402 select CPU_SHX2 403 select ARCH_SHMOBILE 404 select ARCH_SPARSEMEM_ENABLE 405 select SYS_SUPPORTS_SH_CMT 406 select PINCTRL 407 help 408 Select SH7724 if you have an SH-MobileR2R CPU. 409 410config CPU_SUBTYPE_SH7734 411 bool "Support SH7734 processor" 412 select CPU_SH4A 413 select CPU_SHX2 414 select PINCTRL 415 help 416 Select SH7734 if you have a SH4A SH7734 CPU. 417 418config CPU_SUBTYPE_SH7757 419 bool "Support SH7757 processor" 420 select CPU_SH4A 421 select CPU_SHX2 422 select PINCTRL 423 help 424 Select SH7757 if you have a SH4A SH7757 CPU. 425 426config CPU_SUBTYPE_SH7763 427 bool "Support SH7763 processor" 428 select CPU_SH4A 429 select USB_OHCI_SH if USB_OHCI_HCD 430 help 431 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 432 433config CPU_SUBTYPE_SH7770 434 bool "Support SH7770 processor" 435 select CPU_SH4A 436 437config CPU_SUBTYPE_SH7780 438 bool "Support SH7780 processor" 439 select CPU_SH4A 440 441config CPU_SUBTYPE_SH7785 442 bool "Support SH7785 processor" 443 select CPU_SH4A 444 select CPU_SHX2 445 select ARCH_SPARSEMEM_ENABLE 446 select SYS_SUPPORTS_NUMA 447 select PINCTRL 448 449config CPU_SUBTYPE_SH7786 450 bool "Support SH7786 processor" 451 select CPU_SH4A 452 select CPU_SHX3 453 select CPU_HAS_PTEAEX 454 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 455 select USB_OHCI_SH if USB_OHCI_HCD 456 select USB_EHCI_SH if USB_EHCI_HCD 457 select PINCTRL 458 459config CPU_SUBTYPE_SHX3 460 bool "Support SH-X3 processor" 461 select CPU_SH4A 462 select CPU_SHX3 463 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 464 select GPIOLIB 465 select PINCTRL 466 467# SH4AL-DSP Processor Support 468 469config CPU_SUBTYPE_SH7343 470 bool "Support SH7343 processor" 471 select CPU_SH4AL_DSP 472 select ARCH_SHMOBILE 473 select SYS_SUPPORTS_SH_CMT 474 475config CPU_SUBTYPE_SH7722 476 bool "Support SH7722 processor" 477 select CPU_SH4AL_DSP 478 select CPU_SHX2 479 select ARCH_SHMOBILE 480 select ARCH_SPARSEMEM_ENABLE 481 select SYS_SUPPORTS_NUMA 482 select SYS_SUPPORTS_SH_CMT 483 select PINCTRL 484 485config CPU_SUBTYPE_SH7366 486 bool "Support SH7366 processor" 487 select CPU_SH4AL_DSP 488 select CPU_SHX2 489 select ARCH_SHMOBILE 490 select ARCH_SPARSEMEM_ENABLE 491 select SYS_SUPPORTS_NUMA 492 select SYS_SUPPORTS_SH_CMT 493 494endchoice 495 496source "arch/sh/mm/Kconfig" 497 498source "arch/sh/Kconfig.cpu" 499 500source "arch/sh/boards/Kconfig" 501 502menu "Timer and clock configuration" 503 504config SH_PCLK_FREQ 505 int "Peripheral clock frequency (in Hz)" 506 depends on SH_CLK_CPG_LEGACY 507 default "31250000" if CPU_SUBTYPE_SH7619 508 default "33333333" if CPU_SUBTYPE_SH7770 || \ 509 CPU_SUBTYPE_SH7760 || \ 510 CPU_SUBTYPE_SH7705 || \ 511 CPU_SUBTYPE_SH7203 || \ 512 CPU_SUBTYPE_SH7206 || \ 513 CPU_SUBTYPE_SH7263 || \ 514 CPU_SUBTYPE_MXG 515 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 516 default "50000000" 517 help 518 This option is used to specify the peripheral clock frequency. 519 This is necessary for determining the reference clock value on 520 platforms lacking an RTC. 521 522config SH_CLK_CPG 523 def_bool y 524 525config SH_CLK_CPG_LEGACY 526 depends on SH_CLK_CPG 527 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 528 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 529 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 530 !CPU_SUBTYPE_SH7269 531 532endmenu 533 534menu "CPU Frequency scaling" 535source "drivers/cpufreq/Kconfig" 536endmenu 537 538source "arch/sh/drivers/Kconfig" 539 540endmenu 541 542menu "Kernel features" 543 544source "kernel/Kconfig.hz" 545 546config ARCH_SUPPORTS_KEXEC 547 def_bool MMU 548 549config ARCH_SUPPORTS_CRASH_DUMP 550 def_bool BROKEN_ON_SMP 551 552config ARCH_DEFAULT_CRASH_DUMP 553 def_bool y 554 555config ARCH_SUPPORTS_KEXEC_JUMP 556 def_bool y 557 558config PHYSICAL_START 559 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 560 default MEMORY_START 561 help 562 This gives the physical address where the kernel is loaded 563 and is ordinarily the same as MEMORY_START. 564 565 Different values are primarily used in the case of kexec on panic 566 where the fail safe kernel needs to run at a different address 567 than the panic-ed kernel. 568 569config SMP 570 bool "Symmetric multi-processing support" 571 depends on SYS_SUPPORTS_SMP 572 help 573 This enables support for systems with more than one CPU. If you have 574 a system with only one CPU, say N. If you have a system with more 575 than one CPU, say Y. 576 577 If you say N here, the kernel will run on uni- and multiprocessor 578 machines, but will use only one CPU of a multiprocessor machine. If 579 you say Y here, the kernel will run on many, but not all, 580 uniprocessor machines. On a uniprocessor machine, the kernel 581 will run faster if you say N here. 582 583 People using multiprocessor machines who say Y here should also say 584 Y to "Enhanced Real Time Clock Support", below. 585 586 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 587 available at <https://www.tldp.org/docs.html#howto>. 588 589 If you don't know what to do here, say N. 590 591config NR_CPUS 592 int "Maximum number of CPUs (2-32)" 593 range 2 32 594 depends on SMP 595 default "4" if CPU_SUBTYPE_SHX3 596 default "2" 597 help 598 This allows you to specify the maximum number of CPUs which this 599 kernel will support. The maximum supported value is 32 and the 600 minimum value which makes sense is 2. 601 602 This is purely to save memory - each supported CPU adds 603 approximately eight kilobytes to the kernel image. 604 605config HOTPLUG_CPU 606 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 607 depends on SMP 608 help 609 Say Y here to experiment with turning CPUs off and on. CPUs 610 can be controlled through /sys/devices/system/cpu. 611 612config GUSA 613 def_bool y 614 depends on !SMP 615 help 616 This enables support for gUSA (general UserSpace Atomicity). 617 This is the default implementation for both UP and non-ll/sc 618 CPUs, and is used by the libc, amongst others. 619 620 For additional information, design information can be found 621 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 622 623 This should only be disabled for special cases where alternate 624 atomicity implementations exist. 625 626config GUSA_RB 627 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 628 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 629 help 630 Enabling this option will allow the kernel to implement some 631 atomic operations using a software implementation of load-locked/ 632 store-conditional (LLSC). On machines which do not have hardware 633 LLSC, this should be more efficient than the other alternative of 634 disabling interrupts around the atomic sequence. 635 636config HW_PERF_EVENTS 637 bool "Enable hardware performance counter support for perf events" 638 depends on PERF_EVENTS && CPU_HAS_PMU 639 default y 640 help 641 Enable hardware performance counter support for perf events. If 642 disabled, perf events will use software events only. 643 644source "drivers/sh/Kconfig" 645 646endmenu 647 648menu "Boot options" 649 650config BUILTIN_DTB 651 bool "Use builtin DTB" 652 default n 653 depends on SH_DEVICE_TREE 654 select GENERIC_BUILTIN_DTB 655 help 656 Link a device tree blob for particular hardware into the kernel, 657 suppressing use of the DTB pointer provided by the bootloader. 658 This option should only be used with legacy bootloaders that are 659 not capable of providing a DTB to the kernel, or for experimental 660 hardware without stable device tree bindings. 661 662config BUILTIN_DTB_NAME 663 string "Source file for builtin DTB" 664 default "" 665 depends on BUILTIN_DTB 666 help 667 Base name (without suffix, relative to arch/sh/boot/dts) for the 668 a DTS file that will be used to produce the DTB linked into the 669 kernel. 670 671config ZERO_PAGE_OFFSET 672 hex 673 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 674 SH_7751_SOLUTION_ENGINE 675 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 676 default "0x00002000" if PAGE_SIZE_8KB 677 default "0x00001000" 678 help 679 This sets the default offset of zero page. 680 681config BOOT_LINK_OFFSET 682 hex 683 default "0x00210000" if SH_SHMIN 684 default "0x00810000" if SH_7780_SOLUTION_ENGINE 685 default "0x009e0000" if SH_TITAN 686 default "0x01800000" if SH_SDK7780 687 default "0x02000000" if SH_EDOSK7760 688 default "0x00800000" 689 help 690 This option allows you to set the link address offset of the zImage. 691 This can be useful if you are on a board which has a small amount of 692 memory. 693 694config ENTRY_OFFSET 695 hex 696 default "0x00001000" if PAGE_SIZE_4KB 697 default "0x00002000" if PAGE_SIZE_8KB 698 default "0x00004000" if PAGE_SIZE_16KB 699 default "0x00010000" if PAGE_SIZE_64KB 700 default "0x00000000" 701 702config ROMIMAGE_MMCIF 703 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 704 depends on CPU_SUBTYPE_SH7724 705 help 706 Say Y here to include experimental MMCIF loading code in 707 romImage. With this enabled it is possible to write the romImage 708 kernel image to an MMC card and boot the kernel straight from 709 the reset vector. At reset the processor Mask ROM will load the 710 first part of the romImage which in turn loads the rest the kernel 711 image to RAM using the MMCIF hardware block. 712 713choice 714 prompt "Kernel command line" 715 default CMDLINE_OVERWRITE 716 help 717 Setting this option allows the kernel command line arguments 718 to be set. 719 720config CMDLINE_OVERWRITE 721 bool "Overwrite bootloader kernel arguments" 722 help 723 Given string will overwrite any arguments passed in by 724 a bootloader. 725 726config CMDLINE_EXTEND 727 bool "Extend bootloader kernel arguments" 728 help 729 Given string will be concatenated with arguments passed in 730 by a bootloader. 731 732config CMDLINE_FROM_BOOTLOADER 733 bool "Use bootloader kernel arguments" 734 help 735 Uses the command-line options passed by the boot loader. 736 737endchoice 738 739config CMDLINE 740 string "Kernel command line arguments string" 741 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 742 default "console=ttySC1,115200" 743 744endmenu 745 746menu "Bus options" 747 748config MAPLE 749 bool "Maple Bus support" 750 depends on SH_DREAMCAST 751 help 752 The Maple Bus is SEGA's serial communication bus for peripherals 753 on the Dreamcast. Without this bus support you won't be able to 754 get your Dreamcast keyboard etc to work, so most users 755 probably want to say 'Y' here, unless you are only using the 756 Dreamcast with a serial line terminal or a remote network 757 connection. 758 759endmenu 760 761menu "Power management options (EXPERIMENTAL)" 762 763source "kernel/power/Kconfig" 764 765source "drivers/cpuidle/Kconfig" 766 767endmenu 768