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/titanic_41/usr/src/uts/sfmmu/ml/
H A Dsfmmu_kdi.s70 srlx %g1, %g4, %g4; /* va >> hmeshift */ \
71 xor %g4, %g2, %g4; /* hash in g4 */ \
81 and %g4, %g5, %g4; \
82 mulx %g4, HMEBUCK_SIZE, %g4; /* g4 = off from hash_pa */ \
86 add %g4, %g5, %g4; \
91 and %g4, %g5, %g4; \
92 mulx %g4, HMEBUCK_SIZE, %g4; /* g4 = off from hash_pa */ \
95 add %g4, %g5, %g4; \
162 add %g4, HMEBUCK_NEXTPA, %g4; /* %g4 is hmebucket PA */ \
164 ldxa [%g4]ASI_MEM, %g4; \
[all …]
H A Dsfmmu_asm.s683 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
690 mov %g0, %g4 ! %g4 = ret = 0
702 mov %g0, %g4 ! %g4 = ret = 0
707 mov 1, %g4 !%g4 = ret = 1
734 SFMMU_MMUID_GNUM_CNUM(%g2, %g5, %g6, %g4)
741 mov %g0, %g4 ! %g4 = ret = 0
751 mov 1, %g4 ! %g4 = ret = 1
770 ld [%o3 + MMU_CTX_NCTXS], %g4
785 cmp %o1, %g4
793 mov %g0, %g4 ! %g4 = ret = 0
[all …]
/titanic_41/usr/src/cmd/mdb/sparc/v9/kmdb/
H A Dkaif_resume.s82 add %g6, KRS_FPREGS, %g4 ! %g4 = &cpusave[this_cpuid].krs_fpregs
84 ldx [%g4 + FPU_FPRS], %g2
89 LOAD_FPREGS(%g4)
90 ldx [%g4 + FPU_FSR], %fsr
94 GET_NWIN(%g1, %g4); ! %g1 is scratch, %g4 set to nwin-1
95 wrpr %g4, %cleanwin
97 sub %g4, 1, %g1
111 cmp %g2, %g4
116 ldx [%g5 + KREG_OFF(KREG_CWP)], %g4
117 wrpr %g4, %cwp
[all …]
H A Dkaif_startup.s126 * %g4 - the %pstate value to get us back to our current globals set
127 * %g4 not applicable on sun4v as it uses %gl
157 stx %g4, [%o5 + KREG_OFF(KREG_G4)]
186 ldx [%g5 + KREG_OFF(KREG_PC)], %g4
187 ADD_CRUMB(%g6, KRM_PC, %g4, %g1)
188 ldx [%g5 + KREG_OFF(KREG_TT)], %g4
189 ADD_CRUMB(%g6, KRM_TT, %g4, %g1)
219 rdpr %pil, %g4
220 stx %g4, [%g5 + KREG_OFF(KREG_PIL)]
223 rd %y, %g4
[all …]
/titanic_41/usr/src/uts/sun4v/ml/
H A Dmach_interrupt.s70 ! %g4 queue size mask
75 mov CPU_MONDO_Q_TL, %g4
76 ldxa [%g4]ASI_QUEUE, %g7 ! %g7 = tail ptr
84 ldx [%g2 + MCPU_CPU_Q_SIZE], %g4 ! queue size
85 sub %g4, 1, %g4 ! %g4 = queue size mask
452 rdpr %pil, %g4
453 cmp %g4, PIL_14
455 movl %icc, PIL_14, %g4
464 1: mov CPU_RQ_HD, %g4
465 stxa %g3, [%g4]ASI_QUEUE ! set head equal to tail
[all …]
H A Dtrap_table.s129 sub %g0, 1, %g4 ;\
165 sub %g0, 1, %g4 ;\
184 sub %g0, 1, %g4 ;\
234 sub %g0, 1, %g4 ;\
245 sub %g0, 1, %g4 ;\
252 sub %g0, 1, %g4 ;\
338 add %sp, 16, %g4 ;\
339 sta %l4, [%g4 + %g0]asi_num ;\
340 sta %l5, [%g4 + %g1]asi_num ;\
341 sta %l6, [%g4 + %g2]asi_num ;\
[all …]
H A Dmach_xc.s79 TRACE_PTR(%g4, %g6)
81 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
83 stha %g6, [%g4 + TRAP_ENT_TL]%asi
85 stha %g6, [%g4 + TRAP_ENT_TT]%asi
86 stna %o3, [%g4 + TRAP_ENT_TR]%asi ! pc of the TL>0 handler
88 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
90 stxa %g6, [%g4 + TRAP_ENT_TSTATE]%asi
91 stna %sp, [%g4 + TRAP_ENT_SP]%asi
92 stna %o1, [%g4 + TRAP_ENT_F1]%asi ! arg 1
93 stna %o2, [%g4 + TRAP_ENT_F2]%asi ! arg 2
[all …]
/titanic_41/usr/src/uts/sun4u/cpu/
H A Dus3_cheetah_asm.s118 ldxa [%g0]ASI_ESTATE_ERR, %g4
119 and %g4, EN_REG_CEEN, %g4
121 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
145 set CH_ECACHE_8M_SIZE, %g4
156 CH_ECACHE_FLUSHALL(%g4, %g5, %g6)
175 ASM_LD(%g4, dcache_size)
177 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
198 ASM_LD(%g4, icache_size)
200 CH_ICACHE_FLUSHALL(%g4, %g5, %g6, %g3)
224 ld [%g6 + TRAPTR_OFFSET], %g4
[all …]
H A Dus3_cheetahplus_asm.s189 ldxa [%g0]ASI_ESTATE_ERR, %g4
190 and %g4, EN_REG_CEEN, %g4
192 DO_TL1_CPU_LOGOUT(%g3, %g2, %g4, %g5, %g6, %g3, %g4)
216 PN_L2_FLUSHALL(%g3, %g4, %g5)
218 set CH_ECACHE_MAX_SIZE, %g4
225 set PN_L3_SIZE, %g4
228 CHP_ECACHE_FLUSHALL(%g4, %g5, %g3)
247 ASM_LD(%g4, dcache_size)
249 CH_DCACHE_FLUSHALL(%g4, %g5, %g6)
274 set CH_ICACHE_SIZE, %g4
[all …]
H A Dus3_jalapeno_asm.s409 andn %g3, EN_REG_NCEEN + EN_REG_CEEN, %g4
410 stxa %g4, [%g0]ASI_ESTATE_ERR
426 and %g3, EN_REG_CEEN, %g4 ! store the CEEN value, TL=0
428 DO_CPU_LOGOUT(%g3, %g2, %g6, %g4, %g5, %g6, %g3, %g4)
435 CPU_INDEX(%g4, %g5)
436 mulx %g4, CPU_NODE_SIZE, %g4
438 add %g4, %g5, %g4
439 ld [%g4 + ECACHE_LINESIZE], %g5
440 ld [%g4 + ECACHE_SIZE], %g4
449 ECACHE_FLUSHALL(%g4, %g5, %g6, %g7)
[all …]
H A Dus3_common_asm.s319 ldub [%g2 + SFMMU_CEXT], %g4 ! %g4 = sfmmup->cext
320 sll %g4, CTXREG_EXT_SHIFT, %g4
321 or %g6, %g4, %g6 ! %g6 = pgsz | cnum
323 set MMU_PCONTEXT, %g4
324 ldxa [%g4]ASI_DMMU, %g5 /* rd old ctxnum */
328 stxa %g6, [%g4]ASI_DMMU /* wr new ctxum */
331 stxa %g5, [%g4]ASI_DMMU /* restore old ctxnum */
362 set SFMMU_PGCNT_MASK, %g4
363 and %g4, %g2, %g3 /* g3 = pgcnt - 1 */
369 sethi %hi(ksfmmup), %g4
[all …]
/titanic_41/usr/src/uts/sun4u/ml/
H A Dmach_interrupt.s77 set KERNELBASE, %g4
78 cmp %g5, %g4
84 set _end, %g4 ! _end is highest kernel address
85 cmp %g5, %g4
95 set CTXREG_CTX_MASK, %g4 ! check Pcontext
96 btst %g4, %g1
123 ! g4: arg4
130 TRACE_PTR(%g4, %g6)
132 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
134 stha %g6, [%g4 + TRAP_ENT_TL]%asi
[all …]
H A Dmach_xc.s77 TRACE_PTR(%g4, %g6)
79 stxa %g6, [%g4 + TRAP_ENT_TICK]%asi
81 stha %g6, [%g4 + TRAP_ENT_TL]%asi
83 stha %g6, [%g4 + TRAP_ENT_TT]%asi
84 stna %o3, [%g4 + TRAP_ENT_TR]%asi ! pc of the TL>0 handler
86 stna %g6, [%g4 + TRAP_ENT_TPC]%asi
88 stxa %g6, [%g4 + TRAP_ENT_TSTATE]%asi
89 stna %sp, [%g4 + TRAP_ENT_SP]%asi
90 stna %o1, [%g4 + TRAP_ENT_F1]%asi ! arg 1
91 stna %o2, [%g4 + TRAP_ENT_F2]%asi ! arg 2
[all …]
H A Dtrap_table.s128 sub %g0, 1, %g4 ;\
160 sub %g0, 1, %g4 ;\
179 sub %g0, 1, %g4 ;\
201 sub %g0, 1, %g4 ;\
241 sub %g0, 1, %g4 ;\
252 sub %g0, 1, %g4 ;\
259 sub %g0, 1, %g4 ;\
345 add %sp, 16, %g4 ;\
346 sta %l4, [%g4 + %g0]asi_num ;\
347 sta %l5, [%g4 + %g1]asi_num ;\
[all …]
H A Dzulu_asm.s79 add %g7, ZULUVM_STATE, %g4
82 casa [%g4]ASI_N, %g1, %g6
93 st %g1, [%g4]
102 ldx [%g7 + ZULUVM_ASM_TLB_TYPE], %g4
103 and %g4, ZULUVM_DMA_MASK, %g4
105 cmp %g4, ZULUVM_DMA2
108 cmp %g4, ZULUVM_ITLB1
111 cmp %g4, ZULUVM_ITLB2
155 srlx %g3, 3, %g4
156 and %g4, 1, %g4 ! %g4 write perm
[all …]
/titanic_41/usr/src/common/crypto/des/sun4u/
H A Ddes_crypt_asm.s2306 srlx %g2, 7, %g4
2312 or %g2, %g4, %g2
2359 ldx [%i5 + 104], %g4 ! mid_4
2380 and %o0, %g4, %o0
2384 and %o1, %g4, %o1
2411 srl %i2, 0, %g4
2424 or %g4, %g5, %g4
2427 and %g4, %g3, %g1
2431 and %g4, %g2, %g2
2433 srlx %g2, 7, %g4
[all …]
/titanic_41/usr/src/uts/sun4u/sunfire/ml/
H A Dsysctrl_asm.s72 CPU_INDEX(%g4, %g5)
73 sll %g4, 2, %g4
74 add %g4, %g1, %g4 ! compute address of gate id
76 st %g4, [%g4] ! indicate we are ready
83 ld [%g2], %g4
84 brz,pt %g4, 1b ! spin until barrier true
/titanic_41/usr/src/uts/sparc/v9/ml/
H A Dsyscall_trap.s169 sll %g1, SYSENT_SHIFT, %g4 ! delay - get index
170 add %g3, %g4, %l4
192 andn %g5, PSTATE_IE | PSTATE_AM, %g4
193 wrpr %g0, %g4, %pstate ! disable interrupt
194 TRACE_PTR(%g4, %g2) ! get trace pointer
196 stxa %g2, [%g4 + TRAP_ENT_TICK]%asi
198 TRACE_SAVE_TL_VAL(%g4, %g2)
199 TRACE_SAVE_GL_VAL(%g4, %g0)
201 stha %g2, [%g4 + TRAP_ENT_TT]%asi
203 stna %g2, [%g4 + TRAP_ENT_TPC]%asi
[all …]
/titanic_41/usr/src/uts/sparc/dtrace/
H A Ddtrace_asm.s203 sethi %hi(nwin_minus_one), %g4
204 ld [%g4 + %lo(nwin_minus_one)], %g4
217 add %g4, %g3, %g3
221 mov %i7, %g4
224 mov %g4, %o0
254 mov %l0, %g4
255 mov %l1, %g4
256 mov %l2, %g4
257 mov %l3, %g4
258 mov %l4, %g4
[all …]
/titanic_41/usr/src/lib/libc/sparc/gen/
H A Dstrlcpy.s59 subcc %g0, %i2, %g4 ! n = -n or n == 0 ?
68 ldub [%i3 + %g4], %l1 ! l1 = src[]
70 stub %l1, [%i2 + %g4] ! dst[] = src[]
72 add %i2, %g4, %i2 ! get single dest ptr for strlen
73 addcc %g4, 1, %g4 ! src++ dest++ n--
81 add %i2, %g4, %l0 ! l0 = dest
89 ld [%i3 + %g4], %l1 ! l1 = src[]
90 addcc %g4, 4, %g4 ! n += 4, src += 4, dst +=4
96 st %l1, [%i2 + %g4] ! dst[] = src[]
99 add %i2, %g4, %i2 ! ptr to dest
[all …]
/titanic_41/usr/src/common/bignum/sun4u/
H A Dmont_mulf_v9.s249 /* 0x0034 */ sub %g5,1,%g4
274 /* 0x0068 86 */ cmp %g4,7
280 /* 0x0080 90 */ or %g0,40,%g4
290 /* 0x00a8 */ ldd [%i1+%g4],%f2
291 /* 0x00ac */ or %g0,56,%g4
309 /* 0x00f4 */ ldd [%l2+%g4],%f2
311 /* 0x00fc 91 */ and %g5,%l3,%g4
328 /* 0x013c 91 */ sllx %g4,16,%o4
329 /* 0x0140 96 */ add %i2,2,%g4
341 /* 0x0170 87 */ sra %g4,0,%o1
[all …]
/titanic_41/usr/src/lib/libc/sparcv9/gen/
H A Dstrncpy.s69 subcc %g0, %o2, %g4 ! n = -n, n == 0 ?
78 ldub [%o3 + %g4], %o1 ! src[]
79 stb %o1, [%o2 + %g4] ! dst[] = src[]
80 addcc %g4, 1, %g4 ! src++, dst++, n--
84 add %o2, %g4, %o3 ! need single dest pointer for fill
110 ldx [%o3 + %g4], %o1 ! src dword
111 addcc %g4, 8, %g4 ! n += 8, src += 8, dst += 8
117 stx %o1, [%o2 + %g4] ! store word to dst (address pre-incremented)
123 add %o2, %g4, %o3 ! pointer to dest string
153 addcc %g4, 16, %g0 ! number of pad bytes < 16 ?
[all …]
H A Dstrlcpy.s62 subcc %g0, %i2, %g4 ! n = -n, n == 0 ?
71 ldub [%i3 + %g4], %l1 ! src[]
73 stub %l1, [%i2 + %g4] ! dst[] = src[]
75 add %i2, %g4, %i2 ! need single dest pointer for strlen
76 addcc %g4, 1, %g4 ! src++, dst++, n--
103 ldx [%i3 + %g4], %l1 ! src dword
104 addcc %g4, 8, %g4 ! n += 8, src += 8, dst += 8
110 stx %l1, [%i2 + %g4] ! store word to dst (address pre-incremented)
118 add %i2, %g4, %i2 ! pointer to dest string
169 add %i2, %g4, %i2 ! we want a single dst pointer here
[all …]
/titanic_41/usr/src/uts/sun4u/starfire/ml/
H A Didn_asm.s223 rd %tick, %g4
224 add %g2, %g4, %g2
226 cmp %g2, %g4
228 rd %tick, %g4
297 ldx [%g1 + IDN_DMV_QBASE], %g4 ! g4 = idn_dmv_qbase
313 add %g5, %g4, %g5 ! g5 = idn_dmv_current
317 sub %g3, IDN_DMV_CURRENT, %g4
322 add %g4, IDN_DMV_LOSTINTR, %g3
328 set dmv_finish_intr, %g4
330 jmp %g4
[all …]
/titanic_41/usr/src/common/crypto/arcfour/sun4u/
H A Darcfour_crypt_asm.s98 ldub [%i5 + %g2], %g4
105 add %g3, %g4, %g5
108 stb %g4, [%i5 + %g1]
137 ldub [%i5 + %g2], %g4
144 add %g3, %g4, %g5
147 stb %g4, [%i5 + %g1]
177 ldub [%i5 + %g2], %g4
184 add %g3, %g4, %g5
187 stb %g4, [%i5 + %g1]
219 ldub [%i5 + %g2], %g4
[all …]

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