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Searched refs:vco (Results 1 – 25 of 40) sorted by relevance

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/linux/drivers/clk/spear/
H A Dclk-vco-pll.c94 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) { in clk_pll_round_rate_index()
97 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index()
131 if (pll->vco->lock) in clk_pll_recalc_rate()
132 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_recalc_rate()
134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate()
136 if (pll->vco->lock) in clk_pll_recalc_rate()
137 spin_unlock_irqrestore(pll->vco->lock, flags); in clk_pll_recalc_rate()
148 struct pll_rate_tbl *rtbl = pll->vco->rtbl; in clk_pll_set_rate()
154 if (pll->vco->lock) in clk_pll_set_rate()
155 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_set_rate()
[all …]
H A DMakefile6 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
/linux/drivers/clk/versatile/
H A Dclk-icst.c63 static int vco_get(struct clk_icst *icst, struct icst_vco *vco) in vco_get() argument
81 vco->v = val & INTEGRATOR_AP_CM_BITS; in vco_get()
82 vco->r = 22; in vco_get()
83 vco->s = 1; in vco_get()
96 vco->v = val & INTEGRATOR_AP_SYS_BITS; in vco_get()
97 vco->r = 46; in vco_get()
98 vco->s = 3; in vco_get()
113 vco->v = divxy ? 17 : 14; in vco_get()
114 vco->r = divxy ? 22 : 14; in vco_get()
115 vco->s = 1; in vco_get()
[all …]
H A Dicst.c27 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco) in icst_hz() argument
29 u64 dividend = p->ref * 2 * (u64)(vco.v + 8); in icst_hz()
30 u32 divisor = (vco.r + 2) * p->s2div[vco.s]; in icst_hz()
49 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max }; in icst_hz_to_vco() local
66 return vco; in icst_hz_to_vco()
68 vco.s = p->idx2s[i]; in icst_hz_to_vco()
91 vco.v = vd - 8; in icst_hz_to_vco()
92 vco.r = rd - 2; in icst_hz_to_vco()
99 return vco; in icst_hz_to_vco()
H A Dicst.h30 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco);
/linux/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c362 unsigned int vco; in intel_hpll_vco() local
382 vco = vco_table[tmp & 0x7]; in intel_hpll_vco()
383 if (vco == 0) in intel_hpll_vco()
387 drm_dbg_kms(display->drm, "HPLL VCO %u kHz\n", vco); in intel_hpll_vco()
389 return vco; in intel_hpll_vco()
404 cdclk_config->vco = intel_hpll_vco(display); in g33_get_cdclk()
413 switch (cdclk_config->vco) { in g33_get_cdclk()
430 cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, in g33_get_cdclk()
437 cdclk_config->vco, tmp); in g33_get_cdclk()
486 cdclk_config->vco = intel_hpll_vco(display); in i965gm_get_cdclk()
[all …]
/linux/drivers/clk/berlin/
H A Dberlin2-avpll.c115 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_is_enabled() local
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
127 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_enable() local
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
131 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_enable()
135 writel_relaxed(reg, vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
142 struct berlin2_avpll_vco *vco = to_avpll_vco(hw); in berlin2_avpll_vco_disable() local
145 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable()
146 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_disable()
[all …]
/linux/drivers/clk/
H A Dclk-si544.c203 u64 vco; in si544_calc_muldiv() local
228 vco = FVCO_MIN + ls_freq - 1; in si544_calc_muldiv()
229 do_div(vco, ls_freq); in si544_calc_muldiv()
230 settings->hs_div = vco; in si544_calc_muldiv()
238 vco = (u64)ls_freq * settings->hs_div; in si544_calc_muldiv()
241 tmp = do_div(vco, FXO); in si544_calc_muldiv()
242 settings->fb_div_int = vco; in si544_calc_muldiv()
245 vco = (u64)tmp << 32; in si544_calc_muldiv()
246 vco += FXO / 2; /* Round to nearest multiple */ in si544_calc_muldiv()
247 do_div(vco, FXO); in si544_calc_muldiv()
[all …]
H A Dclk-stm32f4.c937 const struct stm32f4_vco_data *vco; in stm32f4_rcc_register_pll() local
944 vco = &vco_data[data->pll_num]; in stm32f4_rcc_register_pll()
946 init.name = vco->vco_name; in stm32f4_rcc_register_pll()
954 pll->gate.bit_idx = vco->bit_idx; in stm32f4_rcc_register_pll()
957 pll->offset = vco->offset; in stm32f4_rcc_register_pll()
959 pll->bit_rdy_idx = vco->bit_rdy_idx; in stm32f4_rcc_register_pll()
960 pll->status = (readl(base + STM32F4_RCC_CR) >> vco->bit_idx) & 0x1; in stm32f4_rcc_register_pll()
974 vco->vco_name, in stm32f4_rcc_register_pll()
/linux/drivers/clk/pistachio/
H A Dclk-pll.c203 u64 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_frac_set_rate() local
214 vco = params->fref; in pll_gf40lp_frac_set_rate()
215 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate()
216 vco = div64_u64(vco, params->refdiv << 24); in pll_gf40lp_frac_set_rate()
218 if (vco < MIN_VCO_FRAC_FRAC || vco > MAX_VCO_FRAC_FRAC) in pll_gf40lp_frac_set_rate()
219 pr_warn("%s: VCO %llu is out of range %lu..%lu\n", name, vco, in pll_gf40lp_frac_set_rate()
226 if (val > vco / 16) in pll_gf40lp_frac_set_rate()
228 name, val, vco / 16); in pll_gf40lp_frac_set_rate()
360 u32 val, vco, old_postdiv1, old_postdiv2; in pll_gf40lp_laint_set_rate() local
370 vco = div_u64(params->fref * params->fbdiv, params->refdiv); in pll_gf40lp_laint_set_rate()
[all …]
/linux/drivers/clk/bcm/
H A Dclk-iproc-pll.c277 struct iproc_pll_vco_param *vco) in pll_fractional_change_only() argument
293 if (ndiv_int != vco->ndiv_int) in pll_fractional_change_only()
299 if (pdiv != vco->pdiv) in pll_fractional_change_only()
305 static int pll_set_rate(struct iproc_clk *clk, struct iproc_pll_vco_param *vco, in pll_set_rate() argument
311 unsigned long rate = vco->rate; in pll_set_rate()
321 if (vco->pdiv == 0) in pll_set_rate()
324 ref_freq = parent_rate / vco->pdiv; in pll_set_rate()
354 if (pll_fractional_change_only(clk->pll, vco)) { in pll_set_rate()
360 val |= vco->ndiv_frac << ctrl->ndiv_frac.shift; in pll_set_rate()
397 val |= vco->ndiv_int << ctrl->ndiv_int.shift; in pll_set_rate()
[all …]
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c39 .vco = {.min = 1800000, .max = 3600000},
51 .vco = {.min = 1800000, .max = 3600000},
66 .vco = {.min = 1809000, .max = 3564000},
78 .vco = {.min = 1800000, .max = 3600000},
90 .vco = {.min = 1809000, .max = 3564000},
102 .vco = {.min = 1800000, .max = 3600000},
291 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
294 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
297 } else if (clock->vco < 3300000) { in cdv_dpll_set_clock_cdv()
398 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock()
[all …]
H A Dgma_display.h26 int vco; member
41 struct gma_range_t dot, vco, n, m, m1, m2, p, p1; member
H A Dpsb_intel_display.c30 .vco = {.min = 1400000, .max = 2800000},
42 .vco = {.min = 1400000, .max = 2800000},
73 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock()
74 clock->dot = clock->vco / clock->p; in psb_intel_clock()
H A Doaktrail_hdmi.c109 struct intel_range vco, np, nr, nf; member
129 .vco = { .min = VCO_MIN, .max = VCO_MAX },
185 np_min = DIV_ROUND_UP(oaktrail_hdmi_limit.vco.min, target * 10); in oaktrail_hdmi_find_dpll()
186 np_max = oaktrail_hdmi_limit.vco.max / (target * 10); in oaktrail_hdmi_find_dpll()
/linux/arch/powerpc/boot/
H A D4xx.c406 u32 cpu, plb, opb, ebc, vco; in __ibm440eplike_fixup_clocks() local
433 vco = sys_clk * m; in __ibm440eplike_fixup_clocks()
434 clk_a = vco / fwdva; in __ibm440eplike_fixup_clocks()
435 clk_b = vco / fwdvb; in __ibm440eplike_fixup_clocks()
439 vco = 0; in __ibm440eplike_fixup_clocks()
/linux/drivers/clk/mediatek/
H A Dclk-pll.c54 u64 vco; in __mtk_pll_recalc_rate() local
62 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()
64 if (pcwfbits && (vco & GENMASK(pcwfbits - 1, 0))) in __mtk_pll_recalc_rate()
67 vco >>= pcwfbits; in __mtk_pll_recalc_rate()
70 vco++; in __mtk_pll_recalc_rate()
72 return ((unsigned long)vco + postdiv - 1) / postdiv; in __mtk_pll_recalc_rate()
/linux/drivers/clk/sophgo/
H A Dclk-sg2044-pll.c219 u64 vco = sg2044_pll_calc_vco_rate(parent_rate, in sg2044_compute_pll_setting() local
221 if (!sg2044_clk_fit_limit(vco, &limits[PLL_LIMIT_FOUTVCO])) in sg2044_compute_pll_setting()
341 u64 vco; in sg2044_pll_set_rate() local
349 vco = sg2044_pll_calc_vco_rate(parent_rate, in sg2044_pll_set_rate()
363 sg2044_pll_update_vcosel(pll, vco); in sg2044_pll_set_rate()
/linux/arch/arm/boot/dts/arm/
H A Darm-realview-pb11mp.dts346 vco-offset = <0x0C>;
354 vco-offset = <0x10>;
362 vco-offset = <0x14>;
370 vco-offset = <0x18>;
378 vco-offset = <0x1c>;
386 vco-offset = <0xd4>;
394 vco-offset = <0xd8>;
H A Darm-realview-eb.dtsi237 vco-offset = <0x0C>;
245 vco-offset = <0x10>;
253 vco-offset = <0x14>;
261 vco-offset = <0x18>;
269 vco-offset = <0x1c>;
H A Dintegratorap.dts88 vco-offset = <0x08>;
98 vco-offset = <0x1c>;
119 vco-offset = <0x04>;
129 vco-offset = <0x04>;
H A Darm-realview-pbx.dtsi259 vco-offset = <0x0C>;
267 vco-offset = <0x10>;
275 vco-offset = <0x14>;
283 vco-offset = <0x18>;
291 vco-offset = <0x1c>;
H A Dintegratorcp.dts100 vco-offset = <0x08>;
110 vco-offset = <0x08>;
120 vco-offset = <0x1c>;
H A Darm-realview-pb1176.dts263 vco-offset = <0x0C>;
271 vco-offset = <0x10>;
279 vco-offset = <0x14>;
287 vco-offset = <0x18>;
295 vco-offset = <0x1c>;
/linux/drivers/media/tuners/
H A Dmax2165.c224 u8 vco, vco_sub_band, adc; in max2165_debug_status() local
236 vco = autotune >> 6; in max2165_debug_status()
246 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); in max2165_debug_status()

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