| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 217 if (pipe->stream->timing.v_addressable != pipe->stream->dst.height || in dcn32_is_center_timing()
218 pipe->stream->timing.v_addressable != pipe->stream->src.height) { in dcn32_is_center_timing()
223 if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && in dcn32_is_center_timing()
224 pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { in dcn32_is_center_timing()
265 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
278 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
452 curr_v_blank = timing->v_total - timing->v_addressable; in get_frame_rate_at_max_stretch_100hz()
596 pipe->stream->timing.v_addressable == height && in dcn32_check_native_scaling_for_res()
624 if (pipe->stream->timing.v_addressable == 1080 && pipe->stream->timing.h_addressable == 1920) in disallow_subvp_in_active_plus_blank()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 94 …timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.… in populate_dml21_timing_config_from_stream_state()
117 timing->v_blank_end = vblank_start - stream->timing.v_addressable in populate_dml21_timing_config_from_stream_state()
371 surface->plane0.height = stream->timing.v_addressable; in populate_dml21_dummy_surface_cfg()
373 surface->plane1.height = stream->timing.v_addressable; in populate_dml21_dummy_surface_cfg()
393 if (stream->timing.v_addressable > 2160) in populate_dml21_dummy_plane_cfg()
396 height = stream->timing.v_addressable; // 4K max in populate_dml21_dummy_plane_cfg()
640 stream->dst.height >= stream->timing.v_addressable; in populate_dml21_plane_config_from_plane_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 108 (timing->v_total - timing->v_addressable - in dce120_timing_generator_validate_timing()
436 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
628 timing->v_total - timing->v_addressable - in dce120_timing_generator_enable_advanced_request()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator_v.c | 247 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce110_timing_generator_v_program_blanking()
310 tmp = tmp + timing->v_addressable + timing->v_border_top + in dce110_timing_generator_v_program_blanking()
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| H A D | dce110_timing_generator.c | 291 uint32_t v_sync_start = dc_crtc_timing->v_addressable + vsync_offset; in dce110_timing_generator_program_timing_generator()
313 bp_params.v_addressable = patched_crtc_timing.v_addressable; in dce110_timing_generator_program_timing_generator()
606 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce110_timing_generator_program_blanking()
691 tmp = tmp + timing->v_addressable + timing->v_border_top + in dce110_timing_generator_program_blanking()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/ |
| H A D | dcn201_optc.c | 79 v_blank = (timing->v_total - timing->v_addressable - in optc201_validate_timing()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 182 uint32_t v_addressable; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 422 input->dest.vactive = pipe->stream->timing.v_addressable + pipe->stream->timing.v_border_top in pipe_ctx_to_e2e_pipe_params()
441 - pipe->stream->timing.v_addressable in pipe_ctx_to_e2e_pipe_params()
907 v->vactive[input_idx] = pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
921 v->viewport_height[input_idx] = pipe->stream->timing.v_addressable; in dcn_validate_bandwidth()
1216 vesa_sync_start = pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
1227 pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 290 hw_crtc_timing.v_addressable /= 2; in dce110_stream_encoder_dp_set_stream_attribute()
472 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dce110_stream_encoder_dp_set_stream_attribute()
499 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in dce110_stream_encoder_dp_set_stream_attribute()
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| H A D | dce_clk_mgr.c | 560 - stream->timing.v_addressable); in dce110_get_min_vblank_time_us()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 616 …mall_region_us = div64_u64(((uint64_t)phantom_timing->v_addressable * phantom_timing->h_total * 10… in populate_subvp_cmd_drr_info()
624 …subvp_active_us = div64_u64(((uint64_t)main_timing->v_addressable * main_timing->h_total * 1000000… in populate_subvp_cmd_drr_info()
626 drr_active_us = div64_u64(((uint64_t)drr_timing->v_addressable * drr_timing->h_total * 1000000), in populate_subvp_cmd_drr_info()
696 …ng.v_total - vblank_pipe->stream->timing.v_front_porch - vblank_pipe->stream->timing.v_addressable; in populate_subvp_cmd_vblank_pipe_info()
808 main_timing->v_total - main_timing->v_front_porch - main_timing->v_addressable; in populate_subvp_cmd_pipe_info()
809 pipe_data->pipe_config.subvp_data.mall_region_lines = phantom_timing->v_addressable; in populate_subvp_cmd_pipe_info()
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| H A D | dc_hw_types.h | 948 uint32_t v_addressable; member
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | command_table.c | 2151 params.usV_Disp = cpu_to_le16((uint16_t)(bp_params->v_addressable)); in set_crtc_timing_v1()
2225 params.usV_Size = cpu_to_le16((uint16_t)bp_params->v_addressable); in set_crtc_using_dtd_timing_v3()
2228 cpu_to_le16((uint16_t)(bp_params->v_total - bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
2239 cpu_to_le16((uint16_t)(bp_params->v_sync_start - bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
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| /linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_panel_replay.c | 331 cmd.pr_copy_settings.data.dsc_slice_height = (pipe_ctx->stream->timing.v_addressable + in dp_pr_copy_settings()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 463 v_active = timing->v_border_top + timing->v_addressable + timing->v_border_bottom; in get_vertical_back_porch()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 430 v_active = timing->v_border_top + timing->v_addressable + timing->v_border_bottom; in get_vertical_back_porch()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 838 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in link_set_dsc_on_stream()
971 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in link_set_dsc_pps_packet()
1916 && (stream->timing.v_addressable == 480); in enable_link_hdmi()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc.c | 732 param.windowa_y_end = pipe->stream->timing.v_addressable; in dc_stream_configure_crc()
736 param.windowb_y_end = pipe->stream->timing.v_addressable; in dc_stream_configure_crc()
1896 if (crtc_timing->v_addressable != hw_crtc_timing.v_addressable) { in dc_validate_boot_timing()
2296 context->streams[i]->timing.v_addressable, in dc_commit_state_no_check()
7095 state->optc[i].otg_v_blank_start = timing->v_addressable; in dc_capture_register_software_state()
7097 state->optc[i].otg_v_sync_start = timing->v_addressable + timing->v_front_porch; in dc_capture_register_software_state()
7098 …state->optc[i].otg_v_sync_end = timing->v_addressable + timing->v_front_porch + timing->v_sync_wid… in dc_capture_register_software_state()
7141 state->optc[i].otg_vstartup_start = timing->v_addressable + 10; in dc_capture_register_software_state()
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| H A D | dc_resource.c | 657 if (stream1->timing.v_addressable in resource_are_streams_timing_synchronizable()
658 != stream2->timing.v_addressable) in resource_are_streams_timing_synchronizable()
987 *dpp_offset = pipe_ctx->stream->timing.v_addressable / VISUAL_CONFIRM_DPP_OFFSET_DENO; in calculate_adjust_recout_for_visual_confirm()
2226 odm_slice_dst.height = stream->timing.v_addressable + in resource_get_odm_slice_dst_rect()
4827 tg->v_addressable - tg->v_border_top); in adaptive_sync_override_dp_info_packets_sdp_line_num()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 208 …vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in hubp401_vready_at_or_After_vsync()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| H A D | dcn32_clk_mgr.c | 497 pipe->stream->timing.v_addressable == height && in dcn32_check_native_scaling()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce110/ |
| H A D | dce110_resource.c | 992 context->streams[0]->timing.v_addressable, in dce110_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1397 stream->timing.v_addressable in build_audio_output()
2271 params.source_view_height = pipe_ctx->stream->timing.v_addressable; in enable_fbc()
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.c | 1109 hubp->cur_rect.h = param->stream->timing.v_addressable; in hubp2_cursor_set_position()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| H A D | dcn401_clk_mgr.c | 402 pipe->stream->timing.v_addressable == height && in dcn401_check_native_scaling()
|