| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_mall_phantom.c | 70 mall_alloc_height_blk_aligned = (pipe->stream->timing.v_addressable - 1 + mblk_height - 1) / in dml2_helper_calculate_num_ways_for_subvp()
378 phantom->timing.v_addressable; in subvp_subvp_schedulable()
396 …vactive1_us = ((subvp_pipes[0]->stream->timing.v_addressable * subvp_pipes[0]->stream->timing.h_to… in subvp_subvp_schedulable()
398 …vactive2_us = ((subvp_pipes[1]->stream->timing.v_addressable * subvp_pipes[1]->stream->timing.h_to… in subvp_subvp_schedulable()
400 …k1_us = (((subvp_pipes[0]->stream->timing.v_total - subvp_pipes[0]->stream->timing.v_addressable) * in subvp_subvp_schedulable()
403 …k2_us = (((subvp_pipes[1]->stream->timing.v_total - subvp_pipes[1]->stream->timing.v_addressable) * in subvp_subvp_schedulable()
467 subvp_active_us = main_timing->v_addressable * main_timing->h_total / in dml2_svp_drr_schedulable()
472 mall_region_us = phantom_timing->v_addressable * phantom_timing->h_total / in dml2_svp_drr_schedulable()
475 drr_stretched_vblank_us = (drr_timing->v_total - drr_timing->v_addressable) * drr_timing->h_total / in dml2_svp_drr_schedulable()
566 mall_region_us = phantom_timing->v_addressable * phantom_timing->h_total / in subvp_vblank_schedulable()
[all …]
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| H A D | dml2_translation_helper.c | 713 …out->VActive[location] = in->timing.v_addressable + in->timing.v_border_bottom + in->timing.v_bord… in populate_dml_timing_cfg_from_stream_state()
729 - in->timing.v_addressable in populate_dml_timing_cfg_from_stream_state()
851 out->SurfaceHeightY[location] = in->timing.v_addressable; in populate_dummy_dml_surface_cfg()
853 out->SurfaceHeightC[location] = in->timing.v_addressable; in populate_dummy_dml_surface_cfg()
967 if (in->timing.v_addressable > 2160) in populate_dummy_dml_plane_cfg()
970 height = in->timing.v_addressable; // 4K max in populate_dummy_dml_plane_cfg()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 217 if (pipe->stream->timing.v_addressable != pipe->stream->dst.height || in dcn32_is_center_timing()
218 pipe->stream->timing.v_addressable != pipe->stream->src.height) { in dcn32_is_center_timing()
223 if (pipe->stream->timing.v_addressable != pipe->plane_state->dst_rect.height && in dcn32_is_center_timing()
224 pipe->stream->timing.v_addressable != pipe->plane_state->src_rect.height) { in dcn32_is_center_timing()
265 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
278 …if (pipe_ctx->stream->timing.v_addressable == 1080 && pipe_ctx->stream->timing.h_addressable == 19… in override_det_for_subvp()
452 curr_v_blank = timing->v_total - timing->v_addressable; in get_frame_rate_at_max_stretch_100hz()
596 pipe->stream->timing.v_addressable == height && in dcn32_check_native_scaling_for_res()
624 if (pipe->stream->timing.v_addressable == 1080 && pipe->stream->timing.h_addressable == 1920) in disallow_subvp_in_active_plus_blank()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_translation_helper.c | 349 …timing->v_active = stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.… in populate_dml21_timing_config_from_stream_state()
370 timing->v_blank_end = vblank_start - stream->timing.v_addressable in populate_dml21_timing_config_from_stream_state()
608 surface->plane0.height = stream->timing.v_addressable; in populate_dml21_dummy_surface_cfg()
610 surface->plane1.height = stream->timing.v_addressable; in populate_dml21_dummy_surface_cfg()
630 if (stream->timing.v_addressable > 2160) in populate_dml21_dummy_plane_cfg()
633 height = stream->timing.v_addressable; // 4K max in populate_dml21_dummy_plane_cfg()
862 plane_state->dst_rect.height >= stream->timing.v_addressable && in populate_dml21_plane_config_from_plane_state()
863 stream->dst.height >= stream->timing.v_addressable; in populate_dml21_plane_config_from_plane_state()
1114 vactive = timing->v_addressable + timing->v_border_bottom + timing->v_border_top; in dml21_populate_pipe_ctx_dlg_params()
1119 vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in dml21_populate_pipe_ctx_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/opp/dcn10/ |
| H A D | dcn10_opp.c | 331 uint32_t space1_size = timing->v_total - timing->v_addressable; in opp1_program_stereo()
333 uint32_t space2_size = timing->v_total - timing->v_addressable; in opp1_program_stereo()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_validation.c | 150 if (dongle_caps->dfp_cap_ext.max_video_v_active_height < timing->v_addressable) in dp_active_dongle_validate_timing()
276 timing->v_addressable == (uint32_t) 480) in dp_validate_mode_timing()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| H A D | dcn401_dio_stream_encoder.c | 466 hw_crtc_timing.v_addressable /= 2; in enc401_stream_encoder_dp_set_stream_attribute()
679 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc401_stream_encoder_dp_set_stream_attribute()
703 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in enc401_stream_encoder_dp_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 108 (timing->v_total - timing->v_addressable - in dce120_timing_generator_validate_timing()
436 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce120_timing_generator_program_blanking()
477 tmp2 = tmp1 + timing->v_addressable + timing->v_border_top + in dce120_timing_generator_program_blanking()
628 timing->v_total - timing->v_addressable - in dce120_timing_generator_enable_advanced_request()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.c | 245 patched_crtc_timing.v_addressable - in optc1_program_timing()
366 patched_crtc_timing.v_addressable - in optc1_set_vtg_params()
602 v_blank = (timing->v_total - timing->v_addressable - in optc1_validate_timing()
1324 hw_crtc_timing->v_addressable = s.v_total - ((s.v_total - s.v_blank_start) + s.v_blank_end); in optc1_get_hw_timing()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator_v.c | 247 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce110_timing_generator_v_program_blanking()
310 tmp = tmp + timing->v_addressable + timing->v_border_top + in dce110_timing_generator_v_program_blanking()
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| H A D | dce110_timing_generator.c | 291 uint32_t v_sync_start = dc_crtc_timing->v_addressable + vsync_offset; in dce110_timing_generator_program_timing_generator()
313 bp_params.v_addressable = patched_crtc_timing.v_addressable; in dce110_timing_generator_program_timing_generator()
606 uint32_t v_sync_start = timing->v_addressable + vsync_offset; in dce110_timing_generator_program_blanking()
691 tmp = tmp + timing->v_addressable + timing->v_border_top + in dce110_timing_generator_program_blanking()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/ |
| H A D | dcn201_optc.c | 79 v_blank = (timing->v_total - timing->v_addressable - in optc201_validate_timing()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 539 phantom_stream->timing.v_addressable = phantom_vactive; in dcn32_set_phantom_stream_timing()
541 phantom_stream->timing.v_total = phantom_stream->timing.v_addressable + in dcn32_set_phantom_stream_timing()
745 phantom->timing.v_addressable; in subvp_subvp_schedulable()
763 …vactive1_us = ((subvp_pipes[0]->stream->timing.v_addressable * subvp_pipes[0]->stream->timing.h_to… in subvp_subvp_schedulable()
765 …vactive2_us = ((subvp_pipes[1]->stream->timing.v_addressable * subvp_pipes[1]->stream->timing.h_to… in subvp_subvp_schedulable()
767 …k1_us = (((subvp_pipes[0]->stream->timing.v_total - subvp_pipes[0]->stream->timing.v_addressable) * in subvp_subvp_schedulable()
770 …k2_us = (((subvp_pipes[1]->stream->timing.v_total - subvp_pipes[1]->stream->timing.v_addressable) * in subvp_subvp_schedulable()
856 subvp_active_us = main_timing->v_addressable * main_timing->h_total / in subvp_drr_schedulable()
861 mall_region_us = phantom_timing->v_addressable * phantom_timing->h_total / in subvp_drr_schedulable()
864 …drr_stretched_vblank_us = (drr_timing->v_total - drr_timing->v_addressable) * drr_timing->h_total / in subvp_drr_schedulable()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | command_table2.c | 582 params.v_size = cpu_to_le16((uint16_t)bp_params->v_addressable); in set_crtc_using_dtd_timing_v3()
586 bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
601 bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
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| H A D | command_table.c | 1840 params.usV_Disp = cpu_to_le16((uint16_t)(bp_params->v_addressable)); in set_crtc_timing_v1()
1914 params.usV_Size = cpu_to_le16((uint16_t)bp_params->v_addressable); in set_crtc_using_dtd_timing_v3()
1917 cpu_to_le16((uint16_t)(bp_params->v_total - bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
1928 cpu_to_le16((uint16_t)(bp_params->v_sync_start - bp_params->v_addressable)); in set_crtc_using_dtd_timing_v3()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | bios_parser_types.h | 181 uint32_t v_addressable; member
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| /linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/ |
| H A D | dcn31_hpo_dp_stream_encoder.c | 356 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dcn31_hpo_dp_stream_enc_set_stream_attribute()
360 …v_height = hw_crtc_timing.v_border_top + hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bo… in dcn31_hpo_dp_stream_enc_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 594 …mall_region_us = div64_u64(((uint64_t)phantom_timing->v_addressable * phantom_timing->h_total * 10… in populate_subvp_cmd_drr_info()
602 …subvp_active_us = div64_u64(((uint64_t)main_timing->v_addressable * main_timing->h_total * 1000000… in populate_subvp_cmd_drr_info()
604 drr_active_us = div64_u64(((uint64_t)drr_timing->v_addressable * drr_timing->h_total * 1000000), in populate_subvp_cmd_drr_info()
674 …ng.v_total - vblank_pipe->stream->timing.v_front_porch - vblank_pipe->stream->timing.v_addressable; in populate_subvp_cmd_vblank_pipe_info()
786 main_timing->v_total - main_timing->v_front_porch - main_timing->v_addressable; in populate_subvp_cmd_pipe_info()
787 pipe_data->pipe_config.subvp_data.mall_region_lines = phantom_timing->v_addressable; in populate_subvp_cmd_pipe_info()
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| H A D | dc_spl_translate.c | 125 stream->timing.v_addressable + stream->timing.v_border_bottom + stream->timing.v_border_top; in translate_SPL_in_params_from_pipe_ctx()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 291 hw_crtc_timing.v_addressable /= 2; in dce110_stream_encoder_dp_set_stream_attribute()
473 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in dce110_stream_encoder_dp_set_stream_attribute()
500 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in dce110_stream_encoder_dp_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_stream_encoder.c | 270 hw_crtc_timing.v_addressable /= 2; in enc1_stream_encoder_dp_set_stream_attribute()
438 hw_crtc_timing.v_addressable - hw_crtc_timing.v_border_bottom - in enc1_stream_encoder_dp_set_stream_attribute()
462 hw_crtc_timing.v_addressable + hw_crtc_timing.v_border_bottom); in enc1_stream_encoder_dp_set_stream_attribute()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 422 input->dest.vactive = pipe->stream->timing.v_addressable + pipe->stream->timing.v_border_top in pipe_ctx_to_e2e_pipe_params()
441 - pipe->stream->timing.v_addressable in pipe_ctx_to_e2e_pipe_params()
907 v->vactive[input_idx] = pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
921 v->viewport_height[input_idx] = pipe->stream->timing.v_addressable; in dcn_validate_bandwidth()
1216 vesa_sync_start = pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
1227 pipe->stream->timing.v_addressable + in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.c | 108 - stream->timing.v_addressable); in dce110_get_min_vblank_time_us()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 604 if (stream1->timing.v_addressable in resource_are_streams_timing_synchronizable()
605 != stream2->timing.v_addressable) in resource_are_streams_timing_synchronizable()
953 *dpp_offset = pipe_ctx->stream->timing.v_addressable / VISUAL_CONFIRM_DPP_OFFSET_DENO; in calculate_adjust_recout_for_visual_confirm()
1364 stream->timing.v_addressable >= 1080 && in is_subvp_high_refresh_candidate()
1365 stream->timing.v_addressable <= 2160) && in is_subvp_high_refresh_candidate()
2125 odm_slice_dst.height = stream->timing.v_addressable + in resource_get_odm_slice_dst_rect()
4457 tg->v_addressable - tg->v_border_top); in adaptive_sync_override_dp_info_packets_sdp_line_num()
5220 if (dc->current_state->stream_count == 1 && stream->timing.v_addressable >= 2880 && in check_subvp_sw_cursor_fallback_req()
5223 else if (dc->current_state->stream_count > 1 && stream->timing.v_addressable >= 1080 && in check_subvp_sw_cursor_fallback_req()
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_hw_sequencer.c | 127 params.source_view_height = pipe_ctx->stream->timing.v_addressable; in dce60_enable_fbc()
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