| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 33 double *uclk, in get_minimum_clocks_for_latency() argument
46 …*uclk = dram_bw_kbps_to_uclk_khz(in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_… in get_minimum_clocks_for_latency()
330 result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.active.uclk_khz, &state_table->uclk); in map_soc_min_clocks_to_dpm_fine_grained()
337 …t = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch.uclk_khz, &state_table->uclk); in map_soc_min_clocks_to_dpm_fine_grained()
344 result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.idle.uclk_khz, &state_table->uclk); in map_soc_min_clocks_to_dpm_fine_grained()
350 …o_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz, &state_table->uclk)) { in map_soc_min_clocks_to_dpm_fine_grained()
366 for (index = 0; index < state_table->uclk.num_clk_values; index++) { in map_soc_min_clocks_to_dpm_coarse_grained()
369 display_cfg->min_clocks.dcn4x.active.uclk_khz <= state_table->uclk.clk_values_khz[index]) { in map_soc_min_clocks_to_dpm_coarse_grained()
372 display_cfg->min_clocks.dcn4x.active.uclk_khz = state_table->uclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
380 for (index = 0; index < state_table->uclk.num_clk_values; index++) { in map_soc_min_clocks_to_dpm_coarse_grained()
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| /linux/drivers/gpu/drm/amd/display/dc/soc_and_ip_translator/dcn42/ |
| H A D | dcn42_soc_and_ip_translator.c | 73 dml_clk_table->uclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_memclk_levels; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
75 if (i < dml_clk_table->uclk.num_clk_values) { in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
76 dml_clk_table->uclk.clk_values_khz[i] = dc_clk_table->entries[i].memclk_mhz * 1000; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
79 dml_clk_table->uclk.clk_values_khz[i] = 0; in dcn42_convert_dc_clock_table_to_soc_bb_clock_table()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | smu_v12_0.c | 305 smu->smu_table.boot_values.uclk = v_3_1->bootup_mclk_in10khz; in smu_v12_0_get_vbios_bootup_values()
322 smu->smu_table.boot_values.uclk = v_3_3->bootup_mclk_in10khz; in smu_v12_0_get_vbios_bootup_values()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/ |
| H A D | dcn42_soc_bb.h | 77 .uclk = {
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_utils.c | 539 for (i = 0; i < clk_table->uclk.num_clk_values; i++) { in dml2_core_utils_get_active_min_uclk_dpm_index()
540 …L::%s: clk_table.uclk.clk_values_khz[%d] = %ld\n", __func__, i, clk_table->uclk.clk_values_khz[i]); in dml2_core_utils_get_active_min_uclk_dpm_index()
542 if (uclk_freq_khz == clk_table->uclk.clk_values_khz[i]) { in dml2_core_utils_get_active_min_uclk_dpm_index()
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| H A D | dml2_core_dcn4.c | 647 for (i = 0; i < soc_bb->clk_table.uclk.num_clk_values; i++) { in lookup_uclk_dpm_index_by_freq()
648 if (uclk_freq_khz == soc_bb->clk_table.uclk.clk_values_khz[i]) in lookup_uclk_dpm_index_by_freq()
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| H A D | dml2_core_dcn4_calcs.c | 7157 for (i = 0; i < clk_table->uclk.num_clk_values; i++) { in get_active_min_uclk_dpm_index()
7158 …L::%s: clk_table.uclk.clk_values_khz[%d] = %ld\n", __func__, i, clk_table->uclk.clk_values_khz[i]); in get_active_min_uclk_dpm_index()
7160 if (uclk_freq_khz == clk_table->uclk.clk_values_khz[i]) { in get_active_min_uclk_dpm_index()
12059 …max_uclk_mhz = mode_lib->soc.clk_table.uclk.clk_values_khz[mode_lib->soc.clk_table.uclk.num_clk_va… in dml_core_mode_programming()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0.c | 534 smu->smu_table.boot_values.uclk = v_3_1->bootup_mclk_in10khz; in smu_v14_0_get_vbios_bootup_values()
548 smu->smu_table.boot_values.uclk = v_3_3->bootup_mclk_in10khz; in smu_v14_0_get_vbios_bootup_values()
563 smu->smu_table.boot_values.uclk = v_3_4->bootup_mclk_in10khz; in smu_v14_0_get_vbios_bootup_values()
1042 clock_limit = smu->smu_table.boot_values.uclk; in smu_v14_0_get_dpm_ultimate_freq()
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| H A D | smu_v14_0_2_ppt.c | 527 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in smu_v14_0_2_set_default_dpm_table()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 478 smu->smu_table.boot_values.uclk = v_3_1->bootup_mclk_in10khz; in smu_v11_0_get_vbios_bootup_values()
495 smu->smu_table.boot_values.uclk = v_3_3->bootup_mclk_in10khz; in smu_v11_0_get_vbios_bootup_values()
761 max_sustainable_clocks->uclock = smu->smu_table.boot_values.uclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1650 clock_limit = smu->smu_table.boot_values.uclk; in smu_v11_0_get_dpm_ultimate_freq()
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| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | t3_hw.c | 586 VPD_ENTRY(uclk, 6); /* uP clk */
671 ret = vpdstrtouint(vpd.uclk_data, vpd.uclk_len, 10, &p->uclk); in get_vpd_params()
3364 t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params); in t3_init_hw()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 343 uint32_t uclk; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/ |
| H A D | dml21_translation_helper.c | 973 …min_clocks->dramclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.uclk.clk_values_khz[lowest_dpm_sta… in dml21_init_min_clocks_for_dc_state()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | aldebaran_ppt.c | 446 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in aldebaran_set_default_dpm_table()
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| H A D | smu_v13_0_7_ppt.c | 646 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in smu_v13_0_7_set_default_dpm_table()
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| H A D | smu_v13_0_0_ppt.c | 627 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100; in smu_v13_0_0_set_default_dpm_table()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc.h | 380 uint8_t uclk : 1; member
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