| /linux/arch/arm/include/asm/ |
| H A D | proc-fns.h | 158 u64 ttbr; \
160 : "=r" (ttbr)); \
161 ttbr; \
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| /linux/include/linux/ |
| H A D | io-pgtable.h | 141 u64 ttbr; member
167 u32 ttbr; member
179 u64 ttbr[4]; member
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| /linux/drivers/gpu/drm/msm/ |
| H A D | msm_iommu.c | 34 phys_addr_t ttbr; member
249 phys_addr_t *ttbr, int *asid) in msm_iommu_pagetable_params() argument
258 if (ttbr) in msm_iommu_pagetable_params()
259 *ttbr = pagetable->ttbr; in msm_iommu_pagetable_params()
616 pagetable->ttbr = ttbr0_cfg.arm_lpae_s1_cfg.ttbr; in msm_iommu_pagetable_create()
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| H A D | msm_mmu.h | 90 int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr,
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| /linux/drivers/iommu/arm/arm-smmu/ |
| H A D | arm-smmu.c | 547 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()
548 cb->ttbr[1] = 0; in arm_smmu_init_context_bank()
550 cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, in arm_smmu_init_context_bank()
552 cb->ttbr[1] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, in arm_smmu_init_context_bank()
556 cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
558 cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
561 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_init_context_bank()
636 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
637 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR1, cb->ttbr[1]); in arm_smmu_write_context_bank()
639 arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
[all …]
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| H A D | arm-smmu-qcom.c | 247 cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid); in qcom_adreno_smmu_set_ttbr0_cfg()
259 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in qcom_adreno_smmu_set_ttbr0_cfg()
260 cb->ttbr[0] |= FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid); in qcom_adreno_smmu_set_ttbr0_cfg()
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| H A D | qcom_iommu.c | 279 pgtbl_cfg.arm_lpae_s1_cfg.ttbr | in qcom_iommu_init_domain()
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_preempt.c | 360 phys_addr_t ttbr; in preempt_init_ring() local
400 msm_iommu_pagetable_params(to_msm_vm(gpu->vm)->mmu, &ttbr, &asid); in preempt_init_ring()
403 smmu_info_ptr->ttbr0 = ttbr; in preempt_init_ring()
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| H A D | a6xx_gpu.c | 208 phys_addr_t ttbr; in a6xx_set_pagetable() local
215 if (msm_iommu_pagetable_params(to_msm_vm(vm)->mmu, &ttbr, &asid)) in a6xx_set_pagetable()
267 OUT_RING(ring, CP_SMMU_TABLE_UPDATE_0_TTBR0_LO(lower_32_bits(ttbr))); in a6xx_set_pagetable()
270 CP_SMMU_TABLE_UPDATE_1_TTBR0_HI(upper_32_bits(ttbr)) | in a6xx_set_pagetable()
282 OUT_RING(ring, lower_32_bits(ttbr)); in a6xx_set_pagetable()
283 OUT_RING(ring, upper_32_bits(ttbr)); in a6xx_set_pagetable()
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| /linux/drivers/iommu/ |
| H A D | apple-dart.c | 150 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
185 u32 ttbr; member
579 pgtbl_cfg->apple_dart_cfg.ttbr[i]); in apple_dart_setup_translation()
1242 .ttbr = DART_T8020_TTBR,
1268 .ttbr = DART_T8020_USB4_TTBR,
1294 .ttbr = DART_T8020_TTBR,
1320 .ttbr = DART_T8110_TTBR,
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| H A D | ipmmu-vmsa.c | 366 u64 ttbr; in ipmmu_domain_setup_context() local
370 ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr; in ipmmu_domain_setup_context()
371 ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr); in ipmmu_domain_setup_context()
372 ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32); in ipmmu_domain_setup_context()
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| H A D | msm_iommu.c | 274 SET_TTBR0(base, ctx, priv->cfg.arm_v7s_cfg.ttbr); in __program_context()
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| H A D | mtk_iommu.c | 768 writel(dom->cfg.arm_v7s_cfg.ttbr, bank->base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_attach_device()
1549 writel(m4u_dom->cfg.arm_v7s_cfg.ttbr, base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_runtime_resume()
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| H A D | io-pgtable-arm.c | 1056 cfg->arm_lpae_s1_cfg.ttbr = virt_to_phys(data->pgd); in arm_64_lpae_alloc_pgtable_s1()
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| /linux/arch/arm64/kernel/pi/ |
| H A D | map_kernel.c | 141 static void noinline __section(".idmap.text") set_ttbr0_for_lpa2(phys_addr_t ttbr) in set_ttbr0_for_lpa2() argument
162 :: "r"(sctlr & ~SCTLR_ELx_M), "r"(ttbr), "r"(tcr), "r"(sctlr)); in set_ttbr0_for_lpa2()
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| /linux/arch/arm64/kvm/ |
| H A D | at.c | 141 u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr; in setup_s1_walk() local
160 ttbr = (va55 ? in setup_s1_walk()
168 ttbr = (va55 ? in setup_s1_walk()
331 wi->baddr = ttbr & TTBRx_EL1_BADDR; in setup_s1_walk()
340 wi->baddr |= FIELD_GET(GENMASK_ULL(5, 2), ttbr) << 48; in setup_s1_walk()
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| H A D | nested.c | 1329 u64 ttbr = ((tcr & TCR_A1) ? in kvm_vncr_tlb_lookup() local
1334 asid = FIELD_GET(TTBR_ASID_MASK, ttbr); in kvm_vncr_tlb_lookup()
1445 u64 ttbr = ((tcr & TCR_A1) ? in kvm_map_l1_vncr() local
1450 asid = FIELD_GET(TTBR_ASID_MASK, ttbr); in kvm_map_l1_vncr()
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| /linux/drivers/iommu/arm/arm-smmu-v3/ |
| H A D | arm-smmu-v3-test.c | 465 io_pgtable.cfg.arm_lpae_s1_cfg.ttbr = 0xdaedbeefdeadbeefULL; in arm_smmu_test_make_s1_cd()
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| H A D | arm-smmu-v3.c | 1411 target->data[1] = cpu_to_le64(pgtbl_cfg->arm_lpae_s1_cfg.ttbr & in arm_smmu_make_s1_cd()
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| /linux/drivers/gpu/drm/panthor/ |
| H A D | panthor_mmu.c | 771 transtab = cfg->arm_lpae_s1_cfg.ttbr; in panthor_vm_active()
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