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Searched refs:ttbr (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/msm/
H A Dmsm_iommu.c27 phys_addr_t ttbr; member
173 phys_addr_t *ttbr, int *asid) in msm_iommu_pagetable_params() argument
182 if (ttbr) in msm_iommu_pagetable_params()
183 *ttbr = pagetable->ttbr; in msm_iommu_pagetable_params()
309 pagetable->ttbr = ttbr0_cfg.arm_lpae_s1_cfg.ttbr; in msm_iommu_pagetable_create()
H A Dmsm_mmu.h55 int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr,
/linux/arch/arm/include/asm/
H A Dproc-fns.h158 u64 ttbr; \
160 : "=r" (ttbr)); \
161 ttbr; \
/linux/arch/arm64/include/asm/
H A Duaccess.h61 unsigned long flags, ttbr; in __uaccess_ttbr0_disable() local
64 ttbr = read_sysreg(ttbr1_el1); in __uaccess_ttbr0_disable()
65 ttbr &= ~TTBR_ASID_MASK; in __uaccess_ttbr0_disable()
67 write_sysreg(ttbr - RESERVED_SWAPPER_OFFSET, ttbr0_el1); in __uaccess_ttbr0_disable()
69 write_sysreg(ttbr, ttbr1_el1); in __uaccess_ttbr0_disable()
/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c538 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()
539 cb->ttbr[1] = 0; in arm_smmu_init_context_bank()
541 cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, in arm_smmu_init_context_bank()
543 cb->ttbr[1] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, in arm_smmu_init_context_bank()
547 cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
549 cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
552 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_init_context_bank()
627 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
628 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_TTBR1, cb->ttbr[1]); in arm_smmu_write_context_bank()
630 arm_smmu_cb_writeq(smmu, idx, ARM_SMMU_CB_TTBR0, cb->ttbr[0]); in arm_smmu_write_context_bank()
[all …]
H A Dqcom_iommu.c281 pgtbl_cfg.arm_lpae_s1_cfg.ttbr | in qcom_iommu_init_domain()
/linux/drivers/iommu/
H A Dapple-dart.c147 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
181 u64 ttbr; member
565 pgtbl_cfg->apple_dart_cfg.ttbr[i]); in apple_dart_setup_translation()
1215 .ttbr = DART_T8020_TTBR,
1241 .ttbr = DART_T8020_USB4_TTBR,
1267 .ttbr = DART_T8020_TTBR,
1292 .ttbr = DART_T8110_TTBR,
H A Dipmmu-vmsa.c366 u64 ttbr; in ipmmu_domain_setup_context() local
370 ttbr = domain->cfg.arm_lpae_s1_cfg.ttbr; in ipmmu_domain_setup_context()
371 ipmmu_ctx_write_root(domain, IMTTLBR0, ttbr); in ipmmu_domain_setup_context()
372 ipmmu_ctx_write_root(domain, IMTTUBR0, ttbr >> 32); in ipmmu_domain_setup_context()
H A Dio-pgtable-dart.c419 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); in apple_dart_alloc_pgtable()
H A Dmtk_iommu.c756 writel(dom->cfg.arm_v7s_cfg.ttbr, bank->base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_attach_device()
1497 writel(m4u_dom->cfg.arm_v7s_cfg.ttbr, base + REG_MMU_PT_BASE_ADDR); in mtk_iommu_runtime_resume()
H A Dmsm_iommu.c274 SET_TTBR0(base, ctx, priv->cfg.arm_v7s_cfg.ttbr); in __program_context()
/linux/arch/arm64/kvm/
H A Dat.c151 u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr; in setup_s1_walk() local
173 ttbr = (va55 ? in setup_s1_walk()
181 ttbr = (va55 ? in setup_s1_walk()
337 wi->baddr = ttbr & TTBRx_EL1_BADDR; in setup_s1_walk()
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu.c116 phys_addr_t ttbr; in a6xx_set_pagetable() local
123 if (msm_iommu_pagetable_params(ctx->aspace->mmu, &ttbr, &asid)) in a6xx_set_pagetable()
148 OUT_RING(ring, CP_SMMU_TABLE_UPDATE_0_TTBR0_LO(lower_32_bits(ttbr))); in a6xx_set_pagetable()
151 CP_SMMU_TABLE_UPDATE_1_TTBR0_HI(upper_32_bits(ttbr)) | in a6xx_set_pagetable()
163 OUT_RING(ring, lower_32_bits(ttbr)); in a6xx_set_pagetable()
164 OUT_RING(ring, upper_32_bits(ttbr)); in a6xx_set_pagetable()
/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3-test.c465 io_pgtable.cfg.arm_lpae_s1_cfg.ttbr = 0xdaedbeefdeadbeefULL; in arm_smmu_test_make_s1_cd()
H A Darm-smmu-v3.c1411 target->data[1] = cpu_to_le64(pgtbl_cfg->arm_lpae_s1_cfg.ttbr & in arm_smmu_make_s1_cd()
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_mmu.c766 transtab = cfg->arm_lpae_s1_cfg.ttbr; in panthor_vm_active()