Searched refs:to_pll (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/clk/ |
| H A D | clk-nomadik.c | 165 #define to_pll(_hw) container_of(_hw, struct clk_pll, hw) macro
170 struct clk_pll *pll = to_pll(hw); in pll_clk_enable()
190 struct clk_pll *pll = to_pll(hw); in pll_clk_disable()
209 struct clk_pll *pll = to_pll(hw); in pll_clk_is_enabled()
225 struct clk_pll *pll = to_pll(hw); in pll_clk_recalc_rate()
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| H A D | clk-stm32h7.c | 693 #define to_pll(_hw) container_of(_hw, struct stm32_pll_obj, hw) macro
697 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_is_enabled()
707 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable()
717 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable()
727 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_frac_is_enabled()
735 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_read_frac()
745 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_fd_recalc_rate()
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| /linux/drivers/clk/renesas/ |
| H A D | rzv2h-cpg.c | 142 #define to_pll(_hw) container_of(_hw, struct pll_clk, hw) macro
256 struct pll_clk *pll_clk = to_pll(clk_hw_get_parent(hw)); in rzv2h_cpg_plldsi_div_determine_rate()
298 struct pll_clk *pll_clk = to_pll(clk_hw_get_parent(hw)); in rzv2h_cpg_plldsi_div_set_rate()
379 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_plldsi_determine_rate()
458 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_plldsi_set_rate()
509 struct pll_clk *pll_clk = to_pll(clk_hw_get_parent(hw)); in rzv2h_cpg_plldsi_smux_determine_rate()
628 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_is_enabled()
639 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_enable()
677 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_recalc_rate()
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| H A D | r9a09g077-cpg.c | 124 #define to_pll(_hw) container_of(_hw, struct pll_clk, hw) macro
585 struct pll_clk *pll_clk = to_pll(hw); in r9a09g077_cpg_pll3_clk_recalc_rate()
608 struct pll_clk *pll_clk = to_pll(hw); in r9a09g077_cpg_pll3_determine_rate()
631 struct pll_clk *pll_clk = to_pll(hw); in r9a09g077_cpg_pll3_set_rate()
732 pll_clk = to_pll(clk_hw_get_parent_by_index(mux_hw, 1)); in r9a09g077_cpg_lcdc_div_determine_rate()
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| H A D | rzg2l-cpg.c | 1076 #define to_pll(_hw) container_of(_hw, struct pll_clk, hw) macro
1081 struct pll_clk *pll_clk = to_pll(hw); in rzg2l_cpg_pll_clk_recalc_rate()
1105 struct pll_clk *pll_clk = to_pll(hw); in rzg3s_cpg_pll_clk_recalc_rate()
1180 struct pll_clk *pll_clk = to_pll(hw); in rzg3l_cpg_pll_clk_is_enabled()
1191 struct pll_clk *pll_clk = to_pll(hw); in rzg3l_cpg_pll_clk_endisable()
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| /linux/drivers/clk/stm32/ |
| H A D | clk-stm32mp1.c | 754 #define to_pll(_hw) container_of(_hw, struct stm32_pll_obj, hw) macro
771 struct stm32_pll_obj *clk_elem = to_pll(hw); in __pll_is_enabled()
780 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_enable()
816 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_disable()
831 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_frac_val()
844 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_recalc_rate()
868 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_is_enabled()
881 struct stm32_pll_obj *clk_elem = to_pll(hw); in pll_get_parent()
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