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Searched refs:tmp_adev (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_device.c5092 struct amdgpu_device *tmp_adev = reset_context->reset_req_dev; in amdgpu_device_pre_asic_reset() local
5145 dev_info(tmp_adev->dev, "Dumping IP State\n"); in amdgpu_device_pre_asic_reset()
5147 for (i = 0; i < tmp_adev->num_ip_blocks; i++) in amdgpu_device_pre_asic_reset()
5148 if (tmp_adev->ip_blocks[i].version->funcs->dump_ip_state) in amdgpu_device_pre_asic_reset()
5149 tmp_adev->ip_blocks[i].version->funcs in amdgpu_device_pre_asic_reset()
5150 ->dump_ip_state((void *)&tmp_adev->ip_blocks[i]); in amdgpu_device_pre_asic_reset()
5151 dev_info(tmp_adev->dev, "Dumping IP State Completed\n"); in amdgpu_device_pre_asic_reset()
5170 struct amdgpu_device *tmp_adev; in amdgpu_device_reinit_after_reset() local
5190 list_for_each_entry(tmp_adev, device_list_handle, reset_list) { in amdgpu_device_reinit_after_reset()
5191 amdgpu_set_init_level(tmp_adev, init_level); in amdgpu_device_reinit_after_reset()
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H A Dsienna_cichlid.c221 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in sienna_cichlid_mode2_restore_hwcontext() local
223 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_RESET_RECOVERY); in sienna_cichlid_mode2_restore_hwcontext()
224 dev_info(tmp_adev->dev, in sienna_cichlid_mode2_restore_hwcontext()
226 r = sienna_cichlid_mode2_restore_ip(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext()
234 amdgpu_register_gpu_instance(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext()
237 amdgpu_ras_resume(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext()
239 amdgpu_irq_gpu_reset_resume_helper(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext()
241 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_DEFAULT); in sienna_cichlid_mode2_restore_hwcontext()
242 r = amdgpu_ib_ring_tests(tmp_adev); in sienna_cichlid_mode2_restore_hwcontext()
244 dev_err(tmp_adev->dev, in sienna_cichlid_mode2_restore_hwcontext()
H A Dsmu_v13_0_10.c222 struct amdgpu_device *tmp_adev = (struct amdgpu_device *)reset_ctl->handle; in smu_v13_0_10_mode2_restore_hwcontext() local
224 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_RESET_RECOVERY); in smu_v13_0_10_mode2_restore_hwcontext()
225 dev_info(tmp_adev->dev, in smu_v13_0_10_mode2_restore_hwcontext()
227 r = smu_v13_0_10_mode2_restore_ip(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext()
231 amdgpu_register_gpu_instance(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext()
234 amdgpu_ras_resume(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext()
236 amdgpu_irq_gpu_reset_resume_helper(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext()
238 amdgpu_set_init_level(tmp_adev, AMDGPU_INIT_LEVEL_DEFAULT); in smu_v13_0_10_mode2_restore_hwcontext()
239 r = amdgpu_ib_ring_tests(tmp_adev); in smu_v13_0_10_mode2_restore_hwcontext()
241 dev_err(tmp_adev->dev, in smu_v13_0_10_mode2_restore_hwcontext()