| /linux/drivers/soc/qcom/ |
| H A D | qcom_gsbi.c | 114 struct regmap *tcsr; member
146 gsbi->tcsr = syscon_regmap_lookup_by_phandle(node, "syscon-tcsr"); in gsbi_probe()
148 if (!IS_ERR(gsbi->tcsr)) { in gsbi_probe()
198 regmap_update_bits(gsbi->tcsr, in gsbi_probe()
201 regmap_update_bits(gsbi->tcsr, in gsbi_probe()
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| /linux/include/clocksource/ |
| H A D | timer-xilinx.h | 59 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr,
71 u32 tlr, u32 tcsr);
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| /linux/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_tai.c | 242 u32 tcsr; in mvpp22_tai_gettimex64() local
260 tcsr = readl(base + MVPP22_TAI_TCSR); in mvpp22_tai_gettimex64()
261 if (tcsr & TCSR_CAPTURE_1_VALID) { in mvpp22_tai_gettimex64()
264 } else if (tcsr & TCSR_CAPTURE_0_VALID) { in mvpp22_tai_gettimex64()
|
| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qusb2.c | 473 struct regmap *tcsr; member
842 if (qphy->tcsr) { in qusb2_phy_init()
843 ret = regmap_read(qphy->tcsr, qphy->cfg->clk_scheme_offset, in qusb2_phy_init()
1053 qphy->tcsr = syscon_regmap_lookup_by_phandle(dev->of_node, in qusb2_phy_probe()
1055 if (IS_ERR(qphy->tcsr)) { in qusb2_phy_probe()
1057 qphy->tcsr = NULL; in qusb2_phy_probe()
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| H A D | phy-qcom-qmp-pcie.c | 6201 struct regmap *tcsr; in qmp_pcie_get_4ln_config() local
6205 tcsr = syscon_regmap_lookup_by_phandle_args(qmp->dev->of_node, in qmp_pcie_get_4ln_config()
6208 if (IS_ERR(tcsr)) { in qmp_pcie_get_4ln_config()
6209 ret = PTR_ERR(tcsr); in qmp_pcie_get_4ln_config()
6217 ret = regmap_test_bits(tcsr, args[0], BIT(args[1])); in qmp_pcie_get_4ln_config()
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-sdx65.dtsi | 317 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
389 compatible = "qcom,tcsr-mutex";
394 tcsr: syscon@1fcb000 { label
395 compatible = "qcom,sdx65-tcsr", "syscon";
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| /linux/drivers/firmware/qcom/ |
| H A D | qcom_scm.c | 2058 struct device_node *tcsr; in qcom_scm_find_dload_address() local
2064 tcsr = of_parse_phandle(np, "qcom,dload-mode", 0); in qcom_scm_find_dload_address()
2065 if (!tcsr) in qcom_scm_find_dload_address()
2068 ret = of_address_to_resource(tcsr, 0, &res); in qcom_scm_find_dload_address()
2069 of_node_put(tcsr); in qcom_scm_find_dload_address()
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | purwa.dtsi | 243 <&tcsr TCSR_PCIE_8L_CLKREF_EN>,
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| H A D | glymur.dtsi | 11 #include <dt-bindings/clock/qcom,glymur-tcsr.h>
404 qcom,dload-mode = <&tcsr 0x4000>;
2383 clocks = <&tcsr TCSR_USB2_1_CLKREF_EN>;
2398 clocks = <&tcsr TCSR_USB2_1_CLKREF_EN>;
2413 clocks = <&tcsr TCSR_USB2_2_CLKREF_EN>;
2426 <&tcsr TCSR_USB3_0_CLKREF_EN>,
2453 <&tcsr TCSR_USB3_1_CLKREF_EN>,
2485 <&tcsr TCSR_EDP_CLKREF_EN>;
2591 <&tcsr TCSR_USB4_1_CLKREF_EN>,
3017 <&tcsr TCSR_PCIE_2_CLKREF_EN>,
[all …]
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| H A D | sm8650.dtsi | 12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
701 qcom,dload-mode = <&tcsr 0x19000>;
3784 <&tcsr TCSR_PCIE_0_CLKREF_EN>,
3993 <&tcsr TCSR_PCIE_1_CLKREF_EN>,
4026 <&tcsr TCSR_UFS_CLKREF_EN>;
4052 <&tcsr TCSR_UFS_PAD_CLKREF_EN>,
4180 compatible = "qcom,tcsr-mutex";
4186 tcsr: clock-controller@1fc0000 { label
4187 compatible = "qcom,sm8650-tcsr", "syscon";
5081 clocks = <&tcsr TCSR_USB2_CLKREF_EN>;
[all …]
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| H A D | sc8280xp.dtsi | 316 qcom,dload-mode = <&tcsr 0x13000>;
2485 qcom,4ln-config-sel = <&tcsr 0xa044 1>;
2708 qcom,4ln-config-sel = <&tcsr 0xa044 0>;
2850 compatible = "qcom,tcsr-mutex";
2855 tcsr: syscon@1fc0000 { label
2856 compatible = "qcom,sc8280xp-tcsr", "syscon";
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| H A D | monaco.dtsi | 616 qcom,dload-mode = <&tcsr 0x13000>;
2741 compatible = "qcom,tcsr-mutex";
2746 tcsr: syscon@1fc0000 { label
2747 compatible = "qcom,qcs8300-tcsr", "syscon";
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