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Searched refs:tcsr (Results 1 – 25 of 26) sorted by relevance

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/linux/include/clocksource/
H A Dtimer-xilinx.h59 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr,
71 u32 tlr, u32 tcsr);
/linux/drivers/pwm/
H A Dpwm-xilinx.c34 u32 xilinx_timer_tlr_cycles(struct xilinx_timer_priv *priv, u32 tcsr, in xilinx_timer_tlr_cycles() argument
39 if (tcsr & TCSR_UDT) in xilinx_timer_tlr_cycles()
45 u32 tlr, u32 tcsr) in xilinx_timer_get_period() argument
49 if (tcsr & TCSR_UDT) in xilinx_timer_get_period()
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_tai.c242 u32 tcsr; in mvpp22_tai_gettimex64() local
260 tcsr = readl(base + MVPP22_TAI_TCSR); in mvpp22_tai_gettimex64()
261 if (tcsr & TCSR_CAPTURE_1_VALID) { in mvpp22_tai_gettimex64()
264 } else if (tcsr & TCSR_CAPTURE_0_VALID) { in mvpp22_tai_gettimex64()
/linux/drivers/pmdomain/qcom/
H A Dcpr.c237 struct regmap *tcsr; member
393 static void cpr_set_acc(struct regmap *tcsr, struct fuse_corner *f, in cpr_set_acc() argument
401 regmap_multi_reg_write(tcsr, f->accs, f->num_accs); in cpr_set_acc()
404 regmap_multi_reg_write(tcsr, f->accs, f->num_accs); in cpr_set_acc()
414 if (drv->tcsr && dir == DOWN) in cpr_pre_voltage()
415 cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); in cpr_pre_voltage()
426 if (drv->tcsr && dir == UP) in cpr_post_voltage()
427 cpr_set_acc(drv->tcsr, prev_fuse_corner, fuse_corner); in cpr_post_voltage()
1517 regmap_multi_reg_write(drv->tcsr, acc_desc->config, in cpr_pd_attach_dev()
1522 regmap_update_bits(drv->tcsr, acc_desc->enable_reg, in cpr_pd_attach_dev()
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064.dtsi760 syscon-tcsr = <&tcsr>;
799 syscon-tcsr = <&tcsr>;
836 syscon-tcsr = <&tcsr>;
872 syscon-tcsr = <&tcsr>;
915 syscon-tcsr = <&tcsr>;
974 syscon-tcsr = <&tcsr>;
1013 tcsr: syscon@1a400000 { label
1014 compatible = "qcom,tcsr-ipq8064", "syscon";
H A Dqcom-apq8064.dtsi424 syscon-tcsr = <&tcsr>;
463 syscon-tcsr = <&tcsr>;
624 syscon-tcsr = <&tcsr>;
989 tcsr: syscon@1a400000 { label
990 compatible = "qcom,tcsr-apq8064", "syscon";
H A Dqcom-msm8974pro-htc-m8.dts336 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-apq8084.dtsi713 compatible = "qcom,apq8084-tcsr-mutex", "qcom,tcsr-mutex";
H A Dqcom-msm8974-samsung-hlte.dts385 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-msm8974pro-fairphone-fp2.dts475 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-apq8074-dragonboard.dts478 phy-select = <&tcsr 0xb000 1>;
H A Dqcom-msm8974.dtsi1587 compatible = "qcom,msm8974-tcsr-mutex", "qcom,tcsr-mutex", "syscon";
1592 tcsr: syscon@fd4a0000 { label
1593 compatible = "qcom,tcsr-msm8974", "syscon";
H A Dqcom-msm8974-sony-xperia-rhine.dtsi509 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-msm8974pro-oneplus-bacon.dts524 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-msm8974pro-sony-xperia-shinano-common.dtsi522 phy-select = <&tcsr 0xb000 0>;
H A Dqcom-msm8226.dtsi849 compatible = "qcom,msm8226-tcsr-mutex", "qcom,tcsr-mutex";
H A Dqcom-msm8974pro-samsung-klte-common.dtsi817 phy-select = <&tcsr 0xb000 0>;
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c467 * @tcsr: TCSR syscon register map in qusb2_setbits()
487 struct regmap *tcsr;
856 if (qphy->tcsr) { in qusb2_phy_init()
857 ret = regmap_read(qphy->tcsr, qphy->cfg->clk_scheme_offset, in qusb2_phy_init()
1064 qphy->tcsr = syscon_regmap_lookup_by_phandle(dev->of_node, in qusb2_phy_probe()
1065 "qcom,tcsr-syscon"); in qusb2_phy_probe()
1066 if (IS_ERR(qphy->tcsr)) { in qusb2_phy_probe()
1068 qphy->tcsr = NULL; in qusb2_phy_probe()
438 struct regmap *tcsr; global() member
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi99 qcom,dload-mode = <&tcsr 0x6100>;
409 compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex";
414 tcsr: syscon@1937000 { label
415 compatible = "qcom,tcsr-ipq6018", "syscon";
847 qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>;
H A Dmsm8953.dtsi459 qcom,tcsr-syscon = <&tcsr_phy_clk_scheme_sel>;
823 compatible = "qcom,tcsr-mutex";
828 tcsr: syscon@1937000 { label
829 compatible = "qcom,tcsr-msm8953", "syscon";
834 compatible = "qcom,tcsr-msm8953", "syscon";
1253 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
H A Dmsm8976.dtsi215 qcom,dload-mode = <&tcsr 0x6100>;
840 compatible = "qcom,tcsr-mutex";
845 tcsr: syscon@1937000 { label
846 compatible = "qcom,msm8976-tcsr", "syscon";
H A Dx1e80100.dtsi11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
323 qcom,dload-mode = <&tcsr 0x19000>;
2812 clocks = <&tcsr TCSR_USB2_1_CLKREF_EN>;
2882 clocks = <&tcsr TCSR_USB2_1_CLKREF_EN>;
2952 clocks = <&tcsr TCSR_USB2_1_CLKREF_EN>;
3297 <&tcsr TCSR_PCIE_8L_CLKREF_EN>,
3424 <&tcsr TCSR_PCIE_4L_CLKREF_EN>,
3445 qcom,4ln-config-sel = <&tcsr 0x1a000 0>;
3550 <&tcsr TCSR_PCIE_2L_5_CLKREF_EN>,
3684 <&tcsr TCSR_PCIE_2L_4_CLKREF_EN>,
[all …]
H A Dmsm8998.dtsi1056 compatible = "qcom,tcsr-mutex";
1062 compatible = "qcom,msm8998-tcsr", "syscon";
1067 compatible = "qcom,msm8998-tcsr", "syscon";
2231 qcom,tcsr-reg = <&tcsr_regs_2 0xb244>;
H A Dqcm2290.dtsi441 compatible = "qcom,tcsr-mutex";
447 compatible = "qcom,qcm2290-tcsr", "syscon";
700 qcom,tcsr-reg = <&tcsr_regs 0xb244>;
/linux/drivers/hwtracing/coresight/
H A Dcoresight-stm.c623 coresight_simple_reg32(tcsr, STMTCSR),

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