| /linux/drivers/clk/sunxi/ |
| H A D | clk-usb.c | 81 u32 reset_mask; member
144 if (data->reset_mask == 0) in sunxi_usb_clk_setup()
162 reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; in sunxi_usb_clk_setup()
170 .reset_mask = BIT(2) | BIT(1) | BIT(0),
183 .reset_mask = BIT(1) | BIT(0),
194 .reset_mask = BIT(2) | BIT(1) | BIT(0),
205 .reset_mask = BIT(2) | BIT(1) | BIT(0),
217 .reset_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
228 .reset_mask = BIT(19) | BIT(18) | BIT(17),
242 .reset_mask = BIT(21) | BIT(20) | BIT(19) | BIT(18) | BIT(17),
|
| /linux/drivers/gpu/drm/radeon/ |
| H A D | ni.c | 1722 u32 reset_mask = 0; in cayman_gpu_check_soft_reset() local
1733 reset_mask |= RADEON_RESET_GFX; in cayman_gpu_check_soft_reset()
1737 reset_mask |= RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1740 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1745 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1750 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1755 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1758 reset_mask |= RADEON_RESET_DMA1; in cayman_gpu_check_soft_reset()
1763 reset_mask |= RADEON_RESET_RLC; in cayman_gpu_check_soft_reset()
1766 reset_mask |= RADEON_RESET_IH; in cayman_gpu_check_soft_reset()
[all …]
|
| H A D | r600.c | 1617 u32 reset_mask = 0; in r600_gpu_check_soft_reset() local
1628 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1635 reset_mask |= RADEON_RESET_GFX; in r600_gpu_check_soft_reset()
1640 reset_mask |= RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1643 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1648 reset_mask |= RADEON_RESET_DMA; in r600_gpu_check_soft_reset()
1653 reset_mask |= RADEON_RESET_RLC; in r600_gpu_check_soft_reset()
1656 reset_mask |= RADEON_RESET_IH; in r600_gpu_check_soft_reset()
1659 reset_mask |= RADEON_RESET_SEM; in r600_gpu_check_soft_reset()
1662 reset_mask |= RADEON_RESET_GRBM; in r600_gpu_check_soft_reset()
[all …]
|
| H A D | evergreen.c | 3827 u32 reset_mask = 0; in evergreen_gpu_check_soft_reset() local
3837 reset_mask |= RADEON_RESET_GFX; in evergreen_gpu_check_soft_reset()
3841 reset_mask |= RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3844 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3849 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3854 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3859 reset_mask |= RADEON_RESET_RLC; in evergreen_gpu_check_soft_reset()
3862 reset_mask |= RADEON_RESET_IH; in evergreen_gpu_check_soft_reset()
3865 reset_mask |= RADEON_RESET_SEM; in evergreen_gpu_check_soft_reset()
3868 reset_mask |= RADEON_RESET_GRBM; in evergreen_gpu_check_soft_reset()
[all …]
|
| H A D | si.c | 3756 u32 reset_mask = 0; in si_gpu_check_soft_reset() local
3767 reset_mask |= RADEON_RESET_GFX; in si_gpu_check_soft_reset()
3771 reset_mask |= RADEON_RESET_CP; in si_gpu_check_soft_reset()
3774 reset_mask |= RADEON_RESET_GRBM | RADEON_RESET_GFX | RADEON_RESET_CP; in si_gpu_check_soft_reset()
3779 reset_mask |= RADEON_RESET_RLC; in si_gpu_check_soft_reset()
3784 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3789 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3794 reset_mask |= RADEON_RESET_DMA; in si_gpu_check_soft_reset()
3797 reset_mask |= RADEON_RESET_DMA1; in si_gpu_check_soft_reset()
3803 reset_mask |= RADEON_RESET_IH; in si_gpu_check_soft_reset()
[all …]
|
| H A D | evergreen_dma.c | 172 u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); in evergreen_dma_is_lockup() local
174 if (!(reset_mask & RADEON_RESET_DMA)) { in evergreen_dma_is_lockup()
|
| H A D | cik.c | 4844 u32 reset_mask = 0; in cik_gpu_check_soft_reset() local
4855 reset_mask |= RADEON_RESET_GFX; in cik_gpu_check_soft_reset()
4858 reset_mask |= RADEON_RESET_CP; in cik_gpu_check_soft_reset()
4863 reset_mask |= RADEON_RESET_RLC; in cik_gpu_check_soft_reset()
4868 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
4873 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
4878 reset_mask |= RADEON_RESET_DMA; in cik_gpu_check_soft_reset()
4881 reset_mask |= RADEON_RESET_DMA1; in cik_gpu_check_soft_reset()
4887 reset_mask |= RADEON_RESET_IH; in cik_gpu_check_soft_reset()
4890 reset_mask |= RADEON_RESET_SEM; in cik_gpu_check_soft_reset()
[all …]
|
| H A D | si_dma.c | 42 u32 reset_mask = si_gpu_check_soft_reset(rdev); in si_dma_is_lockup() local
50 if (!(reset_mask & mask)) { in si_dma_is_lockup()
|
| H A D | ni_dma.c | 288 u32 reset_mask = cayman_gpu_check_soft_reset(rdev); in cayman_dma_is_lockup() local
296 if (!(reset_mask & mask)) { in cayman_dma_is_lockup()
|
| H A D | r600_dma.c | 209 u32 reset_mask = r600_gpu_check_soft_reset(rdev); in r600_dma_is_lockup() local
211 if (!(reset_mask & RADEON_RESET_DMA)) { in r600_dma_is_lockup()
|
| H A D | cik_sdma.c | 776 u32 reset_mask = cik_gpu_check_soft_reset(rdev); in cik_sdma_is_lockup() local
784 if (!(reset_mask & mask)) { in cik_sdma_is_lockup()
|
| /linux/drivers/reset/ |
| H A D | reset-ti-sci.c | 25 u32 reset_mask; member
83 reset_state |= control->reset_mask; in ti_sci_reset_set()
85 reset_state &= ~control->reset_mask; in ti_sci_reset_set()
161 return reset_state & control->reset_mask; in ti_sci_reset_status()
198 control->reset_mask = reset_spec->args[1]; in ti_sci_reset_of_xlate()
|
| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_gt_pm_irq.c | 62 void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask) in gen6_gt_pm_reset_iir() argument
69 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
70 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
|
| H A D | intel_reset.c | 412 u32 *reset_mask, in gen11_lock_sfc() argument
499 *reset_mask |= sfc_lock.reset_bit; in gen11_lock_sfc()
528 u32 reset_mask, unlock_mask = 0; in __gen11_reset_engines() local
532 reset_mask = GEN11_GRDOM_FULL; in __gen11_reset_engines()
534 reset_mask = 0; in __gen11_reset_engines()
536 reset_mask |= engine->reset_domain; in __gen11_reset_engines()
537 ret = gen11_lock_sfc(engine, &reset_mask, &unlock_mask); in __gen11_reset_engines()
543 ret = gen6_hw_domain_reset(gt, reset_mask); in __gen11_reset_engines()
784 intel_engine_mask_t reset_mask; in __intel_gt_reset() local
786 reset_mask = wa_14015076503_start(gt, engine_mask, !retry); in __intel_gt_reset()
[all …]
|
| H A D | intel_gt_pm_irq.h | 19 void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask);
|
| /linux/drivers/clk/ |
| H A D | clk-twl6040.c | 33 const u8 reset_mask = TWL6040_HPLLRST; /* Same for HPPLL and LPPLL */ in twl6040_pdmclk_reset_one_clock() local
36 ret = twl6040_set_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock()
40 ret = twl6040_clear_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock()
|
| /linux/drivers/watchdog/ |
| H A D | aspeed_wdt.c | 407 u32 reset_mask[2]; in aspeed_wdt_probe() local
427 ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask); in aspeed_wdt_probe()
429 writel(reset_mask[0], wdt->base + WDT_RESET_MASK1); in aspeed_wdt_probe()
431 writel(reset_mask[1], wdt->base + WDT_RESET_MASK2); in aspeed_wdt_probe()
|
| /linux/drivers/misc/cxl/ |
| H A D | hcalls.c | 439 u64 control_mask, u64 reset_mask) in cxl_h_control_faults() argument
448 control_mask, reset_mask); in cxl_h_control_faults()
450 unit_address, process_token, control_mask, reset_mask, in cxl_h_control_faults()
453 control_mask, reset_mask, retbuf[0], rc); in cxl_h_control_faults()
|
| H A D | trace.h | 610 u64 control_mask, u64 reset_mask, unsigned long r4,
614 control_mask, reset_mask, r4, rc),
620 __field(u64, reset_mask)
629 __entry->reset_mask = reset_mask;
639 __entry->reset_mask,
|
| H A D | hcalls.h | 168 u64 control_mask, u64 reset_mask);
|
| /linux/drivers/net/ethernet/ibm/ |
| H A D | ibmveth.h | 73 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
80 reset_mask, set_mask); in h_illan_attributes()
|
| /linux/sound/soc/tegra/ |
| H A D | tegra210_i2s.c | 92 unsigned int reset_mask = I2S_SOFT_RESET_MASK; in tegra210_i2s_sw_reset() local
114 regmap_update_bits(i2s->regmap, reset_reg, reset_mask, reset_en); in tegra210_i2s_sw_reset()
117 !(val & reset_mask & reset_en), in tegra210_i2s_sw_reset()
|
| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | hw.h | 290 u32 reset_mask; member
|
| H A D | hw.c | 371 .reset_mask = 0xffffffff,
|
| H A D | htt_tx.c | 631 int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u32 mask, u32 reset_mask, in ath10k_htt_h2t_stats_req() argument
659 memcpy(req->reset_types, &reset_mask, 3); in ath10k_htt_h2t_stats_req()
|