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Searched refs:reset_domain (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_reset.c265 struct amdgpu_reset_domain *reset_domain = container_of(ref, in amdgpu_reset_destroy_reset_domain() local
268 if (reset_domain->wq) in amdgpu_reset_destroy_reset_domain()
269 destroy_workqueue(reset_domain->wq); in amdgpu_reset_destroy_reset_domain()
271 kvfree(reset_domain); in amdgpu_reset_destroy_reset_domain()
277 struct amdgpu_reset_domain *reset_domain; in amdgpu_reset_create_reset_domain() local
279 reset_domain = kvzalloc(sizeof(struct amdgpu_reset_domain), GFP_KERNEL); in amdgpu_reset_create_reset_domain()
280 if (!reset_domain) { in amdgpu_reset_create_reset_domain()
285 reset_domain->type = type; in amdgpu_reset_create_reset_domain()
286 kref_init(&reset_domain->refcount); in amdgpu_reset_create_reset_domain()
288 reset_domain->wq = create_singlethread_workqueue(wq_name); in amdgpu_reset_create_reset_domain()
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H A Damdgpu_ras_eeprom.c270 down_read(&adev->reset_domain->sem); in __write_table_header()
275 up_read(&adev->reset_domain->sem); in __write_table_header()
331 down_read(&adev->reset_domain->sem); in __write_table_ras_info()
336 up_read(&adev->reset_domain->sem); in __write_table_ras_info()
596 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
602 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_write()
786 down_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
791 up_read(&adev->reset_domain->sem); in amdgpu_ras_eeprom_update_header()
905 down_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
911 up_read(&adev->reset_domain->sem); in __amdgpu_ras_eeprom_read()
H A Damdgpu_device.c683 if (down_read_trylock(&adev->reset_domain->sem)) in amdgpu_device_skip_hw_access()
684 up_read(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
686 lockdep_assert_held(&adev->reset_domain->sem); in amdgpu_device_skip_hw_access()
712 down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_device_rreg()
714 up_read(&adev->reset_domain->sem); in amdgpu_device_rreg()
780 down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_device_xcc_rreg()
782 up_read(&adev->reset_domain->sem); in amdgpu_device_xcc_rreg()
839 down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_device_wreg()
841 up_read(&adev->reset_domain->sem); in amdgpu_device_wreg()
911 down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_device_xcc_wreg()
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H A Damdgpu_amdkfd_arcturus.c320 if (!down_read_trylock(&adev->reset_domain->sem)) in set_barrier_auto_waitcnt()
338 up_read(&adev->reset_domain->sem); in set_barrier_auto_waitcnt()
H A Damdgpu_gmc.c630 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_gmc_flush_gpu_tlb()
643 up_read(&adev->reset_domain->sem); in amdgpu_gmc_flush_gpu_tlb()
693 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_gmc_flush_gpu_tlb_pasid()
750 up_read(&adev->reset_domain->sem); in amdgpu_gmc_flush_gpu_tlb_pasid()
790 !amdgpu_reset_pending(adev->reset_domain)) { in amdgpu_gmc_fw_reg_write_reg_wait()
H A Damdgpu_fence.c955 if (amdgpu_reset_domain_schedule(adev->reset_domain, &adev->reset_work)) in gpu_recover_get()
958 *val = atomic_read(&adev->reset_domain->reset_res); in gpu_recover_get()
H A Damdgpu_virt.c643 if (amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_virt_update_vf2pf_work_item()
1311 if (down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_virt_req_ras_err_count()
1313 up_read(&adev->reset_domain->sem); in amdgpu_virt_req_ras_err_count()
H A Dmxgpu_ai.c319 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_ai_mailbox_rcv_irq()
H A Damdgpu_debugfs.c1673 r = down_write_killable(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1702 up_write(&adev->reset_domain->sem); in amdgpu_debugfs_test_ib_show()
1938 r = down_read_killable(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
1979 up_read(&adev->reset_domain->sem); in amdgpu_debugfs_ib_preempt()
H A Dmxgpu_vi.c559 WARN_ONCE(!amdgpu_reset_domain_schedule(adev->reset_domain, in xgpu_vi_mailbox_rcv_irq()
H A Damdgpu_ras.c1443 if (!down_read_trylock(&adev->reset_domain->sem)) { in amdgpu_ras_query_error_status_with_event()
1452 up_read(&adev->reset_domain->sem); in amdgpu_ras_query_error_status_with_event()
3392 down_read(&adev->reset_domain->sem); in amdgpu_ras_page_retirement_thread()
3393 up_read(&adev->reset_domain->sem); in amdgpu_ras_page_retirement_thread()
4656 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work); in amdgpu_ras_reset_gpu()
4661 amdgpu_reset_domain_schedule(ras->adev->reset_domain, &ras->recovery_work); in amdgpu_ras_reset_gpu()
H A Damdgpu_amdkfd.c291 amdgpu_reset_domain_schedule(adev->reset_domain, in amdgpu_amdkfd_gpu_reset()
H A Damdgpu_kms.c792 if (!down_read_trylock(&adev->reset_domain->sem)) in amdgpu_info_ioctl()
843 up_read(&adev->reset_domain->sem); in amdgpu_info_ioctl()
H A Damdgpu.h1169 struct amdgpu_reset_domain *reset_domain; member
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c398 u32 reset_domain; in get_reset_domain() local
432 reset_domain = engine_reset_domains[id]; in get_reset_domain()
443 reset_domain = engine_reset_domains[id]; in get_reset_domain()
446 return reset_domain; in get_reset_domain()
484 engine->reset_domain = get_reset_domain(GRAPHICS_VER(gt->i915), in intel_engine_setup()
H A Dintel_engine_types.h377 u32 reset_domain; member
H A Dintel_reset.c335 hw_mask |= engine->reset_domain; in __gen6_reset_engines()
536 reset_mask |= engine->reset_domain; in __gen11_reset_engines()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_process_queue_manager.c95 down_read_trylock(&dev->adev->reset_domain->sem)) { in kfd_process_dequeue_from_device()
98 up_read(&dev->adev->reset_domain->sem); in kfd_process_dequeue_from_device()