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Searched refs:regmap (Results 1 – 25 of 2373) sorted by relevance

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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-sgmii-eth.c29 struct regmap *regmap; member
34 static void qcom_dwmac_sgmii_phy_init_1g(struct regmap *regmap) in qcom_dwmac_sgmii_phy_init_1g() argument
36 regmap_write(regmap, QSERDES_PCS + QPHY_PCS_SW_RESET, 0x01); in qcom_dwmac_sgmii_phy_init_1g()
37 regmap_write(regmap, QSERDES_PCS + QPHY_PCS_POWER_DOWN_CONTROL, 0x01); in qcom_dwmac_sgmii_phy_init_1g()
39 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_PLL_IVCO, 0x0F); in qcom_dwmac_sgmii_phy_init_1g()
40 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_CP_CTRL_MODE0, 0x06); in qcom_dwmac_sgmii_phy_init_1g()
41 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_PLL_RCTRL_MODE0, 0x16); in qcom_dwmac_sgmii_phy_init_1g()
42 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_PLL_CCTRL_MODE0, 0x36); in qcom_dwmac_sgmii_phy_init_1g()
43 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_SYSCLK_EN_SEL, 0x1A); in qcom_dwmac_sgmii_phy_init_1g()
44 regmap_write(regmap, QSERDES_QMP_PLL + QSERDES_V5_COM_LOCK_CMP1_MODE0, 0x0A); in qcom_dwmac_sgmii_phy_init_1g()
[all …]
/linux/sound/soc/codecs/
H A Dmt6358.c83 struct regmap *regmap; member
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
143 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_SET, in capture_gpio_set()
145 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_set()
[all …]
H A Dnau8825.c50 static bool nau8825_is_jack_inserted(struct regmap *regmap);
320 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
329 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
396 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_backup()
423 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_restore()
433 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_prepare_dac()
442 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare_dac()
446 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_prepare_dac()
451 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
456 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
[all …]
H A Des8326.c24 struct regmap *regmap; member
56 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); in es8326_crosstalk1_get()
57 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); in es8326_crosstalk1_get()
75 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); in es8326_crosstalk1_set()
79 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, in es8326_crosstalk1_set()
81 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l); in es8326_crosstalk1_set()
94 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h); in es8326_crosstalk2_get()
95 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); in es8326_crosstalk2_get()
113 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l); in es8326_crosstalk2_set()
117 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE, in es8326_crosstalk2_set()
[all …]
H A Dmt6359.c24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
53 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ff8); in mt6359_reset_playback_gpio()
54 regmap_update_bits(priv->regmap, MT6359_GPIO_DIR0, 0x7 << 9, 0x0); in mt6359_reset_playback_gpio()
[all …]
H A Dnau8821.c47 static bool nau8821_is_jack_inserted(struct regmap *regmap);
287 if (!component->regmap) in nau8821_biq_coeff_get()
290 regmap_raw_read(component->regmap, NAU8821_R21_BIQ0_COF1, in nau8821_biq_coeff_get()
303 if (!component->regmap) in nau8821_biq_coeff_put()
311 regmap_raw_write(component->regmap, NAU8821_R21_BIQ0_COF1, in nau8821_biq_coeff_put()
479 regmap_read(nau8821->regmap, NAU8821_R03_CLK_DIVIDER, in dmic_clock_control()
498 regmap_update_bits(nau8821->regmap, NAU8821_R13_DMIC_CTRL, in dmic_clock_control()
557 regmap_update_bits(nau8821->regmap, NAU8821_R80_CHARGE_PUMP, in nau8821_pump_event()
561 regmap_update_bits(nau8821->regmap, NAU8821_R80_CHARGE_PUMP, in nau8821_pump_event()
581 regmap_update_bits(nau8821->regmap, NAU8821_R66_BIAS_ADJ, in nau8821_output_dac_event()
[all …]
H A Dzl38060.c86 struct regmap *regmap; member
91 static int zl38_fw_issue_command(struct regmap *regmap, u16 cmd) in zl38_fw_issue_command() argument
96 err = regmap_read_poll_timeout(regmap, REG_SEMA_FLAGS, val, in zl38_fw_issue_command()
101 err = regmap_write(regmap, REG_CMD, cmd); in zl38_fw_issue_command()
104 err = regmap_update_bits(regmap, REG_SEMA_FLAGS, SEMA_FLAGS_BOOT_CMD, in zl38_fw_issue_command()
109 return regmap_read_poll_timeout(regmap, REG_CMD, val, !val, 10000, in zl38_fw_issue_command()
113 static int zl38_fw_go(struct regmap *regmap) in zl38_fw_go() argument
117 err = zl38_fw_issue_command(regmap, BOOTCMD_LOAD_COMPLETE); in zl38_fw_go()
121 return zl38_fw_issue_command(regmap, BOOTCMD_FW_GO); in zl38_fw_go()
124 static int zl38_fw_enter_boot_mode(struct regmap *regmap) in zl38_fw_enter_boot_mode() argument
[all …]
H A Drt711.c32 static int rt711_index_write(struct regmap *regmap, in rt711_index_write() argument
38 ret = regmap_write(regmap, addr, value); in rt711_index_write()
46 static int rt711_index_read(struct regmap *regmap, in rt711_index_read() argument
53 ret = regmap_read(regmap, addr, value); in rt711_index_read()
61 static int rt711_index_update_bits(struct regmap *regmap, unsigned int nid, in rt711_index_update_bits() argument
67 ret = rt711_index_read(regmap, nid, reg, &orig); in rt711_index_update_bits()
74 return rt711_index_write(regmap, nid, reg, tmp); in rt711_index_update_bits()
77 static void rt711_reset(struct regmap *regmap) in rt711_reset() argument
79 regmap_write(regmap, RT711_FUNC_RESET, 0); in rt711_reset()
80 rt711_index_update_bits(regmap, RT711_VENDOR_REG, in rt711_reset()
[all …]
H A Dnau8540.c240 regmap_update_bits(nau8540->regmap, NAU8540_REG_FEPGA2, in nau8540_fepga_event()
261 regmap_update_bits(nau8540->regmap, NAU8540_REG_REFERENCE, in nau8540_precharge_event()
264 regmap_update_bits(nau8540->regmap, NAU8540_REG_REFERENCE, in nau8540_precharge_event()
266 regmap_update_bits(nau8540->regmap, NAU8540_REG_FEPGA2, in nau8540_precharge_event()
284 regmap_update_bits(nau8540->regmap, NAU8540_REG_POWER_MANAGEMENT, in adc_power_control()
286 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, in adc_power_control()
288 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, in adc_power_control()
291 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL1, in adc_power_control()
293 regmap_update_bits(nau8540->regmap, NAU8540_REG_PCM_CTRL2, in adc_power_control()
295 regmap_update_bits(nau8540->regmap, NAU8540_REG_POWER_MANAGEMENT, in adc_power_control()
[all …]
H A Dcs35l35.c196 regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, in cs35l35_sdin_event()
199 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
202 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
206 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
209 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL1, in cs35l35_sdin_event()
213 regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, in cs35l35_sdin_event()
218 regmap_update_bits(cs35l35->regmap, CS35L35_CLK_CTL1, in cs35l35_sdin_event()
222 regmap_update_bits(cs35l35->regmap, CS35L35_AMP_DIG_VOL_CTL, in cs35l35_sdin_event()
244 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, in cs35l35_main_amp_event()
248 regmap_update_bits(cs35l35->regmap, CS35L35_PWRCTL2, in cs35l35_main_amp_event()
[all …]
H A Dcs35l36.c22 #include <linux/regmap.h>
49 struct regmap *regmap; member
480 regmap_update_bits(cs35l36->regmap, CS35L36_NG_CFG, in cs35l36_ldm_sel_put()
513 regmap_update_bits(cs35l36->regmap, CS35L36_PWR_CTRL1, in cs35l36_main_amp_event()
519 regmap_read(cs35l36->regmap, CS35L36_INT4_RAW_STATUS, &reg); in cs35l36_main_amp_event()
524 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RX1_SEL, in cs35l36_main_amp_event()
527 regmap_update_bits(cs35l36->regmap, CS35L36_AMP_OUT_MUTE, in cs35l36_main_amp_event()
532 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RX1_SEL, in cs35l36_main_amp_event()
535 regmap_update_bits(cs35l36->regmap, CS35L36_AMP_OUT_MUT in cs35l36_main_amp_event()
[all...]
H A Drt1318.c17 #include <linux/regmap.h>
490 regmap_update_bits(rt1318->regmap, RT1318_PWR_STA1, in rt1318_dac_event()
495 regmap_update_bits(rt1318->regmap, RT1318_PWR_STA1, in rt1318_dac_event()
514 regmap_write(rt1318->regmap, RT1318_DA_VOL_L_8, in rt1318_dvol_put()
516 regmap_write(rt1318->regmap, RT1318_DA_VOL_L_1_7, in rt1318_dvol_put()
518 regmap_write(rt1318->regmap, RT1318_DA_VOL_R_8, in rt1318_dvol_put()
520 regmap_write(rt1318->regmap, RT1318_DA_VOL_R_1_7, in rt1318_dvol_put()
583 regmap_update_bits(rt1318->regmap, RT1318_SRC_TCON, in rt1318_clk_ip_info()
588 regmap_update_bits(rt1318->regmap, RT1318_SRC_TCON, in rt1318_clk_ip_info()
593 regmap_update_bits(rt1318->regmap, RT1318_SRC_TCO in rt1318_clk_ip_info()
[all...]
/linux/drivers/gpu/drm/sprd/
H A Dmegacores_pll.c81 static void dphy_set_pll_reg(struct dphy_pll *pll, struct regmap *regmap) in dphy_set_pll_reg() argument
102 regmap_write(regmap, reg_addr[i], reg_val[i]); in dphy_set_pll_reg()
110 struct regmap *regmap = ctx->regmap; in dphy_pll_config() local
122 dphy_set_pll_reg(pll, regmap); in dphy_pll_config()
127 static void dphy_set_timing_reg(struct regmap *regmap, int type, u8 val[]) in dphy_set_timing_reg() argument
131 regmap_write(regmap, 0x31, val[CLK]); in dphy_set_timing_reg()
132 regmap_write(regmap, 0x41, val[DATA]); in dphy_set_timing_reg()
133 regmap_write(regmap, 0x51, val[DATA]); in dphy_set_timing_reg()
134 regmap_write(regmap, 0x61, val[DATA]); in dphy_set_timing_reg()
135 regmap_write(regmap, 0x71, val[DATA]); in dphy_set_timing_reg()
[all …]
/linux/drivers/clk/at91/
H A Dclk-main.c30 struct regmap *regmap; member
38 struct regmap *regmap; member
48 struct regmap *regmap; member
55 struct regmap *regmap; member
62 static inline bool clk_main_osc_ready(struct regmap *regmap) in clk_main_osc_ready() argument
66 regmap_read(regmap, AT91_PMC_SR, &status); in clk_main_osc_ready()
74 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare() local
77 regmap_read(regmap, AT91_CKGR_MOR, &tmp); in clk_main_osc_prepare()
85 regmap_write(regmap, AT91_CKGR_MOR, tmp); in clk_main_osc_prepare()
88 while (!clk_main_osc_ready(regmap)) in clk_main_osc_prepare()
[all …]
/linux/drivers/clk/qcom/
H A Dclk-alpha-pll.c340 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
345 ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); in wait_for_pll()
384 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg, in clk_alpha_pll_write_config() argument
388 regmap_write(regmap, reg, val); in clk_alpha_pll_write_config()
391 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, in clk_alpha_pll_configure() argument
396 regmap_write(regmap, PLL_L_VAL(pll), config->l); in clk_alpha_pll_configure()
397 regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha); in clk_alpha_pll_configure()
398 regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val); in clk_alpha_pll_configure()
401 regmap_write(regmap, PLL_CONFIG_CTL_U(pll), in clk_alpha_pll_configure()
405 regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi); in clk_alpha_pll_configure()
[all …]
H A Dclk-hfpll.c24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once() local
31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
32 regmap_write(regmap, hd->m_reg, 0); in __clk_hfpll_init_once()
33 regmap_write(regmap, hd->n_reg, 1); in __clk_hfpll_init_once()
44 regmap_write(regmap, hd->user_reg, regval); in __clk_hfpll_init_once()
49 regmap_write(regmap, hd->l_reg, hd->l_val); in __clk_hfpll_init_once()
52 regmap_write(regmap, hd->droop_reg, hd->droop_val); in __clk_hfpll_init_once()
61 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_enable() local
67 regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL); in __clk_hfpll_enable()
76 regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N); in __clk_hfpll_enable()
[all …]
/linux/drivers/hwmon/
H A Dw83773g.c61 static int get_local_temp(struct regmap *regmap, long *val) in get_local_temp() argument
66 ret = regmap_read(regmap, W83773_LOCAL_TEMP, &regval); in get_local_temp()
74 static int get_remote_temp(struct regmap *regmap, int index, long *val) in get_remote_temp() argument
80 ret = regmap_read(regmap, W83773_TEMP_MSB[index], &regval_high); in get_remote_temp()
84 ret = regmap_read(regmap, W83773_TEMP_LSB[index], &regval_low); in get_remote_temp()
92 static int get_fault(struct regmap *regmap, int index, long *val) in get_fault() argument
97 ret = regmap_read(regmap, W83773_STATUS[index], &regval); in get_fault()
105 static int get_offset(struct regmap *regmap, int index, long *val) in get_offset() argument
111 ret = regmap_read(regmap, W83773_OFFSET_MSB[index], &regval_high); in get_offset()
115 ret = regmap_read(regmap, W83773_OFFSET_LSB[index], &regval_low); in get_offset()
[all …]
H A Dspd5118.c76 struct regmap *regmap; member
95 static int spd5118_read_temp(struct regmap *regmap, u32 attr, long *val) in spd5118_read_temp() argument
121 err = regmap_bulk_read(regmap, reg, regval, 2); in spd5118_read_temp()
131 static int spd5118_read_alarm(struct regmap *regmap, u32 attr, long *val) in spd5118_read_alarm() argument
153 err = regmap_read(regmap, SPD5118_REG_TEMP_STATUS, &regval); in spd5118_read_alarm()
158 return regmap_write(regmap, SPD5118_REG_TEMP_CLR, mask); in spd5118_read_alarm()
162 static int spd5118_read_enable(struct regmap *regmap, long *val) in spd5118_read_enable() argument
167 err = regmap_read(regmap, SPD5118_REG_TEMP_CONFIG, &regval); in spd5118_read_enable()
177 struct regmap *regmap = dev_get_drvdata(dev); in spd5118_read() local
188 return spd5118_read_temp(regmap, attr, val); in spd5118_read()
[all …]
/linux/drivers/reset/hisilicon/
H A Dhi6220_reset.c40 struct regmap *regmap; member
47 struct regmap *regmap = data->regmap; in hi6220_peripheral_assert() local
52 return regmap_write(regmap, reg, BIT(offset)); in hi6220_peripheral_assert()
59 struct regmap *regmap = data->regmap; in hi6220_peripheral_deassert() local
64 return regmap_write(regmap, reg, BIT(offset)); in hi6220_peripheral_deassert()
76 struct regmap *regmap = data->regmap; in hi6220_media_assert() local
78 return regmap_write(regmap, SC_MEDIA_RSTEN, BIT(idx)); in hi6220_media_assert()
85 struct regmap *regmap = data->regmap; in hi6220_media_deassert() local
87 return regmap_write(regmap, SC_MEDIA_RSTDIS, BIT(idx)); in hi6220_media_deassert()
109 struct regmap *regmap = data->regmap; in hi6220_ao_assert() local
[all …]
/linux/drivers/base/regmap/
H A Dinternal.h19 struct regmap;
36 void (*format_write)(struct regmap *map,
46 struct regmap *map;
50 struct regmap { struct
186 int (*init)(struct regmap *map); argument
187 int (*exit)(struct regmap *map);
189 void (*debugfs_init)(struct regmap *map);
191 int (*read)(struct regmap *map, unsigned int reg, unsigned int *value);
192 int (*write)(struct regmap *map, unsigned int reg, unsigned int value);
193 int (*sync)(struct regmap *map, unsigned int min, unsigned int max);
[all …]
H A DMakefile5 obj-$(CONFIG_REGMAP) += regmap.o regcache.o
7 obj-$(CONFIG_DEBUG_FS) += regmap-debugfs.o
8 obj-$(CONFIG_REGMAP_KUNIT) += regmap-kunit.o
9 obj-$(CONFIG_REGMAP_AC97) += regmap-ac97.o
10 obj-$(CONFIG_REGMAP_I2C) += regmap-i2c.o
11 obj-$(CONFIG_REGMAP_RAM) += regmap-ram.o regmap-raw-ram.o
12 obj-$(CONFIG_REGMAP_SLIMBUS) += regmap-slimbus.o
13 obj-$(CONFIG_REGMAP_SPI) += regmap-spi.o
14 obj-$(CONFIG_REGMAP_SPMI) += regmap-spmi.o
15 obj-$(CONFIG_REGMAP_MMIO) += regmap-mmio.o
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dchrontel-ch7033.c201 struct regmap *regmap; member
337 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_disable()
338 regmap_update_bits(priv->regmap, 0x52, RESETDB, 0x00); in ch7033_bridge_disable()
345 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_enable()
346 regmap_update_bits(priv->regmap, 0x52, RESETDB, RESETDB); in ch7033_bridge_enable()
362 regmap_write(priv->regmap, 0x03, 0x04); in ch7033_bridge_mode_set()
365 regmap_write(priv->regmap, 0x52, 0x00); in ch7033_bridge_mode_set()
367 regmap_write(priv->regmap, 0x52, RESETIB); in ch7033_bridge_mode_set()
372 regmap_write(priv->regmap, 0x03, 0x00); in ch7033_bridge_mode_set()
375 regmap_update_bits(priv->regmap, 0x07, DRI_PD | IO_PD, 0); in ch7033_bridge_mode_set()
[all …]
H A Dlontium-lt9611.c40 struct regmap *regmap; member
107 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_analog()
125 return regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg)); in lt9611_mipi_input_digital()
147 regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256)); in lt9611_mipi_video_setup()
148 regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256)); in lt9611_mipi_video_setup()
150 regmap_write(lt9611->regmap, 0x830f, (u8)(vactive / 256)); in lt9611_mipi_video_setup()
151 regmap_write(lt9611->regmap, 0x8310, (u8)(vactive % 256)); in lt9611_mipi_video_setup()
153 regmap_write(lt9611->regmap, 0x8311, (u8)(h_total / 256)); in lt9611_mipi_video_setup()
154 regmap_write(lt9611->regmap, 0x8312, (u8)(h_total % 256)); in lt9611_mipi_video_setup()
156 regmap_write(lt9611->regmap, 0x8313, (u8)(hactive / 256)); in lt9611_mipi_video_setup()
[all …]
/linux/drivers/regulator/
H A Drt6190-regulator.c70 struct regmap *regmap; member
78 struct regmap *regmap = rdev_get_regmap(rdev); in rt6190_out_set_voltage_sel() local
81 return regmap_raw_write(regmap, RT6190_REG_OUTV, &le_sel, in rt6190_out_set_voltage_sel()
87 struct regmap *regmap = rdev_get_regmap(rdev); in rt6190_out_get_voltage_sel() local
91 ret = regmap_raw_read(regmap, RT6190_REG_OUTV, &le_sel, sizeof(le_sel)); in rt6190_out_get_voltage_sel()
99 struct regmap *regmap = rdev_get_regmap(rdev); in rt6190_out_enable() local
109 ret = regmap_raw_read(regmap, RT6190_REG_OUTV, out_cfg, in rt6190_out_enable()
118 ret = regmap_raw_write(regmap, RT6190_REG_OUTV, out_cfg, in rt6190_out_enable()
123 return regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, in rt6190_out_enable()
130 struct regmap *regmap = rdev_get_regmap(rdev); in rt6190_out_disable() local
[all …]
/linux/drivers/phy/mscc/
H A Dphy-ocelot-serdes.c22 struct regmap *regs;
36 static int __serdes_write_mcb_s6g(struct regmap *regmap, u8 macro, u32 op) in __serdes_write_mcb_s6g() argument
40 regmap_write(regmap, HSIO_MCB_S6G_ADDR_CFG, op | in __serdes_write_mcb_s6g()
43 return regmap_read_poll_timeout(regmap, HSIO_MCB_S6G_ADDR_CFG, regval, in __serdes_write_mcb_s6g()
48 static int serdes_commit_mcb_s6g(struct regmap *regmap, u8 macro) in serdes_commit_mcb_s6g() argument
50 return __serdes_write_mcb_s6g(regmap, macro, in serdes_commit_mcb_s6g()
54 static int serdes_update_mcb_s6g(struct regmap *regmap, u8 macro) in serdes_update_mcb_s6g() argument
56 return __serdes_write_mcb_s6g(regmap, macro, in serdes_update_mcb_s6g()
60 static int serdes_init_s6g(struct regmap *regmap, u8 serdes, int mode) in serdes_init_s6g() argument
89 ret = serdes_update_mcb_s6g(regmap, serdes); in serdes_init_s6g()
[all …]

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