/linux/drivers/cpufreq/ |
H A D | s5pv210-cpufreq.c | 296 reg = readl_relaxed(S5P_CLK_DIV2); in s5pv210_target() 304 reg = readl_relaxed(S5P_CLKDIV_STAT0); in s5pv210_target() 311 reg = readl_relaxed(S5P_CLK_SRC2); in s5pv210_target() 318 reg = readl_relaxed(S5P_CLKMUX_STAT1); in s5pv210_target() 330 reg = readl_relaxed(S5P_CLK_SRC0); in s5pv210_target() 336 reg = readl_relaxed(S5P_CLKMUX_STAT0); in s5pv210_target() 342 reg = readl_relaxed(S5P_CLK_DIV0); in s5pv210_target() 361 reg = readl_relaxed(S5P_CLKDIV_STAT0); in s5pv210_target() 365 reg = readl_relaxed(S5P_ARM_MCS_CON); in s5pv210_target() 389 reg = readl_relaxed(S5P_APLL_CON); in s5pv210_target() [all …]
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/linux/drivers/clk/berlin/ |
H A D | berlin2-avpll.c | 118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled() 130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable() 145 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable() 163 reg = readl_relaxed(vco->base + VCO_CTRL1); in berlin2_avpll_vco_recalc_rate() 220 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_is_enabled() 231 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable() 243 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable() 258 reg = readl_relaxed(ch->base + VCO_CTRL30); in berlin2_avpll_channel_recalc_rate() 267 reg = readl_relaxed(ch->base + VCO_SYNC1n(ch->index)); in berlin2_avpll_channel_recalc_rate() 273 reg = readl_relaxed(ch->base + VCO_SYNC2n(ch->index)); in berlin2_avpll_channel_recalc_rate() [all …]
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H A D | berlin2-div.c | 74 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled() 92 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_enable() 111 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_disable() 129 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_set_parent() 138 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_set_parent() 161 reg = readl_relaxed(div->base + map->pll_switch_offs); in berlin2_div_get_parent() 164 reg = readl_relaxed(div->base + map->pll_select_offs); in berlin2_div_get_parent() 186 divsw = readl_relaxed(div->base + map->div_switch_offs) & in berlin2_div_recalc_rate() 188 div3sw = readl_relaxed(div->base + map->div3_switch_offs) & in berlin2_div_recalc_rate() 200 reg = readl_relaxed(div->base + map->div_select_offs); in berlin2_div_recalc_rate()
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/linux/arch/arm/mach-mv78xx0/ |
H A D | irq.c | 31 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_LOW_OFF); in mv78xx0_legacy_handle_irq() 32 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_LOW_OFF); in mv78xx0_legacy_handle_irq() 38 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_HIGH_OFF); in mv78xx0_legacy_handle_irq() 39 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_HIGH_OFF); in mv78xx0_legacy_handle_irq() 45 stat = readl_relaxed(mv78xx0_irq_base + IRQ_CAUSE_ERR_OFF); in mv78xx0_legacy_handle_irq() 46 stat &= readl_relaxed(mv78xx0_irq_base + IRQ_MASK_ERR_OFF); in mv78xx0_legacy_handle_irq()
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/linux/drivers/clk/samsung/ |
H A D | clk-pll.c | 99 if (readl_relaxed(pll->con_reg) & reg_mask) in samsung_pll_lock_wait() 121 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_enable() 133 tmp = readl_relaxed(pll->con_reg); in samsung_pll3xxx_disable() 156 pll_con = readl_relaxed(pll->con_reg); in samsung_pll2126_recalc_rate() 189 pll_con = readl_relaxed(pll->con_reg); in samsung_pll3000_recalc_rate() 227 pll_con = readl_relaxed(pll->con_reg); in samsung_pll35xx_recalc_rate() 264 tmp = readl_relaxed(pll->con_reg); in samsung_pll35xx_set_rate() 336 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_recalc_rate() 337 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_recalc_rate() 377 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_set_rate() [all …]
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/linux/drivers/watchdog/ |
H A D | omap_wdt.c | 76 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) in omap_wdt_reload() 83 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) in omap_wdt_reload() 94 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) in omap_wdt_enable() 98 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) in omap_wdt_enable() 108 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) in omap_wdt_disable() 112 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) in omap_wdt_disable() 123 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) in omap_wdt_set_timer() 127 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) in omap_wdt_set_timer() 150 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) in omap_wdt_start() 154 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) in omap_wdt_start() [all …]
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/linux/drivers/clk/imx/ |
H A D | clk-frac-pll.c | 57 if (readl_relaxed(pll->base) & (PLL_PD_MASK | PLL_BYPASS_MASK)) in clk_wait_ack() 70 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_prepare() 82 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_unprepare() 92 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_is_prepared() 104 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_recalc_rate() 106 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_recalc_rate() 172 val = readl_relaxed(pll->base + PLL_CFG1); in clk_pll_set_rate() 177 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate() 182 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate() 189 val = readl_relaxed(pll->base + PLL_CFG0); in clk_pll_set_rate()
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H A D | clk-pllv3.c | 63 u32 val = readl_relaxed(pll->base) & pll->power_bit; in clk_pllv3_wait_lock() 78 val = readl_relaxed(pll->base); in clk_pllv3_prepare() 93 val = readl_relaxed(pll->base); in clk_pllv3_unprepare() 105 if (readl_relaxed(pll->base) & BM_PLL_LOCK) in clk_pllv3_is_prepared() 115 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate() 142 val = readl_relaxed(pll->base); in clk_pllv3_set_rate() 163 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate() 197 val = readl_relaxed(pll->base); in clk_pllv3_sys_set_rate() 218 u32 mfn = readl_relaxed(pll->base + pll->num_offset); in clk_pllv3_av_recalc_rate() 219 u32 mfd = readl_relaxed(pll->base + pll->denom_offset); in clk_pllv3_av_recalc_rate() [all …]
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/linux/drivers/irqchip/ |
H A D | irq-sa11x0.c | 38 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq() 47 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq() 93 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend() 94 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend() 95 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend() 135 icip = readl_relaxed(iobase + ICIP); in sa1100_handle_irq() 136 icmr = readl_relaxed(iobase + ICMR); in sa1100_handle_irq()
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H A D | irq-mmp.c | 76 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq() 86 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_ack_irq() 100 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_irq() 110 r = readl_relaxed(mmp_icu2_base + (hwirq << 2)); in icu_mask_irq() 115 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_irq() 129 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_unmask_irq() 134 r = readl_relaxed(data->reg_mask) & ~(1 << hwirq); in icu_unmask_irq() 169 mask = readl_relaxed(data->reg_mask); in icu_mux_irq_demux() 171 status = readl_relaxed(data->reg_status) & ~mask; in icu_mux_irq_demux() 229 hwirq = readl_relaxed(mmp_icu_base + PJ1_INT_SEL); in mmp_handle_irq() [all …]
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H A D | irq-renesas-rzg2l.c | 99 iscr = readl_relaxed(priv->base + ISCR); in rzg2l_clear_irq_int() 100 iitsr = readl_relaxed(priv->base + IITSR); in rzg2l_clear_irq_int() 112 readl_relaxed(priv->base + ISCR); in rzg2l_clear_irq_int() 121 reg = readl_relaxed(priv->base + TSCR); in rzg2l_clear_tint_int() 128 readl_relaxed(priv->base + TSCR); in rzg2l_clear_tint_int() 151 writel_relaxed(readl_relaxed(priv->base + IMSK) | bit, priv->base + IMSK); in rzfive_irqc_mask_irq_interrupt() 159 writel_relaxed(readl_relaxed(priv->base + IMSK) & ~bit, priv->base + IMSK); in rzfive_irqc_unmask_irq_interrupt() 167 writel_relaxed(readl_relaxed(priv->base + TMSK) | bit, priv->base + TMSK); in rzfive_irqc_mask_tint_interrupt() 175 writel_relaxed(readl_relaxed(priv->base + TMSK) & ~bit, priv->base + TMSK); in rzfive_irqc_unmask_tint_interrupt() 222 reg = readl_relaxed(priv->base + TSSR(tssr_index)); in rzfive_tint_irq_endisable() [all …]
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/linux/arch/arm/common/ |
H A D | sa1111.c | 214 stat0 = readl_relaxed(mapbase + SA1111_INTSTATCLR0); in sa1111_irq_handler() 215 stat1 = readl_relaxed(mapbase + SA1111_INTSTATCLR1); in sa1111_irq_handler() 262 ie = readl_relaxed(mapbase + SA1111_INTEN0); in sa1111_mask_irq() 273 ie = readl_relaxed(mapbase + SA1111_INTEN0); in sa1111_unmask_irq() 292 ip = readl_relaxed(mapbase + SA1111_INTPOL0); in sa1111_retrigger_irq() 296 if (readl_relaxed(mapbase + SA1111_INTSTATCLR0) & mask) in sa1111_retrigger_irq() 321 ip = readl_relaxed(mapbase + SA1111_INTPOL0); in sa1111_type_irq() 338 we = readl_relaxed(mapbase + SA1111_WAKEEN0); in sa1111_wake_irq() 509 val = readl_relaxed(reg); in sa1111_gpio_modify() 521 return !!(readl_relaxed(reg + SA1111_GPIO_PXDDR) & mask); in sa1111_gpio_get_direction() [all …]
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/linux/arch/arm/mach-hisi/ |
H A D | hotplug.c | 104 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620() 114 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620() 200 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0); in hix5hd2_set_cpu() 205 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20); in hix5hd2_set_cpu() 210 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_PMC0); in hix5hd2_set_cpu() 216 val = readl_relaxed(ctrl_base + HIX5HD2_PERI_CRG20); in hix5hd2_set_cpu() 237 temp = readl_relaxed(ctrl_base + HIP01_PERI9); in hip01_set_cpu() 244 temp = readl_relaxed(ctrl_base + HIP01_PERI9); in hip01_set_cpu()
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/linux/drivers/clk/ti/ |
H A D | fapll.c | 81 u32 v = readl_relaxed(fd->base); in ti_fapll_clock_is_bypass() 91 u32 v = readl_relaxed(fd->base); in ti_fapll_set_bypass() 102 u32 v = readl_relaxed(fd->base); in ti_fapll_clear_bypass() 116 while ((v = readl_relaxed(fd->base))) { in ti_fapll_wait_lock() 134 u32 v = readl_relaxed(fd->base); in ti_fapll_enable() 146 u32 v = readl_relaxed(fd->base); in ti_fapll_disable() 155 u32 v = readl_relaxed(fd->base); in ti_fapll_is_enabled() 173 v = readl_relaxed(fd->base); in ti_fapll_recalc_rate() 253 v = readl_relaxed(fd->base); in ti_fapll_set_rate() 278 u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET); in ti_fapll_synth_enable() [all …]
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/linux/drivers/rtc/ |
H A D | rtc-rtd119x.c | 59 val = readl_relaxed(data->base + RTD_RTCCR); in rtd119x_rtc_reset() 72 val = readl_relaxed(data->base + RTD_RTCEN); in rtd119x_rtc_set_enabled() 91 tm->tm_sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; in rtd119x_rtc_read_time() 92 tm->tm_min = readl_relaxed(data->base + RTD_RTCMIN) & RTD_RTCMIN_RTCMIN_MASK; in rtd119x_rtc_read_time() 93 tm->tm_hour = readl_relaxed(data->base + RTD_RTCHR) & RTD_RTCHR_RTCHR_MASK; in rtd119x_rtc_read_time() 94 day = readl_relaxed(data->base + RTD_RTCDATE1) & RTD_RTCDATE1_RTCDATE1_MASK; in rtd119x_rtc_read_time() 95 day |= (readl_relaxed(data->base + RTD_RTCDATE2) & RTD_RTCDATE2_RTCDATE2_MASK) << 8; in rtd119x_rtc_read_time() 96 sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; in rtd119x_rtc_read_time() 193 val = readl_relaxed(data->base + RTD_RTCACR); in rtd119x_rtc_probe()
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H A D | rtc-sa1100.c | 55 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_interrupt() 100 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_alarm_irq_enable() 114 rtc_time64_to_tm(readl_relaxed(info->rcnr), tm); in sa1100_rtc_read_time() 132 rtsr = readl_relaxed(info->rtsr); in sa1100_rtc_read_alarm() 143 writel_relaxed(readl_relaxed(info->rtsr) & in sa1100_rtc_set_alarm() 147 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr); in sa1100_rtc_set_alarm() 149 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr); in sa1100_rtc_set_alarm() 159 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr)); in sa1100_rtc_proc() 160 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr)); in sa1100_rtc_proc() 196 if (readl_relaxed(info->rttr) == 0) { in sa1100_rtc_init()
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/linux/drivers/edac/ |
H A D | al_mc_edac.c | 83 eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT); in handle_ce() 88 ecccaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR0); in handle_ce() 89 ecccaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR1); in handle_ce() 90 ecccsyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND0); in handle_ce() 91 ecccsyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND1); in handle_ce() 92 ecccsyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND2); in handle_ce() 128 eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT); in handle_ue() 133 eccuaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR0); in handle_ue() 134 eccuaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR1); in handle_ue() 135 eccusyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND0); in handle_ue() [all …]
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/linux/drivers/mmc/host/ |
H A D | sdhci-msm.c | 322 return readl_relaxed(msm_host->core_mem + offset); in sdhci_msm_mci_variant_readl_relaxed() 328 return readl_relaxed(host->ioaddr + offset); in sdhci_msm_v5_variant_readl_relaxed() 412 ck_out_en = !!(readl_relaxed(host->ioaddr + in msm_dll_poll_ck_out_en() 423 ck_out_en = !!(readl_relaxed(host->ioaddr + in msm_dll_poll_ck_out_en() 448 config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); in msm_config_cm_dll_phase() 462 config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); in msm_config_cm_dll_phase() 467 config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); in msm_config_cm_dll_phase() 476 config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); in msm_config_cm_dll_phase() 626 config = readl_relaxed(host->ioaddr + msm_offset->core_dll_config); in msm_cm_dll_set_freq() 654 config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec); in msm_init_cm_dll() [all …]
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/linux/drivers/soc/dove/ |
H A D | pmu.c | 55 val = readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_reset() 70 val &= readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_assert() 84 val |= readl_relaxed(pmu->pmc_base + PMC_SW_RST); in pmu_reset_deassert() 157 val &= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_off() 164 val &= readl_relaxed(pmc_base + PMC_SW_RST); in pmu_domain_power_off() 169 val = readl_relaxed(pmu_base + PMU_PWR) | pmu_dom->pwr_mask; in pmu_domain_power_off() 189 val = ~pmu_dom->pwr_mask & readl_relaxed(pmu_base + PMU_PWR); in pmu_domain_power_on() 195 val |= readl_relaxed(pmc_base + PMC_SW_RST); in pmu_domain_power_on() 202 val |= readl_relaxed(pmu_base + PMU_ISO); in pmu_domain_power_on() 214 unsigned int val = readl_relaxed(domain->pmu->pmu_base + PMU_PWR); in __pmu_domain_register() [all …]
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/linux/drivers/iommu/arm/arm-smmu/ |
H A D | arm-smmu-nvidia.c | 60 return readl_relaxed(reg); in nvidia_smmu_read_reg() 116 val |= readl_relaxed(reg); in nvidia_smmu_tlb_sync() 143 val = readl_relaxed(reg); in nvidia_smmu_reset() 157 gfsr = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSR); in nvidia_smmu_global_fault_inst() 161 gfsynr0 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR0); in nvidia_smmu_global_fault_inst() 162 gfsynr1 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR1); in nvidia_smmu_global_fault_inst() 163 gfsynr2 = readl_relaxed(gr0_base + ARM_SMMU_GR0_sGFSYNR2); in nvidia_smmu_global_fault_inst() 202 fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); in nvidia_smmu_context_fault_bank() 206 fsynr = readl_relaxed(cb_base + ARM_SMMU_CB_FSYNR0); in nvidia_smmu_context_fault_bank() 208 cbfrsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(idx)); in nvidia_smmu_context_fault_bank()
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/linux/drivers/gpio/ |
H A D | gpio-zynq.c | 236 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value() 239 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value() 244 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value() 247 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value() 252 data = readl_relaxed(gpio->base_addr + in zynq_gpio_get_value() 324 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_in() 356 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_dir_out() 361 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num)); in zynq_gpio_dir_out() 388 reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); in zynq_gpio_get_direction() 511 int_type = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type() [all …]
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/linux/drivers/clk/tegra/ |
H A D | clk-tegra210.c | 504 value = readl_relaxed(clk_base + PLLE_AUX); in tegra210_plle_hw_sequence_is_enabled() 520 value = readl_relaxed(clk_base + PLLE_MISC0); in tegra210_plle_hw_sequence_start() 527 value = readl_relaxed(clk_base + PLLE_AUX); in tegra210_plle_hw_sequence_start() 547 val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_control_enable() 560 val = readl_relaxed(clk_base + XUSBIO_PLL_CFG0); in tegra210_xusb_pll_hw_sequence_start() 570 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_control_enable() 582 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_sequence_start() 592 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_set_sata_pll_seq_sw() 633 val = readl_relaxed(clk_base + mbist->lvl2_offset); in tegra210_generic_mbist_war() 647 csi_src = readl_relaxed(clk_base + PLLD_BASE); in tegra210_venc_mbist_war() [all …]
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/linux/drivers/bus/ |
H A D | omap_l3_noc.c | 84 std_err_main = readl_relaxed(l3_targ_stderr); in l3_handle_target() 91 readl_relaxed(l3_targ_slvofslsb)); in l3_handle_target() 113 masterid = (readl_relaxed(l3_targ_mstaddr) & in l3_handle_target() 124 op_code = readl_relaxed(l3_targ_hdr) & 0x7; in l3_handle_target() 126 m_req_info = readl_relaxed(l3_targ_info) & 0xF; in l3_handle_target() 178 err_reg = readl_relaxed(base + flag_mux->offset + in l3_interrupt_handler() 205 mask_val = readl_relaxed(mask_reg); in l3_interrupt_handler() 322 mask_val = readl_relaxed(mask_regx); in l3_resume_noirq() 328 mask_val = readl_relaxed(mask_regx); in l3_resume_noirq()
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/linux/drivers/mtd/maps/ |
H A D | physmap-bt1-rom.c | 39 data = readl_relaxed(src - shift); in bt1_rom_map_read() 51 data = readl_relaxed(src + shift); in bt1_rom_map_read() 80 data = readl_relaxed(src - shift); in bt1_rom_map_copy_from() 88 data = readl_relaxed(src); in bt1_rom_map_copy_from() 96 data = readl_relaxed(src); in bt1_rom_map_copy_from()
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/linux/drivers/clocksource/ |
H A D | timer-imx-gpt.c | 98 tmp = readl_relaxed(imxtm->base + MXC_TCTL); in imx1_gpt_irq_disable() 111 tmp = readl_relaxed(imxtm->base + MXC_TCTL); in imx1_gpt_irq_enable() 140 return sched_clock_reg ? readl_relaxed(sched_clock_reg) : 0; in mxc_read_sched_clock() 148 return readl_relaxed(sched_clock_reg); in imx_read_current_timer() 178 tcmp = readl_relaxed(imxtm->base + MX1_2_TCN) + evt; in mx1_2_set_next_event() 182 return (int)(tcmp - readl_relaxed(imxtm->base + MX1_2_TCN)) < 0 ? in mx1_2_set_next_event() 192 tcmp = readl_relaxed(imxtm->base + V2_TCN) + evt; in v2_set_next_event() 197 (int)(tcmp - readl_relaxed(imxtm->base + V2_TCN)) < 0 ? in v2_set_next_event() 209 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn); in mxc_shutdown() 231 u32 tcn = readl_relaxed(imxtm->base + imxtm->gpt->reg_tcn); in mxc_set_oneshot() [all …]
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