Searched refs:rclk (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/clk/qcom/ |
| H A D | clk-regmap.c | 24 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_is_enabled_regmap() local 28 ret = regmap_read(rclk->regmap, rclk->enable_reg, &val); in clk_is_enabled_regmap() 32 if (rclk->enable_is_inverted) in clk_is_enabled_regmap() 33 return (val & rclk->enable_mask) == 0; in clk_is_enabled_regmap() 35 return (val & rclk->enable_mask) != 0; in clk_is_enabled_regmap() 50 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_enable_regmap() local 53 if (rclk->enable_is_inverted) in clk_enable_regmap() 56 val = rclk->enable_mask; in clk_enable_regmap() 58 return regmap_update_bits(rclk->regmap, rclk->enable_reg, in clk_enable_regmap() 59 rclk->enable_mask, val); in clk_enable_regmap() [all …]
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| H A D | clk-ref.c | 34 struct qcom_clk_ref *rclk = to_qcom_clk_ref(hw); in qcom_clk_ref_prepare() local 37 if (!rclk->desc.num_regulators) in qcom_clk_ref_prepare() 40 ret = regulator_bulk_enable(rclk->desc.num_regulators, rclk->regulators); in qcom_clk_ref_prepare() 50 struct qcom_clk_ref *rclk = to_qcom_clk_ref(hw); in qcom_clk_ref_unprepare() local 52 if (rclk->desc.num_regulators) in qcom_clk_ref_unprepare() 53 regulator_bulk_disable(rclk->desc.num_regulators, rclk->regulators); in qcom_clk_ref_unprepare() 58 struct qcom_clk_ref *rclk = to_qcom_clk_ref(hw); in qcom_clk_ref_enable() local 61 ret = regmap_set_bits(rclk->regmap, rclk->desc.offset, QCOM_CLK_REF_EN_MASK); in qcom_clk_ref_enable() 72 struct qcom_clk_ref *rclk = to_qcom_clk_ref(hw); in qcom_clk_ref_disable() local 74 regmap_clear_bits(rclk->regmap, rclk->desc.offset, QCOM_CLK_REF_EN_MASK); in qcom_clk_ref_disable() [all …]
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| H A D | clk-regmap.h | 36 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
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| /linux/drivers/net/mdio/ |
| H A D | mdio-mux-meson-gxl.c | 119 struct clk *rclk; in gxl_mdio_mux_probe() local 131 rclk = devm_clk_get_enabled(dev, "ref"); in gxl_mdio_mux_probe() 132 if (IS_ERR(rclk)) in gxl_mdio_mux_probe() 133 return dev_err_probe(dev, PTR_ERR(rclk), in gxl_mdio_mux_probe()
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_dpll.c | 573 if (pf->dplls.rclk.num_parents > ICE_SYNCE_CLK_NUM) in ice_dpll_rclk_update_e825c() 613 for (u8 parent = 0; parent < pf->dplls.rclk.num_parents; parent++) { in ice_dpll_rclk_update() 3503 struct ice_dpll_pin *rclk = &pf->dplls.rclk; in ice_dpll_deinit_rclk_pin() local 3508 for (i = 0; i < rclk->num_parents; i++) { in ice_dpll_deinit_rclk_pin() 3509 parent = &pf->dplls.inputs[rclk->parent_idx[i]]; in ice_dpll_deinit_rclk_pin() 3512 dpll_pin_on_pin_unregister(parent->pin, rclk->pin, in ice_dpll_deinit_rclk_pin() 3513 &ice_dpll_rclk_ops, rclk); in ice_dpll_deinit_rclk_pin() 3518 dpll_pin_put(rclk->pin, &rclk->tracker); in ice_dpll_deinit_rclk_pin() 3548 for (int i = 0; i < pf->dplls.rclk.num_parents; i++) { in ice_dpll_pin_notify_work() 3580 pin = &pf->dplls.rclk; in ice_dpll_pin_notify_work() [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | qcs404-evb.dtsi | 262 rclk-pins { 287 rclk-pins {
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| H A D | monaco.dtsi | 7127 rclk-pins { 7152 rclk-pins {
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| /linux/drivers/net/ethernet/faraday/ |
| H A D | ftgmac100.c | 117 struct clk *rclk; member 1828 priv->rclk = devm_clk_get_optional_enabled(priv->dev, "RCLK"); in ftgmac100_setup_clk() 1829 if (IS_ERR(priv->rclk)) in ftgmac100_setup_clk() 1830 return PTR_ERR(priv->rclk); in ftgmac100_setup_clk()
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| /linux/arch/arm/boot/dts/ti/keystone/ |
| H A D | keystone-k2g-ice.dts | 325 cdns,rclk-en;
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| H A D | keystone-k2g-evm.dts | 393 cdns,rclk-en;
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos5420-pinctrl.dtsi | 202 sd0_rclk: sd0-rclk-pins {
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| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.h | 524 u64 rclk; member
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