19a24e1ffSJerome Brunet // SPDX-License-Identifier: GPL-2.0
29a24e1ffSJerome Brunet /* Copyright (c) 2022 Baylibre, SAS.
39a24e1ffSJerome Brunet * Author: Jerome Brunet <jbrunet@baylibre.com>
49a24e1ffSJerome Brunet */
59a24e1ffSJerome Brunet
69a24e1ffSJerome Brunet #include <linux/bitfield.h>
79a24e1ffSJerome Brunet #include <linux/delay.h>
89a24e1ffSJerome Brunet #include <linux/clk.h>
99a24e1ffSJerome Brunet #include <linux/io.h>
109a24e1ffSJerome Brunet #include <linux/mdio-mux.h>
119a24e1ffSJerome Brunet #include <linux/module.h>
129a24e1ffSJerome Brunet #include <linux/platform_device.h>
139a24e1ffSJerome Brunet
149a24e1ffSJerome Brunet #define ETH_REG2 0x0
159a24e1ffSJerome Brunet #define REG2_PHYID GENMASK(21, 0)
169a24e1ffSJerome Brunet #define EPHY_GXL_ID 0x110181
179a24e1ffSJerome Brunet #define REG2_LEDACT GENMASK(23, 22)
189a24e1ffSJerome Brunet #define REG2_LEDLINK GENMASK(25, 24)
199a24e1ffSJerome Brunet #define REG2_DIV4SEL BIT(27)
209a24e1ffSJerome Brunet #define REG2_ADCBYPASS BIT(30)
219a24e1ffSJerome Brunet #define REG2_CLKINSEL BIT(31)
229a24e1ffSJerome Brunet #define ETH_REG3 0x4
239a24e1ffSJerome Brunet #define REG3_ENH BIT(3)
249a24e1ffSJerome Brunet #define REG3_CFGMODE GENMASK(6, 4)
259a24e1ffSJerome Brunet #define REG3_AUTOMDIX BIT(7)
269a24e1ffSJerome Brunet #define REG3_PHYADDR GENMASK(12, 8)
279a24e1ffSJerome Brunet #define REG3_PWRUPRST BIT(21)
289a24e1ffSJerome Brunet #define REG3_PWRDOWN BIT(22)
299a24e1ffSJerome Brunet #define REG3_LEDPOL BIT(23)
309a24e1ffSJerome Brunet #define REG3_PHYMDI BIT(26)
319a24e1ffSJerome Brunet #define REG3_CLKINEN BIT(29)
329a24e1ffSJerome Brunet #define REG3_PHYIP BIT(30)
339a24e1ffSJerome Brunet #define REG3_PHYEN BIT(31)
349a24e1ffSJerome Brunet #define ETH_REG4 0x8
359a24e1ffSJerome Brunet #define REG4_PWRUPRSTSIG BIT(0)
369a24e1ffSJerome Brunet
379a24e1ffSJerome Brunet #define MESON_GXL_MDIO_EXTERNAL_ID 0
389a24e1ffSJerome Brunet #define MESON_GXL_MDIO_INTERNAL_ID 1
399a24e1ffSJerome Brunet
409a24e1ffSJerome Brunet struct gxl_mdio_mux {
419a24e1ffSJerome Brunet void __iomem *regs;
429a24e1ffSJerome Brunet void *mux_handle;
439a24e1ffSJerome Brunet };
449a24e1ffSJerome Brunet
gxl_enable_internal_mdio(struct gxl_mdio_mux * priv)459a24e1ffSJerome Brunet static void gxl_enable_internal_mdio(struct gxl_mdio_mux *priv)
469a24e1ffSJerome Brunet {
479a24e1ffSJerome Brunet u32 val;
489a24e1ffSJerome Brunet
499a24e1ffSJerome Brunet /* Setup the internal phy */
509a24e1ffSJerome Brunet val = (REG3_ENH |
519a24e1ffSJerome Brunet FIELD_PREP(REG3_CFGMODE, 0x7) |
529a24e1ffSJerome Brunet REG3_AUTOMDIX |
539a24e1ffSJerome Brunet FIELD_PREP(REG3_PHYADDR, 8) |
549a24e1ffSJerome Brunet REG3_LEDPOL |
559a24e1ffSJerome Brunet REG3_PHYMDI |
569a24e1ffSJerome Brunet REG3_CLKINEN |
579a24e1ffSJerome Brunet REG3_PHYIP);
589a24e1ffSJerome Brunet
599a24e1ffSJerome Brunet writel(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4);
609a24e1ffSJerome Brunet writel(val, priv->regs + ETH_REG3);
619a24e1ffSJerome Brunet mdelay(10);
629a24e1ffSJerome Brunet
639a24e1ffSJerome Brunet /* NOTE: The HW kept the phy id configurable at runtime.
649a24e1ffSJerome Brunet * The id below is arbitrary. It is the one used in the vendor code.
659a24e1ffSJerome Brunet * The only constraint is that it must match the one in
669a24e1ffSJerome Brunet * drivers/net/phy/meson-gxl.c to properly match the PHY.
679a24e1ffSJerome Brunet */
689a24e1ffSJerome Brunet writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
699a24e1ffSJerome Brunet priv->regs + ETH_REG2);
709a24e1ffSJerome Brunet
719a24e1ffSJerome Brunet /* Enable the internal phy */
729a24e1ffSJerome Brunet val |= REG3_PHYEN;
739a24e1ffSJerome Brunet writel(val, priv->regs + ETH_REG3);
749a24e1ffSJerome Brunet writel(0, priv->regs + ETH_REG4);
759a24e1ffSJerome Brunet
769a24e1ffSJerome Brunet /* The phy needs a bit of time to power up */
779a24e1ffSJerome Brunet mdelay(10);
789a24e1ffSJerome Brunet }
799a24e1ffSJerome Brunet
gxl_enable_external_mdio(struct gxl_mdio_mux * priv)809a24e1ffSJerome Brunet static void gxl_enable_external_mdio(struct gxl_mdio_mux *priv)
819a24e1ffSJerome Brunet {
829a24e1ffSJerome Brunet /* Reset the mdio bus mux to the external phy */
839a24e1ffSJerome Brunet writel(0, priv->regs + ETH_REG3);
849a24e1ffSJerome Brunet }
859a24e1ffSJerome Brunet
gxl_mdio_switch_fn(int current_child,int desired_child,void * data)869a24e1ffSJerome Brunet static int gxl_mdio_switch_fn(int current_child, int desired_child,
879a24e1ffSJerome Brunet void *data)
889a24e1ffSJerome Brunet {
899a24e1ffSJerome Brunet struct gxl_mdio_mux *priv = dev_get_drvdata(data);
909a24e1ffSJerome Brunet
919a24e1ffSJerome Brunet if (current_child == desired_child)
929a24e1ffSJerome Brunet return 0;
939a24e1ffSJerome Brunet
949a24e1ffSJerome Brunet switch (desired_child) {
959a24e1ffSJerome Brunet case MESON_GXL_MDIO_EXTERNAL_ID:
969a24e1ffSJerome Brunet gxl_enable_external_mdio(priv);
979a24e1ffSJerome Brunet break;
989a24e1ffSJerome Brunet case MESON_GXL_MDIO_INTERNAL_ID:
999a24e1ffSJerome Brunet gxl_enable_internal_mdio(priv);
1009a24e1ffSJerome Brunet break;
1019a24e1ffSJerome Brunet default:
1029a24e1ffSJerome Brunet return -EINVAL;
1039a24e1ffSJerome Brunet }
1049a24e1ffSJerome Brunet
1059a24e1ffSJerome Brunet return 0;
1069a24e1ffSJerome Brunet }
1079a24e1ffSJerome Brunet
1089a24e1ffSJerome Brunet static const struct of_device_id gxl_mdio_mux_match[] = {
1099a24e1ffSJerome Brunet { .compatible = "amlogic,gxl-mdio-mux", },
1109a24e1ffSJerome Brunet {},
1119a24e1ffSJerome Brunet };
1129a24e1ffSJerome Brunet MODULE_DEVICE_TABLE(of, gxl_mdio_mux_match);
1139a24e1ffSJerome Brunet
gxl_mdio_mux_probe(struct platform_device * pdev)1149a24e1ffSJerome Brunet static int gxl_mdio_mux_probe(struct platform_device *pdev)
1159a24e1ffSJerome Brunet {
1169a24e1ffSJerome Brunet struct device *dev = &pdev->dev;
1179a24e1ffSJerome Brunet struct gxl_mdio_mux *priv;
1189a24e1ffSJerome Brunet struct clk *rclk;
1199a24e1ffSJerome Brunet int ret;
1209a24e1ffSJerome Brunet
1219a24e1ffSJerome Brunet priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1229a24e1ffSJerome Brunet if (!priv)
1239a24e1ffSJerome Brunet return -ENOMEM;
1249a24e1ffSJerome Brunet platform_set_drvdata(pdev, priv);
1259a24e1ffSJerome Brunet
1269a24e1ffSJerome Brunet priv->regs = devm_platform_ioremap_resource(pdev, 0);
1279a24e1ffSJerome Brunet if (IS_ERR(priv->regs))
1289a24e1ffSJerome Brunet return PTR_ERR(priv->regs);
1299a24e1ffSJerome Brunet
1309a24e1ffSJerome Brunet rclk = devm_clk_get_enabled(dev, "ref");
1319a24e1ffSJerome Brunet if (IS_ERR(rclk))
1329a24e1ffSJerome Brunet return dev_err_probe(dev, PTR_ERR(rclk),
1339a24e1ffSJerome Brunet "failed to get reference clock\n");
1349a24e1ffSJerome Brunet
1359a24e1ffSJerome Brunet ret = mdio_mux_init(dev, dev->of_node, gxl_mdio_switch_fn,
1369a24e1ffSJerome Brunet &priv->mux_handle, dev, NULL);
1379a24e1ffSJerome Brunet if (ret)
1389a24e1ffSJerome Brunet dev_err_probe(dev, ret, "mdio multiplexer init failed\n");
1399a24e1ffSJerome Brunet
1409a24e1ffSJerome Brunet return ret;
1419a24e1ffSJerome Brunet }
1429a24e1ffSJerome Brunet
gxl_mdio_mux_remove(struct platform_device * pdev)143*a2879f75SUwe Kleine-König static void gxl_mdio_mux_remove(struct platform_device *pdev)
1449a24e1ffSJerome Brunet {
1459a24e1ffSJerome Brunet struct gxl_mdio_mux *priv = platform_get_drvdata(pdev);
1469a24e1ffSJerome Brunet
1479a24e1ffSJerome Brunet mdio_mux_uninit(priv->mux_handle);
1489a24e1ffSJerome Brunet }
1499a24e1ffSJerome Brunet
1509a24e1ffSJerome Brunet static struct platform_driver gxl_mdio_mux_driver = {
1519a24e1ffSJerome Brunet .probe = gxl_mdio_mux_probe,
152*a2879f75SUwe Kleine-König .remove_new = gxl_mdio_mux_remove,
1539a24e1ffSJerome Brunet .driver = {
1549a24e1ffSJerome Brunet .name = "gxl-mdio-mux",
1559a24e1ffSJerome Brunet .of_match_table = gxl_mdio_mux_match,
1569a24e1ffSJerome Brunet },
1579a24e1ffSJerome Brunet };
1589a24e1ffSJerome Brunet module_platform_driver(gxl_mdio_mux_driver);
1599a24e1ffSJerome Brunet
1609a24e1ffSJerome Brunet MODULE_DESCRIPTION("Amlogic GXL MDIO multiplexer driver");
1619a24e1ffSJerome Brunet MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
1629a24e1ffSJerome Brunet MODULE_LICENSE("GPL");
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